#include "frame-unwind.h"
#include "frame-base.h"
#include "trad-frame.h"
+#include "dis-asm.h"
+#include "gdb_assert.h"
+#include "sim-regno.h"
+#include "gdb/sim-frv.h"
+#include "opcodes/frv-desc.h" /* for the H_SPR_... enums */
extern void _initialize_frv_tdep (void);
static gdbarch_register_name_ftype frv_register_name;
static gdbarch_breakpoint_from_pc_ftype frv_breakpoint_from_pc;
+static gdbarch_adjust_breakpoint_address_ftype frv_gdbarch_adjust_breakpoint_address;
static gdbarch_skip_prologue_ftype frv_skip_prologue;
-static gdbarch_deprecated_extract_return_value_ftype frv_extract_return_value;
-static gdbarch_deprecated_extract_struct_value_address_ftype frv_extract_struct_value_address;
static gdbarch_frameless_function_invocation_ftype frv_frameless_function_invocation;
-static gdbarch_deprecated_push_arguments_ftype frv_push_arguments;
-static gdbarch_deprecated_saved_pc_after_call_ftype frv_saved_pc_after_call;
-/* Register numbers. You can change these as needed, but don't forget
- to update the simulator accordingly. */
+/* Register numbers. The order in which these appear define the
+ remote protocol, so take care in changing them. */
enum {
- /* The total number of registers we know exist. */
- frv_num_regs = 147,
-
/* Register numbers 0 -- 63 are always reserved for general-purpose
registers. The chip at hand may have less. */
first_gpr_regnum = 0,
first_fpr_regnum = 64,
last_fpr_regnum = 127,
- /* Register numbers 128 on up are always reserved for special-purpose
- registers. */
- first_spr_regnum = 128,
+ /* The PC register. */
pc_regnum = 128,
+
+ /* Register numbers 129 on up are always reserved for special-purpose
+ registers. */
+ first_spr_regnum = 129,
psr_regnum = 129,
ccr_regnum = 130,
cccr_regnum = 131,
dbar3_regnum = 140,
lr_regnum = 145,
lcr_regnum = 146,
- last_spr_regnum = 146
+ iacc0h_regnum = 147,
+ iacc0l_regnum = 148,
+ last_spr_regnum = 148,
+
+ /* The total number of registers we know exist. */
+ frv_num_regs = last_spr_regnum + 1,
+
+ /* Pseudo registers */
+ first_pseudo_regnum = frv_num_regs,
+
+ /* iacc0 - the 64-bit concatenation of iacc0h and iacc0l. */
+ iacc0_regnum = first_pseudo_regnum + 0,
+
+ last_pseudo_regnum = iacc0_regnum,
+ frv_num_pseudo_regs = last_pseudo_regnum - first_pseudo_regnum + 1,
};
static LONGEST frv_call_dummy_words[] =
/* By default, don't supply any general-purpose or floating-point
register names. */
- var->register_names = (char **) xmalloc (frv_num_regs * sizeof (char *));
- for (r = 0; r < frv_num_regs; r++)
+ var->register_names
+ = (char **) xmalloc ((frv_num_regs + frv_num_pseudo_regs)
+ * sizeof (char *));
+ for (r = 0; r < frv_num_regs + frv_num_pseudo_regs; r++)
var->register_names[r] = "";
- /* Do, however, supply default names for the special-purpose
+ /* Do, however, supply default names for the known special-purpose
registers. */
- for (r = first_spr_regnum; r <= last_spr_regnum; ++r)
- {
- sprintf (buf, "x%d", r);
- var->register_names[r] = xstrdup (buf);
- }
var->register_names[pc_regnum] = "pc";
var->register_names[lr_regnum] = "lr";
var->register_names[dbar2_regnum] = "dbar2";
var->register_names[dbar3_regnum] = "dbar3";
+ /* iacc0 (Only found on MB93405.) */
+ var->register_names[iacc0h_regnum] = "iacc0h";
+ var->register_names[iacc0l_regnum] = "iacc0l";
+ var->register_names[iacc0_regnum] = "iacc0";
+
return var;
}
{
if (reg < 0)
return "?toosmall?";
- if (reg >= frv_num_regs)
+ if (reg >= frv_num_regs + frv_num_pseudo_regs)
return "?toolarge?";
return CURRENT_VARIANT->register_names[reg];
}
-static int
-frv_register_raw_size (int reg)
+static struct type *
+frv_register_type (struct gdbarch *gdbarch, int reg)
{
- return 4;
+ if (reg >= first_fpr_regnum && reg <= last_fpr_regnum)
+ return builtin_type_float;
+ else if (reg == iacc0_regnum)
+ return builtin_type_int64;
+ else
+ return builtin_type_int32;
}
-static int
-frv_register_virtual_size (int reg)
+static void
+frv_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
+ int reg, void *buffer)
{
- return 4;
+ if (reg == iacc0_regnum)
+ {
+ regcache_raw_read (regcache, iacc0h_regnum, buffer);
+ regcache_raw_read (regcache, iacc0l_regnum, (bfd_byte *) buffer + 4);
+ }
}
-static struct type *
-frv_register_virtual_type (int reg)
+static void
+frv_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
+ int reg, const void *buffer)
{
- if (reg >= 64 && reg <= 127)
- return builtin_type_float;
- else
- return builtin_type_int;
+ if (reg == iacc0_regnum)
+ {
+ regcache_raw_write (regcache, iacc0h_regnum, buffer);
+ regcache_raw_write (regcache, iacc0l_regnum, (bfd_byte *) buffer + 4);
+ }
}
static int
-frv_register_byte (int reg)
+frv_register_sim_regno (int reg)
{
- return (reg * 4);
+ static const int spr_map[] =
+ {
+ H_SPR_PSR, /* psr_regnum */
+ H_SPR_CCR, /* ccr_regnum */
+ H_SPR_CCCR, /* cccr_regnum */
+ -1, /* 132 */
+ -1, /* 133 */
+ -1, /* 134 */
+ H_SPR_TBR, /* tbr_regnum */
+ H_SPR_BRR, /* brr_regnum */
+ H_SPR_DBAR0, /* dbar0_regnum */
+ H_SPR_DBAR1, /* dbar1_regnum */
+ H_SPR_DBAR2, /* dbar2_regnum */
+ H_SPR_DBAR3, /* dbar3_regnum */
+ -1, /* 141 */
+ -1, /* 142 */
+ -1, /* 143 */
+ -1, /* 144 */
+ H_SPR_LR, /* lr_regnum */
+ H_SPR_LCR, /* lcr_regnum */
+ H_SPR_IACC0H, /* iacc0h_regnum */
+ H_SPR_IACC0L /* iacc0l_regnum */
+ };
+
+ gdb_assert (reg >= 0 && reg < NUM_REGS);
+
+ if (first_gpr_regnum <= reg && reg <= last_gpr_regnum)
+ return reg - first_gpr_regnum + SIM_FRV_GR0_REGNUM;
+ else if (first_fpr_regnum <= reg && reg <= last_fpr_regnum)
+ return reg - first_fpr_regnum + SIM_FRV_FR0_REGNUM;
+ else if (pc_regnum == reg)
+ return SIM_FRV_PC_REGNUM;
+ else if (reg >= first_spr_regnum
+ && reg < first_spr_regnum + sizeof (spr_map) / sizeof (spr_map[0]))
+ {
+ int spr_reg_offset = spr_map[reg - first_spr_regnum];
+
+ if (spr_reg_offset < 0)
+ return SIM_REGNO_DOES_NOT_EXIST;
+ else
+ return SIM_FRV_SPR0_REGNUM + spr_reg_offset;
+ }
+
+ internal_error (__FILE__, __LINE__, "Bad register number %d", reg);
}
static const unsigned char *
return breakpoint;
}
+/* Define the maximum number of instructions which may be packed into a
+ bundle (VLIW instruction). */
+static const int max_instrs_per_bundle = 8;
+
+/* Define the size (in bytes) of an FR-V instruction. */
+static const int frv_instr_size = 4;
+
+/* Adjust a breakpoint's address to account for the FR-V architecture's
+ constraint that a break instruction must not appear as any but the
+ first instruction in the bundle. */
+static CORE_ADDR
+frv_gdbarch_adjust_breakpoint_address (struct gdbarch *gdbarch, CORE_ADDR bpaddr)
+{
+ int count = max_instrs_per_bundle;
+ CORE_ADDR addr = bpaddr - frv_instr_size;
+ CORE_ADDR func_start = get_pc_function_start (bpaddr);
+
+ /* Find the end of the previous packing sequence. This will be indicated
+ by either attempting to access some inaccessible memory or by finding
+ an instruction word whose packing bit is set to one. */
+ while (count-- > 0 && addr >= func_start)
+ {
+ char instr[frv_instr_size];
+ int status;
+
+ status = read_memory_nobpt (addr, instr, sizeof instr);
+
+ if (status != 0)
+ break;
+
+ /* This is a big endian architecture, so byte zero will have most
+ significant byte. The most significant bit of this byte is the
+ packing bit. */
+ if (instr[0] & 0x80)
+ break;
+
+ addr -= frv_instr_size;
+ }
+
+ if (count > 0)
+ bpaddr = addr + frv_instr_size;
+
+ return bpaddr;
+}
+
/* Return true if REG is a caller-saves ("scratch") register,
false otherwise. */
return (8 <= reg && reg <= 13);
}
+/* Given PC at the function's start address, attempt to find the
+ prologue end using SAL information. Return zero if the skip fails.
+
+ A non-optimized prologue traditionally has one SAL for the function
+ and a second for the function body. A single line function has
+ them both pointing at the same line.
+
+ An optimized prologue is similar but the prologue may contain
+ instructions (SALs) from the instruction body. Need to skip those
+ while not getting into the function body.
+
+ The functions end point and an increasing SAL line are used as
+ indicators of the prologue's endpoint.
+
+ This code is based on the function refine_prologue_limit (versions
+ found in both ia64 and ppc). */
+
+static CORE_ADDR
+skip_prologue_using_sal (CORE_ADDR func_addr)
+{
+ struct symtab_and_line prologue_sal;
+ CORE_ADDR start_pc;
+ CORE_ADDR end_pc;
+
+ /* Get an initial range for the function. */
+ find_pc_partial_function (func_addr, NULL, &start_pc, &end_pc);
+ start_pc += FUNCTION_START_OFFSET;
+
+ prologue_sal = find_pc_line (start_pc, 0);
+ if (prologue_sal.line != 0)
+ {
+ while (prologue_sal.end < end_pc)
+ {
+ struct symtab_and_line sal;
+
+ sal = find_pc_line (prologue_sal.end, 0);
+ if (sal.line == 0)
+ break;
+ /* Assume that a consecutive SAL for the same (or larger)
+ line mark the prologue -> body transition. */
+ if (sal.line >= prologue_sal.line)
+ break;
+ /* The case in which compiler's optimizer/scheduler has
+ moved instructions into the prologue. We look ahead in
+ the function looking for address ranges whose
+ corresponding line number is less the first one that we
+ found for the function. This is more conservative then
+ refine_prologue_limit which scans a large number of SALs
+ looking for any in the prologue */
+ prologue_sal = sal;
+ }
+ }
+ return prologue_sal.end;
+}
+
/* Scan an FR-V prologue, starting at PC, until frame->PC.
If FRAME is non-zero, fill in its saved_regs with appropriate addresses.
char gr_saved[64];
int gr_sp_offset[64];
+ /* The address of the most recently scanned prologue instruction. */
+ CORE_ADDR last_prologue_pc;
+
+ /* The address of the next instruction. */
+ CORE_ADDR next_pc;
+
+ /* The upper bound to of the pc values to scan. */
+ CORE_ADDR lim_pc;
+
memset (gr_saved, 0, sizeof (gr_saved));
- while (! next_frame || pc < frame_pc_unwind (next_frame))
+ last_prologue_pc = pc;
+
+ /* Try to compute an upper limit (on how far to scan) based on the
+ line number info. */
+ lim_pc = skip_prologue_using_sal (pc);
+ /* If there's no line number info, lim_pc will be 0. In that case,
+ set the limit to be 100 instructions away from pc. Hopefully, this
+ will be far enough away to account for the entire prologue. Don't
+ worry about overshooting the end of the function. The scan loop
+ below contains some checks to avoid scanning unreasonably far. */
+ if (lim_pc == 0)
+ lim_pc = pc + 400;
+
+ /* If we have a frame, we don't want to scan past the frame's pc. This
+ will catch those cases where the pc is in the prologue. */
+ if (next_frame)
+ {
+ CORE_ADDR frame_pc = frame_pc_unwind (next_frame);
+ if (frame_pc < lim_pc)
+ lim_pc = frame_pc;
+ }
+
+ /* Scan the prologue. */
+ while (pc < lim_pc)
{
LONGEST op = read_memory_integer (pc, 4);
+ next_pc = pc + 4;
/* The tests in this chain of ifs should be in order of
decreasing selectivity, so that more particular patterns get
to fire before less particular patterns. */
+ /* Some sort of control transfer instruction: stop scanning prologue.
+ Integer Conditional Branch:
+ X XXXX XX 0000110 XX XXXXXXXXXXXXXXXX
+ Floating-point / media Conditional Branch:
+ X XXXX XX 0000111 XX XXXXXXXXXXXXXXXX
+ LCR Conditional Branch to LR
+ X XXXX XX 0001110 XX XX 001 X XXXXXXXXXX
+ Integer conditional Branches to LR
+ X XXXX XX 0001110 XX XX 010 X XXXXXXXXXX
+ X XXXX XX 0001110 XX XX 011 X XXXXXXXXXX
+ Floating-point/Media Branches to LR
+ X XXXX XX 0001110 XX XX 110 X XXXXXXXXXX
+ X XXXX XX 0001110 XX XX 111 X XXXXXXXXXX
+ Jump and Link
+ X XXXXX X 0001100 XXXXXX XXXXXX XXXXXX
+ X XXXXX X 0001101 XXXXXX XXXXXX XXXXXX
+ Call
+ X XXXXXX 0001111 XXXXXXXXXXXXXXXXXX
+ Return from Trap
+ X XXXXX X 0000101 XXXXXX XXXXXX XXXXXX
+ Integer Conditional Trap
+ X XXXX XX 0000100 XXXXXX XXXX 00 XXXXXX
+ X XXXX XX 0011100 XXXXXX XXXXXXXXXXXX
+ Floating-point /media Conditional Trap
+ X XXXX XX 0000100 XXXXXX XXXX 01 XXXXXX
+ X XXXX XX 0011101 XXXXXX XXXXXXXXXXXX
+ Break
+ X XXXX XX 0000100 XXXXXX XXXX 11 XXXXXX
+ Media Trap
+ X XXXX XX 0000100 XXXXXX XXXX 10 XXXXXX */
+ if ((op & 0x01d80000) == 0x00180000 /* Conditional branches and Call */
+ || (op & 0x01f80000) == 0x00300000 /* Jump and Link */
+ || (op & 0x01f80000) == 0x00100000 /* Return from Trap, Trap */
+ || (op & 0x01f80000) == 0x00700000) /* Trap immediate */
+ {
+ /* Stop scanning; not in prologue any longer. */
+ break;
+ }
+
+ /* Loading something from memory into fp probably means that
+ we're in the epilogue. Stop scanning the prologue.
+ ld @(GRi, GRk), fp
+ X 000010 0000010 XXXXXX 000100 XXXXXX
+ ldi @(GRi, d12), fp
+ X 000010 0110010 XXXXXX XXXXXXXXXXXX */
+ else if ((op & 0x7ffc0fc0) == 0x04080100
+ || (op & 0x7ffc0000) == 0x04c80000)
+ {
+ break;
+ }
+
/* Setting the FP from the SP:
ori sp, 0, fp
P 000010 0100010 000001 000000000000 = 0x04881000
0 111111 1111111 111111 111111111111 = 0x7fffffff
. . . . . . . .
We treat this as part of the prologue. */
- if ((op & 0x7fffffff) == 0x04881000)
+ else if ((op & 0x7fffffff) == 0x04881000)
{
fp_set = 1;
fp_offset = 0;
+ last_prologue_pc = next_pc;
}
/* Move the link register to the scratch register grJ, before saving:
/* If we're moving it to a scratch register, that's fine. */
if (is_caller_saves_reg (gr_j))
- lr_save_reg = gr_j;
- /* Otherwise it's not a prologue instruction that we
- recognize. */
- else
- break;
+ {
+ lr_save_reg = gr_j;
+ last_prologue_pc = next_pc;
+ }
}
/* To save multiple callee-saves registers on the stack, at
gr_saved[gr_k + i] = 1;
gr_sp_offset[gr_k + i] = 4 * i;
}
+ last_prologue_pc = next_pc;
}
- else
- /* It's not a prologue instruction. */
- break;
}
/* Adjusting the stack pointer. (The stack pointer is GR1.)
We treat this as part of the prologue. */
else if ((op & 0x7ffff000) == 0x02401000)
{
- /* Sign-extend the twelve-bit field.
- (Isn't there a better way to do this?) */
- int s = (((op & 0xfff) - 0x800) & 0xfff) - 0x800;
+ if (framesize == 0)
+ {
+ /* Sign-extend the twelve-bit field.
+ (Isn't there a better way to do this?) */
+ int s = (((op & 0xfff) - 0x800) & 0xfff) - 0x800;
- framesize -= s;
+ framesize -= s;
+ last_prologue_pc = pc;
+ }
+ else
+ {
+ /* If the prologue is being adjusted again, we've
+ likely gone too far; i.e. we're probably in the
+ epilogue. */
+ break;
+ }
}
/* Setting the FP to a constant distance from the SP:
int s = (((op & 0xfff) - 0x800) & 0xfff) - 0x800;
fp_set = 1;
fp_offset = s;
+ last_prologue_pc = pc;
}
/* To spill an argument register to a scratch register:
{
int gr_i = ((op >> 12) & 0x3f);
- /* If the source isn't an arg register, then this isn't a
- prologue instruction. */
- if (! is_argument_reg (gr_i))
- break;
+ /* Make sure that the source is an arg register; if it is, we'll
+ treat it as a prologue instruction. */
+ if (is_argument_reg (gr_i))
+ last_prologue_pc = next_pc;
}
/* To spill 16-bit values to the stack:
{
int gr_k = ((op >> 25) & 0x3f);
- if (! is_argument_reg (gr_k))
- break; /* Source isn't an arg register. */
+ /* Make sure that GRk is really an argument register; treat
+ it as a prologue instruction if so. */
+ if (is_argument_reg (gr_k))
+ last_prologue_pc = next_pc;
}
/* To save multiple callee-saves register on the stack, at a
gr_saved[gr_k + i] = 1;
gr_sp_offset[gr_k + i] = s + (4 * i);
}
+ last_prologue_pc = next_pc;
}
- else
- /* It's not a prologue instruction. */
- break;
}
/* Storing any kind of integer register at any constant offset
/* If the address isn't relative to the SP or FP, it's not a
prologue instruction. */
if (gr_i != sp_regnum && gr_i != fp_regnum)
- break;
+ {
+ /* Do nothing; not a prologue instruction. */
+ }
/* Saving the old FP in the new frame (relative to the SP). */
- if (gr_k == fp_regnum && gr_i == sp_regnum)
+ else if (gr_k == fp_regnum && gr_i == sp_regnum)
{
gr_saved[fp_regnum] = 1;
gr_sp_offset[fp_regnum] = offset;
+ last_prologue_pc = next_pc;
}
/* Saving callee-saves register(s) on the stack, relative to
gr_sp_offset[gr_k] = offset;
else
gr_sp_offset[gr_k] = offset + fp_offset;
+ last_prologue_pc = next_pc;
}
/* Saving the scratch register holding the return address. */
lr_sp_offset = offset;
else
lr_sp_offset = offset + fp_offset;
+ last_prologue_pc = next_pc;
}
/* Spilling int-sized arguments to the stack. */
else if (is_argument_reg (gr_k))
- ;
-
- /* It's not a store instruction we recognize, so this must
- be the end of the prologue. */
- else
- break;
+ last_prologue_pc = next_pc;
}
-
- /* It's not any instruction we recognize, so this must be the end
- of the prologue. */
- else
- break;
-
- pc += 4;
+ pc = next_pc;
}
if (next_frame && info)
trad_frame_set_value (info->saved_regs, sp_regnum, info->prev_sp);
}
- return pc;
+ return last_prologue_pc;
}
}
static void
-frv_extract_return_value (struct type *type, char *regbuf, char *valbuf)
+frv_extract_return_value (struct type *type, struct regcache *regcache,
+ void *valbuf)
{
- memcpy (valbuf, (regbuf
- + frv_register_byte (8)
- + (TYPE_LENGTH (type) < 4 ? 4 - TYPE_LENGTH (type) : 0)),
- TYPE_LENGTH (type));
+ int len = TYPE_LENGTH (type);
+
+ if (len <= 4)
+ {
+ ULONGEST gpr8_val;
+ regcache_cooked_read_unsigned (regcache, 8, &gpr8_val);
+ store_unsigned_integer (valbuf, len, gpr8_val);
+ }
+ else if (len == 8)
+ {
+ ULONGEST regval;
+ regcache_cooked_read_unsigned (regcache, 8, ®val);
+ store_unsigned_integer (valbuf, 4, regval);
+ regcache_cooked_read_unsigned (regcache, 9, ®val);
+ store_unsigned_integer ((bfd_byte *) valbuf + 4, 4, regval);
+ }
+ else
+ internal_error (__FILE__, __LINE__, "Illegal return value length: %d", len);
}
static CORE_ADDR
-frv_extract_struct_value_address (char *regbuf)
+frv_extract_struct_value_address (struct regcache *regcache)
{
- return extract_unsigned_integer (regbuf +
- frv_register_byte (struct_return_regnum),
- 4);
+ ULONGEST addr;
+ regcache_cooked_read_unsigned (regcache, struct_return_regnum, &addr);
+ return addr;
}
static void
return frameless_look_for_prologue (frame);
}
-#define ROUND_UP(n,a) (((n)+(a)-1) & ~((a)-1))
-#define ROUND_DOWN(n,a) ((n) & ~((a)-1))
-
static CORE_ADDR
frv_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp)
{
/* Require dword alignment. */
- return ROUND_DOWN (sp, 8);
+ return align_down (sp, 8);
}
static CORE_ADDR
stack_space = 0;
for (argnum = 0; argnum < nargs; ++argnum)
- stack_space += ROUND_UP (TYPE_LENGTH (VALUE_TYPE (args[argnum])), 4);
+ stack_space += align_up (TYPE_LENGTH (VALUE_TYPE (args[argnum])), 4);
stack_space -= (6 * 4);
if (stack_space > 0)
sp -= stack_space;
/* Make sure stack is dword aligned. */
- sp = ROUND_DOWN (sp, 8);
+ sp = align_down (sp, 8);
stack_offset = 0;
argnum, *((int *)val), stack_offset, (int) (sp + stack_offset));
#endif
write_memory (sp + stack_offset, val, partial_len);
- stack_offset += ROUND_UP(partial_len, 4);
+ stack_offset += align_up (partial_len, 4);
}
len -= partial_len;
val += partial_len;
}
static void
-frv_store_return_value (struct type *type, char *valbuf)
+frv_store_return_value (struct type *type, struct regcache *regcache,
+ const void *valbuf)
{
- int length = TYPE_LENGTH (type);
- int reg8_offset = frv_register_byte (8);
-
- if (length <= 4)
- deprecated_write_register_bytes (reg8_offset + (4 - length), valbuf,
- length);
- else if (length == 8)
- deprecated_write_register_bytes (reg8_offset, valbuf, length);
+ int len = TYPE_LENGTH (type);
+
+ if (len <= 4)
+ {
+ bfd_byte val[4];
+ memset (val, 0, sizeof (val));
+ memcpy (val + (4 - len), valbuf, len);
+ regcache_cooked_write (regcache, 8, val);
+ }
+ else if (len == 8)
+ {
+ regcache_cooked_write (regcache, 8, valbuf);
+ regcache_cooked_write (regcache, 9, (bfd_byte *) valbuf + 4);
+ }
else
internal_error (__FILE__, __LINE__,
- "Don't know how to return a %d-byte value.", length);
+ "Don't know how to return a %d-byte value.", len);
}
/* The FUNC is easy. */
func = frame_func_unwind (next_frame);
- /* This is meant to halt the backtrace at "_start". Make sure we
- don't halt it at a generic dummy frame. */
- if (inside_entry_file (func))
- return;
-
/* Check if the stack is empty. */
msym_stack = lookup_minimal_symbol ("_stack", NULL, NULL);
if (msym_stack && info->base == SYMBOL_VALUE_ADDRESS (msym_stack))
case bfd_mach_frvsimple:
case bfd_mach_fr500:
case bfd_mach_frvtomcat:
+ case bfd_mach_fr550:
set_variant_num_gprs (var, 64);
set_variant_num_fprs (var, 64);
break;
set_gdbarch_ptr_bit (gdbarch, 32);
set_gdbarch_num_regs (gdbarch, frv_num_regs);
+ set_gdbarch_num_pseudo_regs (gdbarch, frv_num_pseudo_regs);
+
set_gdbarch_sp_regnum (gdbarch, sp_regnum);
set_gdbarch_deprecated_fp_regnum (gdbarch, fp_regnum);
set_gdbarch_pc_regnum (gdbarch, pc_regnum);
set_gdbarch_register_name (gdbarch, frv_register_name);
- set_gdbarch_deprecated_register_size (gdbarch, 4);
- set_gdbarch_deprecated_register_bytes (gdbarch, frv_num_regs * 4);
- set_gdbarch_deprecated_register_byte (gdbarch, frv_register_byte);
- set_gdbarch_deprecated_register_raw_size (gdbarch, frv_register_raw_size);
- set_gdbarch_deprecated_max_register_raw_size (gdbarch, 4);
- set_gdbarch_deprecated_register_virtual_size (gdbarch, frv_register_virtual_size);
- set_gdbarch_deprecated_max_register_virtual_size (gdbarch, 4);
- set_gdbarch_deprecated_register_virtual_type (gdbarch, frv_register_virtual_type);
+ set_gdbarch_register_type (gdbarch, frv_register_type);
+ set_gdbarch_register_sim_regno (gdbarch, frv_register_sim_regno);
+
+ set_gdbarch_pseudo_register_read (gdbarch, frv_pseudo_register_read);
+ set_gdbarch_pseudo_register_write (gdbarch, frv_pseudo_register_write);
set_gdbarch_skip_prologue (gdbarch, frv_skip_prologue);
set_gdbarch_breakpoint_from_pc (gdbarch, frv_breakpoint_from_pc);
+ set_gdbarch_adjust_breakpoint_address (gdbarch, frv_gdbarch_adjust_breakpoint_address);
- set_gdbarch_frame_args_skip (gdbarch, 0);
set_gdbarch_frameless_function_invocation (gdbarch, frv_frameless_function_invocation);
set_gdbarch_use_struct_convention (gdbarch, always_use_struct_convention);
- set_gdbarch_deprecated_extract_return_value (gdbarch, frv_extract_return_value);
+ set_gdbarch_extract_return_value (gdbarch, frv_extract_return_value);
set_gdbarch_deprecated_store_struct_return (gdbarch, frv_store_struct_return);
- set_gdbarch_deprecated_store_return_value (gdbarch, frv_store_return_value);
+ set_gdbarch_store_return_value (gdbarch, frv_store_return_value);
set_gdbarch_deprecated_extract_struct_value_address (gdbarch, frv_extract_struct_value_address);
/* Frame stuff. */
set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
- set_gdbarch_decr_pc_after_break (gdbarch, 0);
- set_gdbarch_function_start_offset (gdbarch, 0);
-
set_gdbarch_remote_translate_xfer_address
(gdbarch, generic_remote_translate_xfer_address);
projects / deliverable / binutils-gdb.git / blobdiff