gdbarch.sh: Remove commented out TARGET_CHAR_BIT definition

[deliverable/binutils-gdb.git] / gdb / gdbarch.sh

diff --git a/gdb/gdbarch.sh b/gdb/gdbarch.sh
index 170aae3a3fc4f60b999e3580ca50e5123dfc5dad..753819f321c5a9b8f513bc83ad83a19a7ee094b5 100755 (executable)
--- a/gdb/gdbarch.sh
+++ b/gdb/gdbarch.sh
@@ -351,10 +351,6 @@ i;const struct target_desc *;target_desc;;;;;;;host_address_to_string (gdbarch->
 # and such.  Conceptually, it's quite separate from byte/word byte order.
 v;int;bits_big_endian;;;1;(gdbarch->byte_order == BFD_ENDIAN_BIG);;0
 
-# Number of bits in a char or unsigned char for the target machine.
-# Just like CHAR_BIT in <limits.h> but describes the target machine.
-# v;TARGET_CHAR_BIT;int;char_bit;;;;8 * sizeof (char);8;;0;
-#
 # Number of bits in a short or unsigned short for the target machine.
 v;int;short_bit;;;8 * sizeof (short);2*TARGET_CHAR_BIT;;0
 # Number of bits in an int or unsigned int for the target machine.
@@ -640,7 +636,7 @@ m;CORE_ADDR;addr_bits_remove;CORE_ADDR addr;addr;;core_addr_identity;;0
 # the condition and only put the breakpoint at the branch destination if
 # the condition is true, so that we ensure forward progress when stepping
 # past a conditional branch to self.
-F;VEC (CORE_ADDR) *;software_single_step;struct regcache *regcache;regcache
+F;std::vector<CORE_ADDR>;software_single_step;struct regcache *regcache;regcache
 
 # Return non-zero if the processor is executing a delay slot and a
 # further single-step is needed before the instruction finishes.
@@ -1271,6 +1267,7 @@ cat <<EOF
 #ifndef GDBARCH_H
 #define GDBARCH_H
 
+#include <vector>
 #include "frame.h"
 #include "dis-asm.h"