Add virtual destructor to tui_layout_base

[deliverable/binutils-gdb.git] / gdb / gdbserver / linux-aarch64-low.c

diff --git a/gdb/gdbserver/linux-aarch64-low.c b/gdb/gdbserver/linux-aarch64-low.c
index dc4ee81d2a24ead4f97fad653aa547f97f30faf0..9e234e0578bfd8017d58a5c8e24c8c7bda70fc5f 100644 (file)
--- a/gdb/gdbserver/linux-aarch64-low.c
+++ b/gdb/gdbserver/linux-aarch64-low.c
@@ -28,6 +28,7 @@
 #include "elf/common.h"
 #include "ax.h"
 #include "tracepoint.h"
+#include "debug.h"
 
 #include <signal.h>
 #include <sys/user.h>
@@ -39,6 +40,7 @@
 
 #include "gdb_proc_service.h"
 #include "arch/aarch64.h"
+#include "linux-aarch32-tdesc.h"
 #include "linux-aarch64-tdesc.h"
 #include "nat/aarch64-sve-linux-ptrace.h"
 #include "tdesc.h"
@@ -81,7 +83,7 @@ is_sve_tdesc (void)
 {
   struct regcache *regcache = get_thread_regcache (current_thread, 0);
 
-  return regcache->tdesc->reg_defs.size () == AARCH64_SVE_NUM_REGS;
+  return tdesc_contains_feature (regcache->tdesc, "org.gnu.gdb.aarch64.sve");
 }
 
 static void
@@ -152,10 +154,6 @@ aarch64_store_pauthregset (struct regcache *regcache, const void *buf)
                   &pauth_regset[1]);
 }
 
-/* Enable miscellaneous debugging output.  The name is historical - it
-   was originally used to debug LinuxThreads support.  */
-extern int debug_threads;
-
 /* Implementation of linux_target_ops method "get_pc".  */
 
 static CORE_ADDR
@@ -527,7 +525,7 @@ aarch64_arch_setup (void)
       current_process ()->tdesc = aarch64_linux_read_description (vq, pauth_p);
     }
   else
-    current_process ()->tdesc = tdesc_arm_with_neon;
+    current_process ()->tdesc = aarch32_linux_read_description ();
 
   aarch64_linux_get_debug_reg_capacity (lwpid_of (current_thread));
 }
@@ -1625,11 +1623,11 @@ append_insns (CORE_ADDR *to, size_t len, const uint32_t *buf)
   for (i = 0; i < len; i++)
     le_buf[i] = htole32 (buf[i]);
 
-  write_inferior_memory (*to, (const unsigned char *) le_buf, byte_len);
+  target_write_memory (*to, (const unsigned char *) le_buf, byte_len);
 
   xfree (le_buf);
 #else
-  write_inferior_memory (*to, (const unsigned char *) buf, byte_len);
+  target_write_memory (*to, (const unsigned char *) buf, byte_len);
 #endif
 
   *to += byte_len;
@@ -1950,7 +1948,7 @@ aarch64_install_fast_tracepoint_jump_pad (CORE_ADDR tpoint,
   for (i = 30; i >= 0; i -= 2)
     p += emit_stp_q_offset (p, i, i + 1, sp, i * 16);
 
-  /* Push general puspose registers on the stack.  Note that we do not need
+  /* Push general purpose registers on the stack.  Note that we do not need
      to push x31 as it represents the xzr register and not the stack
      pointer in a STR instruction.
 
@@ -2118,7 +2116,7 @@ aarch64_install_fast_tracepoint_jump_pad (CORE_ADDR tpoint,
        ; This instruction is a normal store with memory ordering
        ; constraints.  Thanks to this we do not have to put a data
        ; barrier instruction to make sure all data read and writes are done
-       ; before this instruction is executed.  Furthermore, this instrucion
+       ; before this instruction is executed.  Furthermore, this instruction
        ; will trigger an event, letting other threads know they can grab
        ; the lock.
        STLR xzr, [x0]
@@ -2313,7 +2311,7 @@ aarch64_emit_prologue (void)
      the current stack pointer in the frame pointer.  This way, it is not
      clobbered when calling C functions.
 
-     Finally, throughtout every operation, we are using register x0 as the
+     Finally, throughout every operation, we are using register x0 as the
      top of the stack, and x1 as a scratch register.  */
 
   p += emit_stp (p, x0, x1, sp, preindex_memory_operand (-2 * 16));
@@ -3097,8 +3095,4 @@ initialize_low_arch (void)
 
   initialize_regsets_info (&aarch64_regsets_info);
   initialize_regsets_info (&aarch64_sve_regsets_info);
-
-#if GDB_SELF_TEST
-  initialize_low_tdesc ();
-#endif
 }