MIPS/Linux: Disable n32 USR `ptrace' accesses to 64-bit registers

[deliverable/binutils-gdb.git] / gdb / gdbserver / linux-mips-low.c

diff --git a/gdb/gdbserver/linux-mips-low.c b/gdb/gdbserver/linux-mips-low.c
index 07becd6d842947606c9eb63f632e7f6a42eaa3bd..7fae2e698440760278df248348b0d47b54ced96f 100644 (file)
--- a/gdb/gdbserver/linux-mips-low.c
+++ b/gdb/gdbserver/linux-mips-low.c
@@ -1,5 +1,5 @@
 /* GNU/Linux/MIPS specific low level interface, for the remote server for GDB.
-   Copyright (C) 1995-2017 Free Software Foundation, Inc.
+   Copyright (C) 1995-2018 Free Software Foundation, Inc.
 
    This file is part of GDB.
 
@@ -198,8 +198,8 @@ struct arch_lwp_info
 
 /* Pseudo registers can not be read.  ptrace does not provide a way to
    read (or set) PS_REGNUM, and there's no point in reading or setting
-   ZERO_REGNUM.  We also can not set BADVADDR, CAUSE, or FCRIR via
-   ptrace().  */
+   ZERO_REGNUM, it's always 0.  We also can not set BADVADDR, CAUSE,
+   or FCRIR via ptrace().  */
 
 static int
 mips_cannot_fetch_register (int regno)
@@ -211,6 +211,10 @@ mips_cannot_fetch_register (int regno)
 
   tdesc = current_process ()->tdesc;
 
+  /* On n32 we can't access 64-bit registers via PTRACE_PEEKUSR.  */
+  if (register_size (tdesc, regno) > sizeof (PTRACE_XFER_TYPE))
+    return 1;
+
   if (find_regno (tdesc, "r0") == regno)
     return 1;
 
@@ -227,6 +231,10 @@ mips_cannot_store_register (int regno)
 
   tdesc = current_process ()->tdesc;
 
+  /* On n32 we can't access 64-bit registers via PTRACE_POKEUSR.  */
+  if (register_size (tdesc, regno) > sizeof (PTRACE_XFER_TYPE))
+    return 1;
+
   if (find_regno (tdesc, "r0") == regno)
     return 1;
 
@@ -242,6 +250,20 @@ mips_cannot_store_register (int regno)
   return 0;
 }
 
+static int
+mips_fetch_register (struct regcache *regcache, int regno)
+{
+  const struct target_desc *tdesc = current_process ()->tdesc;
+
+  if (find_regno (tdesc, "r0") == regno)
+    {
+      supply_register_zeroed (regcache, regno);
+      return 1;
+    }
+
+  return 0;
+}
+
 static CORE_ADDR
 mips_get_pc (struct regcache *regcache)
 {
@@ -289,29 +311,21 @@ mips_breakpoint_at (CORE_ADDR where)
   return 0;
 }
 
-/* Mark the watch registers of lwp, represented by ENTRY, as changed,
-   if the lwp's process id is *PID_P.  */
+/* Mark the watch registers of lwp, represented by ENTRY, as changed.  */
 
-static int
-update_watch_registers_callback (thread_info *thread, void *pid_p)
+static void
+update_watch_registers_callback (thread_info *thread)
 {
   struct lwp_info *lwp = get_thread_lwp (thread);
-  int pid = *(int *) pid_p;
 
-  /* Only update the threads of this process.  */
-  if (pid_of (thread) == pid)
-    {
-      /* The actual update is done later just before resuming the lwp,
-        we just mark that the registers need updating.  */
-      lwp->arch_private->watch_registers_changed = 1;
-
-      /* If the lwp isn't stopped, force it to momentarily pause, so
-        we can update its watch registers.  */
-      if (!lwp->stopped)
-       linux_stop_lwp (lwp);
-    }
+  /* The actual update is done later just before resuming the lwp,
+     we just mark that the registers need updating.  */
+  lwp->arch_private->watch_registers_changed = 1;
 
-  return 0;
+  /* If the lwp isn't stopped, force it to momentarily pause, so
+     we can update its watch registers.  */
+  if (!lwp->stopped)
+    linux_stop_lwp (lwp);
 }
 
 /* This is the implementation of linux_target_ops method
@@ -471,7 +485,6 @@ mips_insert_point (enum raw_bkpt_type type, CORE_ADDR addr,
   struct process_info *proc = current_process ();
   struct arch_process_info *priv = proc->priv->arch_private;
   struct pt_watch_regs regs;
-  int pid;
   long lwpid;
   enum target_hw_bp_type watch_type;
   uint32_t irw;
@@ -502,8 +515,7 @@ mips_insert_point (enum raw_bkpt_type type, CORE_ADDR addr,
   priv->watch_mirror = regs;
 
   /* Only update the threads of this process.  */
-  pid = pid_of (proc);
-  find_inferior (&all_threads, update_watch_registers_callback, &pid);
+  for_each_thread (proc->pid, update_watch_registers_callback);
 
   return 0;
 }
@@ -519,7 +531,6 @@ mips_remove_point (enum raw_bkpt_type type, CORE_ADDR addr,
   struct arch_process_info *priv = proc->priv->arch_private;
 
   int deleted_one;
-  int pid;
   enum target_hw_bp_type watch_type;
 
   struct mips_watchpoint **pw;
@@ -553,8 +564,8 @@ mips_remove_point (enum raw_bkpt_type type, CORE_ADDR addr,
                                  &priv->watch_mirror);
 
   /* Only update the threads of this process.  */
-  pid = pid_of (proc);
-  find_inferior (&all_threads, update_watch_registers_callback, &pid);
+  for_each_thread (proc->pid, update_watch_registers_callback);
+
   return 0;
 }
 
@@ -761,7 +772,9 @@ mips_store_gregset (struct regcache *regcache, const void *buf)
 
   use_64bit = (register_size (regcache->tdesc, 0) == 8);
 
-  for (i = 0; i < 32; i++)
+  supply_register_by_name_zeroed (regcache, "r0");
+
+  for (i = 1; i < 32; i++)
     mips_supply_register (regcache, use_64bit, i, regset + i);
 
   mips_supply_register (regcache, use_64bit,
@@ -890,7 +903,7 @@ struct linux_target_ops the_low_target = {
   mips_regs_info,
   mips_cannot_fetch_register,
   mips_cannot_store_register,
-  NULL, /* fetch_register */
+  mips_fetch_register,
   mips_get_pc,
   mips_set_pc,
   NULL, /* breakpoint_kind_from_pc */