/* Target-machine dependent code for Renesas H8/300, for GDB.
- Copyright 1988, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1998,
- 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
+ Copyright (C) 1988-2020 Free Software Foundation, Inc.
This file is part of GDB.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
+ the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330,
- Boston, MA 02111-1307, USA. */
+ along with this program. If not, see <http://www.gnu.org/licenses/>. */
/*
Contributed by Steve Chamberlain
#include "defs.h"
#include "value.h"
-#include "inferior.h"
-#include "symfile.h"
#include "arch-utils.h"
#include "regcache.h"
#include "gdbcore.h"
#include "objfiles.h"
-#include "gdbcmd.h"
-#include "gdb_assert.h"
#include "dis-asm.h"
#include "dwarf2-frame.h"
-#include "frame.h"
#include "frame-base.h"
#include "frame-unwind.h"
-/* Extra info which is saved in each frame_info. */
-struct frame_extra_info
-{
- CORE_ADDR from_pc;
-};
-
-enum
-{
- h8300_reg_size = 2,
- h8300h_reg_size = 4,
- h8300_max_reg_size = 4,
-};
-
-static int is_h8300hmode (struct gdbarch *gdbarch);
-static int is_h8300smode (struct gdbarch *gdbarch);
-static int is_h8300sxmode (struct gdbarch *gdbarch);
-static int is_h8300_normal_mode (struct gdbarch *gdbarch);
-
-#define BINWORD (is_h8300hmode (current_gdbarch) && \
- !is_h8300_normal_mode (current_gdbarch) ? h8300h_reg_size : h8300_reg_size)
-
enum gdb_regnum
{
E_R0_REGNUM, E_ER0_REGNUM = E_R0_REGNUM, E_ARG0_REGNUM = E_R0_REGNUM,
#define H8300_MAX_NUM_REGS 18
-#define E_PSEUDO_CCR_REGNUM (NUM_REGS)
-#define E_PSEUDO_EXR_REGNUM (NUM_REGS+1)
+#define E_PSEUDO_CCR_REGNUM(gdbarch) (gdbarch_num_regs (gdbarch))
+#define E_PSEUDO_EXR_REGNUM(gdbarch) (gdbarch_num_regs (gdbarch)+1)
+
+struct h8300_frame_cache
+{
+ /* Base address. */
+ CORE_ADDR base;
+ CORE_ADDR sp_offset;
+ CORE_ADDR pc;
+
+ /* Flag showing that a frame has been created in the prologue code. */
+ int uses_fp;
+
+ /* Saved registers. */
+ CORE_ADDR saved_regs[H8300_MAX_NUM_REGS];
+ CORE_ADDR saved_sp;
+};
+
+enum
+{
+ h8300_reg_size = 2,
+ h8300h_reg_size = 4,
+ h8300_max_reg_size = 4,
+};
+
+static int is_h8300hmode (struct gdbarch *gdbarch);
+static int is_h8300smode (struct gdbarch *gdbarch);
+static int is_h8300sxmode (struct gdbarch *gdbarch);
+static int is_h8300_normal_mode (struct gdbarch *gdbarch);
+
+#define BINWORD(gdbarch) ((is_h8300hmode (gdbarch) \
+ && !is_h8300_normal_mode (gdbarch)) \
+ ? h8300h_reg_size : h8300_reg_size)
+
+/* Normal frames. */
+
+/* Allocate and initialize a frame cache. */
+
+static void
+h8300_init_frame_cache (struct gdbarch *gdbarch,
+ struct h8300_frame_cache *cache)
+{
+ int i;
+
+ /* Base address. */
+ cache->base = 0;
+ cache->sp_offset = 0;
+ cache->pc = 0;
-#define UNSIGNED_SHORT(X) ((X) & 0xffff)
+ /* Frameless until proven otherwise. */
+ cache->uses_fp = 0;
-#define IS_PUSH(x) ((x & 0xfff0)==0x6df0)
-#define IS_PUSH_FP(x) (x == 0x6df6)
-#define IS_MOVE_FP(x) (x == 0x0d76 || x == 0x0ff6)
-#define IS_MOV_SP_FP(x) (x == 0x0d76 || x == 0x0ff6)
-#define IS_SUB2_SP(x) (x==0x1b87)
-#define IS_SUB4_SP(x) (x==0x1b97)
-#define IS_SUBL_SP(x) (x==0x7a37)
-#define IS_MOVK_R5(x) (x==0x7905)
-#define IS_SUB_R5SP(x) (x==0x1957)
+ /* Saved registers. We initialize these to -1 since zero is a valid
+ offset (that's where %fp is supposed to be stored). */
+ for (i = 0; i < gdbarch_num_regs (gdbarch); i++)
+ cache->saved_regs[i] = -1;
+}
+
+#define IS_MOVB_RnRm(x) (((x) & 0xff88) == 0x0c88)
+#define IS_MOVW_RnRm(x) (((x) & 0xff88) == 0x0d00)
+#define IS_MOVL_RnRm(x) (((x) & 0xff88) == 0x0f80)
+#define IS_MOVB_Rn16_SP(x) (((x) & 0xfff0) == 0x6ee0)
+#define IS_MOVB_EXT(x) ((x) == 0x7860)
+#define IS_MOVB_Rn24_SP(x) (((x) & 0xfff0) == 0x6aa0)
+#define IS_MOVW_Rn16_SP(x) (((x) & 0xfff0) == 0x6fe0)
+#define IS_MOVW_EXT(x) ((x) == 0x78e0)
+#define IS_MOVW_Rn24_SP(x) (((x) & 0xfff0) == 0x6ba0)
+/* Same instructions as mov.w, just prefixed with 0x0100. */
+#define IS_MOVL_PRE(x) ((x) == 0x0100)
+#define IS_MOVL_Rn16_SP(x) (((x) & 0xfff0) == 0x6fe0)
+#define IS_MOVL_EXT(x) ((x) == 0x78e0)
+#define IS_MOVL_Rn24_SP(x) (((x) & 0xfff0) == 0x6ba0)
+
+#define IS_PUSHFP_MOVESPFP(x) ((x) == 0x6df60d76)
+#define IS_PUSH_FP(x) ((x) == 0x01006df6)
+#define IS_MOV_SP_FP(x) ((x) == 0x0ff6)
+#define IS_SUB2_SP(x) ((x) == 0x1b87)
+#define IS_SUB4_SP(x) ((x) == 0x1b97)
+#define IS_ADD_IMM_SP(x) ((x) == 0x7a1f)
+#define IS_SUB_IMM_SP(x) ((x) == 0x7a3f)
+#define IS_SUBL4_SP(x) ((x) == 0x1acf)
+#define IS_MOV_IMM_Rn(x) (((x) & 0xfff0) == 0x7905)
+#define IS_SUB_RnSP(x) (((x) & 0xff0f) == 0x1907)
+#define IS_ADD_RnSP(x) (((x) & 0xff0f) == 0x0907)
+#define IS_PUSH(x) (((x) & 0xfff0) == 0x6df0)
/* If the instruction at PC is an argument register spill, return its
length. Otherwise, return zero.
is used, it could be a byte, word or long move to registers r3-r5. */
static int
-h8300_is_argument_spill (CORE_ADDR pc)
+h8300_is_argument_spill (struct gdbarch *gdbarch, CORE_ADDR pc)
{
- int w = read_memory_unsigned_integer (pc, 2);
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+ int w = read_memory_unsigned_integer (pc, 2, byte_order);
- if (((w & 0xff88) == 0x0c88 /* mov.b Rsl, Rdl */
- || (w & 0xff88) == 0x0d00 /* mov.w Rs, Rd */
- || (w & 0xff88) == 0x0f80) /* mov.l Rs, Rd */
+ if ((IS_MOVB_RnRm (w) || IS_MOVW_RnRm (w) || IS_MOVL_RnRm (w))
&& (w & 0x70) <= 0x20 /* Rs is R0, R1 or R2 */
&& (w & 0x7) >= 0x3 && (w & 0x7) <= 0x5) /* Rd is R3, R4 or R5 */
return 2;
- if ((w & 0xfff0) == 0x6ee0 /* mov.b Rs,@(d:16,er6) */
+ if (IS_MOVB_Rn16_SP (w)
&& 8 <= (w & 0xf) && (w & 0xf) <= 10) /* Rs is R0L, R1L, or R2L */
{
- int w2 = read_memory_integer (pc + 2, 2);
-
/* ... and d:16 is negative. */
- if (w2 < 0)
+ if (read_memory_integer (pc + 2, 2, byte_order) < 0)
return 4;
}
- else if (w == 0x7860)
+ else if (IS_MOVB_EXT (w))
{
- int w2 = read_memory_integer (pc + 2, 2);
-
- if ((w2 & 0xfff0) == 0x6aa0) /* mov.b Rs, @(d:24,er6) */
+ if (IS_MOVB_Rn24_SP (read_memory_unsigned_integer (pc + 2,
+ 2, byte_order)))
{
- LONGEST disp = read_memory_integer (pc + 4, 4);
+ LONGEST disp = read_memory_integer (pc + 4, 4, byte_order);
/* ... and d:24 is negative. */
if (disp < 0 && disp > 0xffffff)
return 8;
}
}
- else if ((w & 0xfff0) == 0x6fe0 /* mov.w Rs,@(d:16,er6) */
+ else if (IS_MOVW_Rn16_SP (w)
&& (w & 0xf) <= 2) /* Rs is R0, R1, or R2 */
{
- int w2 = read_memory_integer (pc + 2, 2);
-
/* ... and d:16 is negative. */
- if (w2 < 0)
+ if (read_memory_integer (pc + 2, 2, byte_order) < 0)
return 4;
}
- else if (w == 0x78e0)
+ else if (IS_MOVW_EXT (w))
{
- int w2 = read_memory_integer (pc + 2, 2);
-
- if ((w2 & 0xfff0) == 0x6ba0) /* mov.b Rs, @(d:24,er6) */
+ if (IS_MOVW_Rn24_SP (read_memory_unsigned_integer (pc + 2,
+ 2, byte_order)))
{
- LONGEST disp = read_memory_integer (pc + 4, 4);
+ LONGEST disp = read_memory_integer (pc + 4, 4, byte_order);
/* ... and d:24 is negative. */
if (disp < 0 && disp > 0xffffff)
return 8;
}
}
- else if (w == 0x0100)
+ else if (IS_MOVL_PRE (w))
{
- int w2 = read_memory_integer (pc + 2, 2);
+ int w2 = read_memory_integer (pc + 2, 2, byte_order);
- if ((w2 & 0xfff0) == 0x6fe0 /* mov.l Rs,@(d:16,er6) */
+ if (IS_MOVL_Rn16_SP (w2)
&& (w2 & 0xf) <= 2) /* Rs is ER0, ER1, or ER2 */
{
- int w3 = read_memory_integer (pc + 4, 2);
-
/* ... and d:16 is negative. */
- if (w3 < 0)
+ if (read_memory_integer (pc + 4, 2, byte_order) < 0)
return 6;
}
- else if (w2 == 0x78e0)
+ else if (IS_MOVL_EXT (w2))
{
- int w3 = read_memory_integer (pc + 4, 2);
-
- if ((w3 & 0xfff0) == 0x6ba0) /* mov.l Rs, @(d:24,er6) */
+ if (IS_MOVL_Rn24_SP (read_memory_integer (pc + 4, 2, byte_order)))
{
- LONGEST disp = read_memory_integer (pc + 6, 4);
+ LONGEST disp = read_memory_integer (pc + 6, 4, byte_order);
/* ... and d:24 is negative. */
if (disp < 0 && disp > 0xffffff)
return 0;
}
-static CORE_ADDR
-h8300_skip_prologue (CORE_ADDR start_pc)
-{
- short int w;
- int adjust = 0;
-
- /* Skip past all push and stm insns. */
- while (1)
- {
- w = read_memory_unsigned_integer (start_pc, 2);
- /* First look for push insns. */
- if (w == 0x0100 || w == 0x0110 || w == 0x0120 || w == 0x0130)
- {
- w = read_memory_unsigned_integer (start_pc + 2, 2);
- adjust = 2;
- }
-
- if (IS_PUSH (w))
- {
- start_pc += 2 + adjust;
- w = read_memory_unsigned_integer (start_pc, 2);
- continue;
- }
- adjust = 0;
- break;
- }
-
- /* Skip past a move to FP, either word or long sized */
- w = read_memory_unsigned_integer (start_pc, 2);
- if (w == 0x0100)
- {
- w = read_memory_unsigned_integer (start_pc + 2, 2);
- adjust += 2;
- }
-
- if (IS_MOVE_FP (w))
- {
- start_pc += 2 + adjust;
- w = read_memory_unsigned_integer (start_pc, 2);
- }
-
- /* Check for loading either a word constant into r5;
- long versions are handled by the SUBL_SP below. */
- if (IS_MOVK_R5 (w))
- {
- start_pc += 2;
- w = read_memory_unsigned_integer (start_pc, 2);
- }
-
- /* Now check for subtracting r5 from sp, word sized only. */
- if (IS_SUB_R5SP (w))
- {
- start_pc += 2 + adjust;
- w = read_memory_unsigned_integer (start_pc, 2);
- }
-
- /* Check for subs #2 and subs #4. */
- while (IS_SUB2_SP (w) || IS_SUB4_SP (w))
- {
- start_pc += 2 + adjust;
- w = read_memory_unsigned_integer (start_pc, 2);
- }
-
- /* Check for a 32bit subtract. */
- if (IS_SUBL_SP (w))
- start_pc += 6 + adjust;
-
- /* Skip past another possible stm insn for registers R3 to R5 (possibly used
- for register qualified arguments. */
- w = read_memory_unsigned_integer (start_pc, 2);
- /* First look for push insns. */
- if (w == 0x0110 || w == 0x0120 || w == 0x0130)
- {
- w = read_memory_unsigned_integer (start_pc + 2, 2);
- if (IS_PUSH (w) && (w & 0xf) >= 0x3 && (w & 0xf) <= 0x5)
- start_pc += 4;
- }
-
- /* Check for spilling an argument register to the stack frame.
- This could also be an initializing store from non-prologue code,
- but I don't think there's any harm in skipping that. */
- for (;;)
- {
- int spill_size = h8300_is_argument_spill (start_pc);
- if (spill_size == 0)
- break;
- start_pc += spill_size;
- }
-
- return start_pc;
-}
-
-static CORE_ADDR
-h8300_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
-{
- char buf[8];
-
- frame_unwind_register (next_frame, E_PC_REGNUM, buf);
- return extract_typed_address (buf, builtin_type_void_func_ptr);
-}
-
-static struct frame_id
-h8300_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
-{
- char buf[4];
- CORE_ADDR fp;
-
- frame_unwind_register (next_frame, E_FP_REGNUM, buf);
- fp = extract_unsigned_integer (buf, 4);
-
- return frame_id_build (fp, frame_pc_unwind (next_frame));
-}
-
-struct h8300_frame_cache
-{
- /* Base address. */
- CORE_ADDR base;
- CORE_ADDR sp_offset;
- CORE_ADDR pc;
-
- /* Saved registers. */
- CORE_ADDR saved_regs[H8300_MAX_NUM_REGS];
- CORE_ADDR saved_sp;
-
- /* Stack space reserved for local variables. */
- long locals;
-};
-
-/* Normal frames. */
-
-/* Allocate and initialize a frame cache. */
-
-static struct h8300_frame_cache *
-h8300_alloc_frame_cache (void)
-{
- struct h8300_frame_cache *cache;
- int i;
-
- cache = FRAME_OBSTACK_ZALLOC (struct h8300_frame_cache);
-
- /* Base address. */
- cache->base = 0;
- cache->sp_offset = -4;
- cache->pc = 0;
-
- /* Saved registers. We initialize these to -1 since zero is a valid
- offset (that's where %fp is supposed to be stored). */
- for (i = 0; i < NUM_REGS; i++)
- cache->saved_regs[i] = -1;
-
- /* Frameless until proven otherwise. */
- cache->locals = -1;
-
- return cache;
-}
-
-/* Check whether PC points at a code that sets up a new stack frame.
- If so, it updates CACHE and returns the address of the first
- instruction after the sequence that sets removes the "hidden"
- argument from the stack or CURRENT_PC, whichever is smaller.
- Otherwise, return PC. */
-
-static CORE_ADDR
-h8300_analyze_frame_setup (CORE_ADDR pc, CORE_ADDR current_pc,
- struct h8300_frame_cache *cache)
-{
- unsigned int op;
- int subs_count;
-
- if (pc >= current_pc)
- return current_pc;
-
- op = read_memory_unsigned_integer (pc, 4);
-
- if (op == 0x6df60d76)
- {
- /* mov.w r6,@-sp; mov.w sp,r6 */
- cache->saved_regs[E_FP_REGNUM] = 0;
- cache->sp_offset += 2;
- op = read_memory_unsigned_integer (pc + 4, 4);
- if (((op >> 16) & 0xfff0) == 0x7900)
- {
- /* mov.w #imm,rN */
- cache->locals = -(short) (op & 0xffff);
- return pc + 8;
- }
- else if ((op >> 16) == 0x1b87)
- {
- /* subs #2,sp */
- for (cache->locals = 0, pc += 4;
- read_memory_unsigned_integer (pc, 2) == 0x1b87;
- pc += 2, cache->locals += 2);
- return pc;
- }
- }
- else if (op == 0x01006df6)
- {
- /* mov.l er6,@-sp */
- op = read_memory_unsigned_integer (pc + 4, 2);
- if (op == 0x0ff6)
- {
- /* mov.l sp,er6 */
- op = read_memory_unsigned_integer (pc + 6, 2);
- if (op == 0x7a17)
- {
- /* add.l #-n,sp */
- cache->locals = -read_memory_unsigned_integer (pc + 8, 4);
- return pc + 12;
- }
- else if (op == 0x1b97)
- {
- /* subs #4,sp */
- for (cache->locals = 0, pc += 6;
- read_memory_unsigned_integer (pc, 2) == 0x1b97;
- pc += 2, cache->locals += 2);
- return pc;
- }
- }
- }
-
- return pc;
-}
-
-/* Check whether PC points at code that saves registers on the stack.
- If so, it updates CACHE and returns the address of the first
- instruction after the register saves or CURRENT_PC, whichever is
- smaller. Otherwise, return PC. */
-
-static CORE_ADDR
-h8300_analyze_register_saves (CORE_ADDR pc, CORE_ADDR current_pc,
- struct h8300_frame_cache *cache)
-{
- if (cache->locals >= 0)
- {
- CORE_ADDR offset;
- int op;
- int i, regno;
-
- offset = -cache->locals;
- while (pc < current_pc)
- {
- op = read_memory_unsigned_integer (pc, 2);
- if ((op & 0xfff0) == 0x6df0)
- {
- /* mov.w rN,@-sp */
- regno = op & 0x000f;
- cache->saved_regs[regno] = offset;
- offset -= 2;
- pc += 2;
- }
- else if (op == 0x0100)
- {
- op = read_memory_unsigned_integer (pc + 2, 2);
- if ((op & 0xfff0) == 0x6df0)
- {
- /* mov.l erN,@-sp */
- regno = op & 0x000f;
- cache->saved_regs[regno] = offset;
- offset -= 4;
- pc += 4;
- }
- else
- break;
- }
- else if ((op & 0xffcf) == 0x0100)
- {
- int op1;
- op1 = read_memory_unsigned_integer (pc + 2, 2);
- if ((op1 & 0xfff0) == 0x6df0)
- {
- /* stm.l reglist,@-sp */
- i = ((op & 0x0030) >> 4) + 1;
- regno = op1 & 0x000f;
- for (; i > 0; regno++, --i)
- {
- cache->saved_regs[regno] = offset;
- offset -= 4;
- }
- pc += 4;
- }
- else
- break;
- }
- else
- break;
- }
- }
- return pc;
-}
-
-
/* Do a full analysis of the prologue at PC and update CACHE
accordingly. Bail out early if CURRENT_PC is reached. Return the
address where the analysis stopped.
mov.l erN,@-sp
stm.l reglist,@-sp
- For setting up the PIC register:
-
- Future equivalence...
-
*/
static CORE_ADDR
-h8300_analyze_prologue (CORE_ADDR pc, CORE_ADDR current_pc,
+h8300_analyze_prologue (struct gdbarch *gdbarch,
+ CORE_ADDR pc, CORE_ADDR current_pc,
struct h8300_frame_cache *cache)
{
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
unsigned int op;
+ int regno, i, spill_size;
+
+ cache->sp_offset = 0;
- pc = h8300_analyze_frame_setup (pc, current_pc, cache);
- pc = h8300_analyze_register_saves (pc, current_pc, cache);
if (pc >= current_pc)
return current_pc;
- /* PIC support */
+ op = read_memory_unsigned_integer (pc, 4, byte_order);
+
+ if (IS_PUSHFP_MOVESPFP (op))
+ {
+ cache->saved_regs[E_FP_REGNUM] = 0;
+ cache->uses_fp = 1;
+ pc += 4;
+ }
+ else if (IS_PUSH_FP (op))
+ {
+ cache->saved_regs[E_FP_REGNUM] = 0;
+ pc += 4;
+ if (pc >= current_pc)
+ return current_pc;
+ op = read_memory_unsigned_integer (pc, 2, byte_order);
+ if (IS_MOV_SP_FP (op))
+ {
+ cache->uses_fp = 1;
+ pc += 2;
+ }
+ }
+
+ while (pc < current_pc)
+ {
+ op = read_memory_unsigned_integer (pc, 2, byte_order);
+ if (IS_SUB2_SP (op))
+ {
+ cache->sp_offset += 2;
+ pc += 2;
+ }
+ else if (IS_SUB4_SP (op))
+ {
+ cache->sp_offset += 4;
+ pc += 2;
+ }
+ else if (IS_ADD_IMM_SP (op))
+ {
+ cache->sp_offset += -read_memory_integer (pc + 2, 2, byte_order);
+ pc += 4;
+ }
+ else if (IS_SUB_IMM_SP (op))
+ {
+ cache->sp_offset += read_memory_integer (pc + 2, 2, byte_order);
+ pc += 4;
+ }
+ else if (IS_SUBL4_SP (op))
+ {
+ cache->sp_offset += 4;
+ pc += 2;
+ }
+ else if (IS_MOV_IMM_Rn (op))
+ {
+ int offset = read_memory_integer (pc + 2, 2, byte_order);
+ regno = op & 0x000f;
+ op = read_memory_unsigned_integer (pc + 4, 2, byte_order);
+ if (IS_ADD_RnSP (op) && (op & 0x00f0) == regno)
+ {
+ cache->sp_offset -= offset;
+ pc += 6;
+ }
+ else if (IS_SUB_RnSP (op) && (op & 0x00f0) == regno)
+ {
+ cache->sp_offset += offset;
+ pc += 6;
+ }
+ else
+ break;
+ }
+ else if (IS_PUSH (op))
+ {
+ regno = op & 0x000f;
+ cache->sp_offset += 2;
+ cache->saved_regs[regno] = cache->sp_offset;
+ pc += 2;
+ }
+ else if (op == 0x0100)
+ {
+ op = read_memory_unsigned_integer (pc + 2, 2, byte_order);
+ if (IS_PUSH (op))
+ {
+ regno = op & 0x000f;
+ cache->sp_offset += 4;
+ cache->saved_regs[regno] = cache->sp_offset;
+ pc += 4;
+ }
+ else
+ break;
+ }
+ else if ((op & 0xffcf) == 0x0100)
+ {
+ int op1;
+ op1 = read_memory_unsigned_integer (pc + 2, 2, byte_order);
+ if (IS_PUSH (op1))
+ {
+ /* Since the prefix is 0x01x0, this is not a simple pushm but a
+ stm.l reglist,@-sp */
+ i = ((op & 0x0030) >> 4) + 1;
+ regno = op1 & 0x000f;
+ for (; i > 0; regno++, --i)
+ {
+ cache->sp_offset += 4;
+ cache->saved_regs[regno] = cache->sp_offset;
+ }
+ pc += 4;
+ }
+ else
+ break;
+ }
+ else
+ break;
+ }
+
+ /* Check for spilling an argument register to the stack frame.
+ This could also be an initializing store from non-prologue code,
+ but I don't think there's any harm in skipping that. */
+ while ((spill_size = h8300_is_argument_spill (gdbarch, pc)) > 0
+ && pc + spill_size <= current_pc)
+ pc += spill_size;
return pc;
}
static struct h8300_frame_cache *
-h8300_frame_cache (struct frame_info *next_frame, void **this_cache)
+h8300_frame_cache (struct frame_info *this_frame, void **this_cache)
{
+ struct gdbarch *gdbarch = get_frame_arch (this_frame);
struct h8300_frame_cache *cache;
- char buf[4];
int i;
+ CORE_ADDR current_pc;
if (*this_cache)
- return *this_cache;
+ return (struct h8300_frame_cache *) *this_cache;
- cache = h8300_alloc_frame_cache ();
+ cache = FRAME_OBSTACK_ZALLOC (struct h8300_frame_cache);
+ h8300_init_frame_cache (gdbarch, cache);
*this_cache = cache;
/* In principle, for normal frames, %fp holds the frame pointer,
which holds the base address for the current stack frame.
However, for functions that don't need it, the frame pointer is
optional. For these "frameless" functions the frame pointer is
- actually the frame pointer of the calling frame. Signal
- trampolines are just a special case of a "frameless" function.
- They (usually) share their frame pointer with the frame that was
- in progress when the signal occurred. */
+ actually the frame pointer of the calling frame. */
- frame_unwind_register (next_frame, E_FP_REGNUM, buf);
- cache->base = extract_unsigned_integer (buf, 4);
+ cache->base = get_frame_register_unsigned (this_frame, E_FP_REGNUM);
if (cache->base == 0)
return cache;
- /* For normal frames, %pc is stored at 4(%fp). */
- cache->saved_regs[E_PC_REGNUM] = 4;
+ cache->saved_regs[E_PC_REGNUM] = -BINWORD (gdbarch);
- cache->pc = frame_func_unwind (next_frame);
+ cache->pc = get_frame_func (this_frame);
+ current_pc = get_frame_pc (this_frame);
if (cache->pc != 0)
- h8300_analyze_prologue (cache->pc, frame_pc_unwind (next_frame), cache);
+ h8300_analyze_prologue (gdbarch, cache->pc, current_pc, cache);
- if (cache->locals < 0)
+ if (!cache->uses_fp)
{
/* We didn't find a valid frame, which means that CACHE->base
currently holds the frame pointer for our calling frame. If
frame by looking at the stack pointer. For truly "frameless"
functions this might work too. */
- frame_unwind_register (next_frame, E_SP_REGNUM, buf);
- cache->base = extract_unsigned_integer (buf, 4) + cache->sp_offset;
+ cache->base = get_frame_register_unsigned (this_frame, E_SP_REGNUM)
+ + cache->sp_offset;
+ cache->saved_sp = cache->base + BINWORD (gdbarch);
+ cache->saved_regs[E_PC_REGNUM] = 0;
+ }
+ else
+ {
+ cache->saved_sp = cache->base + 2 * BINWORD (gdbarch);
+ cache->saved_regs[E_PC_REGNUM] = -BINWORD (gdbarch);
}
-
- /* Now that we have the base address for the stack frame we can
- calculate the value of %sp in the calling frame. */
- cache->saved_sp = cache->base;
/* Adjust all the saved registers such that they contain addresses
instead of offsets. */
- for (i = 0; i < NUM_REGS; i++)
+ for (i = 0; i < gdbarch_num_regs (gdbarch); i++)
if (cache->saved_regs[i] != -1)
- cache->saved_regs[i] += cache->base;
+ cache->saved_regs[i] = cache->base - cache->saved_regs[i];
return cache;
}
static void
-h8300_frame_this_id (struct frame_info *next_frame, void **this_cache,
+h8300_frame_this_id (struct frame_info *this_frame, void **this_cache,
struct frame_id *this_id)
{
struct h8300_frame_cache *cache =
- h8300_frame_cache (next_frame, this_cache);
+ h8300_frame_cache (this_frame, this_cache);
/* This marks the outermost frame. */
if (cache->base == 0)
return;
- /* See the end of m68k_push_dummy_call. */
- *this_id = frame_id_build (cache->base, cache->pc);
+ *this_id = frame_id_build (cache->saved_sp, cache->pc);
}
-static void
-h8300_frame_prev_register (struct frame_info *next_frame, void **this_cache,
- int regnum, int *optimizedp,
- enum lval_type *lvalp, CORE_ADDR *addrp,
- int *realnump, void *valuep)
+static struct value *
+h8300_frame_prev_register (struct frame_info *this_frame, void **this_cache,
+ int regnum)
{
+ struct gdbarch *gdbarch = get_frame_arch (this_frame);
struct h8300_frame_cache *cache =
- h8300_frame_cache (next_frame, this_cache);
+ h8300_frame_cache (this_frame, this_cache);
gdb_assert (regnum >= 0);
if (regnum == E_SP_REGNUM && cache->saved_sp)
- {
- *optimizedp = 0;
- *lvalp = not_lval;
- *addrp = 0;
- *realnump = -1;
- if (valuep)
- {
- /* Store the value. */
- store_unsigned_integer (valuep, 4, cache->saved_sp);
- }
- return;
- }
+ return frame_unwind_got_constant (this_frame, regnum, cache->saved_sp);
- if (regnum < NUM_REGS && cache->saved_regs[regnum] != -1)
- {
- *optimizedp = 0;
- *lvalp = lval_memory;
- *addrp = cache->saved_regs[regnum];
- *realnump = -1;
- if (valuep)
- {
- /* Read the value in from memory. */
- read_memory (*addrp, valuep,
- register_size (current_gdbarch, regnum));
- }
- return;
- }
+ if (regnum < gdbarch_num_regs (gdbarch)
+ && cache->saved_regs[regnum] != -1)
+ return frame_unwind_got_memory (this_frame, regnum,
+ cache->saved_regs[regnum]);
- frame_register_unwind (next_frame, regnum,
- optimizedp, lvalp, addrp, realnump, valuep);
+ return frame_unwind_got_register (this_frame, regnum, regnum);
}
static const struct frame_unwind h8300_frame_unwind = {
NORMAL_FRAME,
+ default_frame_unwind_stop_reason,
h8300_frame_this_id,
- h8300_frame_prev_register
+ h8300_frame_prev_register,
+ NULL,
+ default_frame_sniffer
+};
+
+static CORE_ADDR
+h8300_frame_base_address (struct frame_info *this_frame, void **this_cache)
+{
+ struct h8300_frame_cache *cache = h8300_frame_cache (this_frame, this_cache);
+ return cache->base;
+}
+
+static const struct frame_base h8300_frame_base = {
+ &h8300_frame_unwind,
+ h8300_frame_base_address,
+ h8300_frame_base_address,
+ h8300_frame_base_address
};
-static const struct frame_unwind *
-h8300_frame_sniffer (struct frame_info *next_frame)
+static CORE_ADDR
+h8300_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
{
- return &h8300_frame_unwind;
+ CORE_ADDR func_addr = 0 , func_end = 0;
+
+ if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
+ {
+ struct symtab_and_line sal;
+ struct h8300_frame_cache cache;
+
+ /* Found a function. */
+ sal = find_pc_line (func_addr, 0);
+ if (sal.end && sal.end < func_end)
+ /* Found a line number, use it as end of prologue. */
+ return sal.end;
+
+ /* No useable line symbol. Use prologue parsing method. */
+ h8300_init_frame_cache (gdbarch, &cache);
+ return h8300_analyze_prologue (gdbarch, func_addr, func_end, &cache);
+ }
+
+ /* No function symbol -- just return the PC. */
+ return (CORE_ADDR) pc;
}
/* Function: push_dummy_call
h8300_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
struct regcache *regcache, CORE_ADDR bp_addr,
int nargs, struct value **args, CORE_ADDR sp,
- int struct_return, CORE_ADDR struct_addr)
+ function_call_return_method return_method,
+ CORE_ADDR struct_addr)
{
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
int stack_alloc = 0, stack_offset = 0;
- int wordsize = BINWORD;
+ int wordsize = BINWORD (gdbarch);
int reg = E_ARG0_REGNUM;
int argument;
If we're returning a structure by value, then we must pass a
pointer to the buffer for the return value as an invisible first
argument. */
- if (struct_return)
+ if (return_method == return_method_struct)
regcache_cooked_write_unsigned (regcache, reg++, struct_addr);
for (argument = 0; argument < nargs; argument++)
/* Pad the argument appropriately. */
int padded_len = align_up (len, wordsize);
- char *padded = alloca (padded_len);
+ /* Use std::vector here to get zero initialization. */
+ std::vector<gdb_byte> padded (padded_len);
- memset (padded, 0, padded_len);
- memcpy (len < wordsize ? padded + padded_len - len : padded,
+ memcpy ((len < wordsize ? padded.data () + padded_len - len
+ : padded.data ()),
contents, len);
/* Could the argument fit in the remaining registers? */
if (len > wordsize && len % wordsize)
{
/* I feel so unclean. */
- write_memory (sp + stack_offset, padded, padded_len);
+ write_memory (sp + stack_offset, padded.data (), padded_len);
stack_offset += padded_len;
/* That's right --- even though we passed the argument
else
{
/* Heavens to Betsy --- it's really going in registers!
- It would be nice if we could use write_register_bytes
- here, but on the h8/300s, there are gaps between
- the registers in the register file. */
+ Note that on the h8/300s, there are gaps between the
+ registers in the register file. */
int offset;
for (offset = 0; offset < padded_len; offset += wordsize)
{
- ULONGEST word = extract_unsigned_integer (padded + offset,
- wordsize);
+ ULONGEST word
+ = extract_unsigned_integer (&padded[offset],
+ wordsize, byte_order);
regcache_cooked_write_unsigned (regcache, reg++, word);
}
}
else
{
/* It doesn't fit in registers! Onto the stack it goes. */
- write_memory (sp + stack_offset, padded, padded_len);
+ write_memory (sp + stack_offset, padded.data (), padded_len);
stack_offset += padded_len;
/* Once one argument has spilled onto the stack, all
/* Store return address. */
sp -= wordsize;
- write_memory_unsigned_integer (sp, wordsize, bp_addr);
+ write_memory_unsigned_integer (sp, wordsize, byte_order, bp_addr);
/* Update stack pointer. */
regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp);
- return sp;
+ /* Return the new stack pointer minus the return address slot since
+ that's what DWARF2/GCC uses as the frame's CFA. */
+ return sp + wordsize;
}
/* Function: extract_return_value
static void
h8300_extract_return_value (struct type *type, struct regcache *regcache,
- void *valbuf)
+ gdb_byte *valbuf)
{
+ struct gdbarch *gdbarch = regcache->arch ();
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
int len = TYPE_LENGTH (type);
ULONGEST c, addr;
case 1:
case 2:
regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
- store_unsigned_integer (valbuf, len, c);
+ store_unsigned_integer (valbuf, len, byte_order, c);
break;
case 4: /* Needs two registers on plain H8/300 */
regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
- store_unsigned_integer (valbuf, 2, c);
+ store_unsigned_integer (valbuf, 2, byte_order, c);
regcache_cooked_read_unsigned (regcache, E_RET1_REGNUM, &c);
- store_unsigned_integer ((void *) ((char *) valbuf + 2), 2, c);
+ store_unsigned_integer (valbuf + 2, 2, byte_order, c);
break;
case 8: /* long long is now 8 bytes. */
if (TYPE_CODE (type) == TYPE_CODE_INT)
{
regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &addr);
- c = read_memory_unsigned_integer ((CORE_ADDR) addr, len);
- store_unsigned_integer (valbuf, len, c);
+ c = read_memory_unsigned_integer ((CORE_ADDR) addr, len, byte_order);
+ store_unsigned_integer (valbuf, len, byte_order, c);
}
else
{
- error ("I don't know how this 8 byte value is returned.");
+ error (_("I don't know how this 8 byte value is returned."));
}
break;
}
static void
h8300h_extract_return_value (struct type *type, struct regcache *regcache,
- void *valbuf)
+ gdb_byte *valbuf)
{
- int len = TYPE_LENGTH (type);
- ULONGEST c, addr;
+ struct gdbarch *gdbarch = regcache->arch ();
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+ ULONGEST c;
- switch (len)
+ switch (TYPE_LENGTH (type))
{
case 1:
case 2:
case 4:
regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
- store_unsigned_integer (valbuf, len, c);
+ store_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order, c);
break;
case 8: /* long long is now 8 bytes. */
if (TYPE_CODE (type) == TYPE_CODE_INT)
{
- regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &addr);
- c = read_memory_unsigned_integer ((CORE_ADDR) addr, len);
- store_unsigned_integer (valbuf, len, c);
+ regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
+ store_unsigned_integer (valbuf, 4, byte_order, c);
+ regcache_cooked_read_unsigned (regcache, E_RET1_REGNUM, &c);
+ store_unsigned_integer (valbuf + 4, 4, byte_order, c);
}
else
{
- error ("I don't know how this 8 byte value is returned.");
+ error (_("I don't know how this 8 byte value is returned."));
}
break;
}
}
+static int
+h8300_use_struct_convention (struct type *value_type)
+{
+ /* Types of 1, 2 or 4 bytes are returned in R0/R1, everything else on the
+ stack. */
+
+ if (TYPE_CODE (value_type) == TYPE_CODE_STRUCT
+ || TYPE_CODE (value_type) == TYPE_CODE_UNION)
+ return 1;
+ return !(TYPE_LENGTH (value_type) == 1
+ || TYPE_LENGTH (value_type) == 2
+ || TYPE_LENGTH (value_type) == 4);
+}
+
+static int
+h8300h_use_struct_convention (struct type *value_type)
+{
+ /* Types of 1, 2 or 4 bytes are returned in R0, INT types of 8 bytes are
+ returned in R0/R1, everything else on the stack. */
+ if (TYPE_CODE (value_type) == TYPE_CODE_STRUCT
+ || TYPE_CODE (value_type) == TYPE_CODE_UNION)
+ return 1;
+ return !(TYPE_LENGTH (value_type) == 1
+ || TYPE_LENGTH (value_type) == 2
+ || TYPE_LENGTH (value_type) == 4
+ || (TYPE_LENGTH (value_type) == 8
+ && TYPE_CODE (value_type) == TYPE_CODE_INT));
+}
/* Function: store_return_value
Place the appropriate value in the appropriate registers.
static void
h8300_store_return_value (struct type *type, struct regcache *regcache,
- const void *valbuf)
+ const gdb_byte *valbuf)
{
- int len = TYPE_LENGTH (type);
+ struct gdbarch *gdbarch = regcache->arch ();
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
ULONGEST val;
- switch (len)
+ switch (TYPE_LENGTH (type))
{
case 1:
- case 2: /* short... */
- val = extract_unsigned_integer (valbuf, len);
+ case 2: /* short... */
+ val = extract_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order);
regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, val);
break;
case 4: /* long, float */
- val = extract_unsigned_integer (valbuf, len);
+ val = extract_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order);
regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM,
(val >> 16) & 0xffff);
regcache_cooked_write_unsigned (regcache, E_RET1_REGNUM, val & 0xffff);
break;
- case 8: /* long long, double and long double are all defined
- as 4 byte types so far so this shouldn't happen. */
- error ("I don't know how to return an 8 byte value.");
+ case 8: /* long long, double and long double
+ are all defined as 4 byte types so
+ far so this shouldn't happen. */
+ error (_("I don't know how to return an 8 byte value."));
break;
}
}
static void
h8300h_store_return_value (struct type *type, struct regcache *regcache,
- const void *valbuf)
+ const gdb_byte *valbuf)
{
- int len = TYPE_LENGTH (type);
+ struct gdbarch *gdbarch = regcache->arch ();
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
ULONGEST val;
- switch (len)
+ switch (TYPE_LENGTH (type))
{
case 1:
case 2:
case 4: /* long, float */
- val = extract_unsigned_integer (valbuf, len);
+ val = extract_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order);
regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, val);
break;
- case 8: /* long long, double and long double are all defined
- as 4 byte types so far so this shouldn't happen. */
- error ("I don't know how to return an 8 byte value.");
+ case 8:
+ val = extract_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order);
+ regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM,
+ (val >> 32) & 0xffffffff);
+ regcache_cooked_write_unsigned (regcache, E_RET1_REGNUM,
+ val & 0xffffffff);
break;
}
}
-static struct cmd_list_element *setmachinelist;
+static enum return_value_convention
+h8300_return_value (struct gdbarch *gdbarch, struct value *function,
+ struct type *type, struct regcache *regcache,
+ gdb_byte *readbuf, const gdb_byte *writebuf)
+{
+ if (h8300_use_struct_convention (type))
+ return RETURN_VALUE_STRUCT_CONVENTION;
+ if (writebuf)
+ h8300_store_return_value (type, regcache, writebuf);
+ else if (readbuf)
+ h8300_extract_return_value (type, regcache, readbuf);
+ return RETURN_VALUE_REGISTER_CONVENTION;
+}
+
+static enum return_value_convention
+h8300h_return_value (struct gdbarch *gdbarch, struct value *function,
+ struct type *type, struct regcache *regcache,
+ gdb_byte *readbuf, const gdb_byte *writebuf)
+{
+ if (h8300h_use_struct_convention (type))
+ {
+ if (readbuf)
+ {
+ ULONGEST addr;
+
+ regcache_raw_read_unsigned (regcache, E_R0_REGNUM, &addr);
+ read_memory (addr, readbuf, TYPE_LENGTH (type));
+ }
+
+ return RETURN_VALUE_ABI_RETURNS_ADDRESS;
+ }
+ if (writebuf)
+ h8300h_store_return_value (type, regcache, writebuf);
+ else if (readbuf)
+ h8300h_extract_return_value (type, regcache, readbuf);
+ return RETURN_VALUE_REGISTER_CONVENTION;
+}
+
+/* Implementation of 'register_sim_regno' gdbarch method. */
+
+static int
+h8300_register_sim_regno (struct gdbarch *gdbarch, int regnum)
+{
+ /* Only makes sense to supply raw registers. */
+ gdb_assert (regnum >= 0 && regnum < gdbarch_num_regs (gdbarch));
+
+ /* We hide the raw ccr from the user by making it nameless. Because
+ the default register_sim_regno hook returns
+ LEGACY_SIM_REGNO_IGNORE for unnamed registers, we need to
+ override it. The sim register numbering is compatible with
+ gdb's. */
+ return regnum;
+}
+
+static const char *
+h8300_register_name_common (const char *regnames[], int numregs,
+ struct gdbarch *gdbarch, int regno)
+{
+ if (regno < 0
+ || regno >= numregs)
+ internal_error (__FILE__, __LINE__,
+ _("h8300_register_name_common: illegal register number %d"),
+ regno);
+ else
+ return regnames[regno];
+}
static const char *
-h8300_register_name (int regno)
+h8300_register_name (struct gdbarch *gdbarch, int regno)
{
/* The register names change depending on which h8300 processor
- type is selected. */
- static char *register_names[] = {
+ type is selected. */
+ static const char *register_names[] = {
"r0", "r1", "r2", "r3", "r4", "r5", "r6",
"sp", "", "pc", "cycles", "tick", "inst",
"ccr", /* pseudo register */
};
- if (regno < 0
- || regno >= (sizeof (register_names) / sizeof (*register_names)))
- internal_error (__FILE__, __LINE__,
- "h8300_register_name: illegal register number %d", regno);
- else
- return register_names[regno];
+ return h8300_register_name_common(register_names, ARRAY_SIZE(register_names),
+ gdbarch, regno);
+}
+
+static const char *
+h8300h_register_name (struct gdbarch *gdbarch, int regno)
+{
+ static const char *register_names[] = {
+ "er0", "er1", "er2", "er3", "er4", "er5", "er6",
+ "sp", "", "pc", "cycles", "tick", "inst",
+ "ccr", /* pseudo register */
+ };
+ return h8300_register_name_common(register_names, ARRAY_SIZE(register_names),
+ gdbarch, regno);
}
static const char *
-h8300s_register_name (int regno)
+h8300s_register_name (struct gdbarch *gdbarch, int regno)
{
- static char *register_names[] = {
+ static const char *register_names[] = {
"er0", "er1", "er2", "er3", "er4", "er5", "er6",
"sp", "", "pc", "cycles", "", "tick", "inst",
"mach", "macl",
"ccr", "exr" /* pseudo registers */
};
- if (regno < 0
- || regno >= (sizeof (register_names) / sizeof (*register_names)))
- internal_error (__FILE__, __LINE__,
- "h8300s_register_name: illegal register number %d",
- regno);
- else
- return register_names[regno];
+ return h8300_register_name_common(register_names, ARRAY_SIZE(register_names),
+ gdbarch, regno);
}
static const char *
-h8300sx_register_name (int regno)
+h8300sx_register_name (struct gdbarch *gdbarch, int regno)
{
- static char *register_names[] = {
+ static const char *register_names[] = {
"er0", "er1", "er2", "er3", "er4", "er5", "er6",
"sp", "", "pc", "cycles", "", "tick", "inst",
"mach", "macl", "sbr", "vbr",
"ccr", "exr" /* pseudo registers */
};
- if (regno < 0
- || regno >= (sizeof (register_names) / sizeof (*register_names)))
- internal_error (__FILE__, __LINE__,
- "h8300sx_register_name: illegal register number %d",
- regno);
- else
- return register_names[regno];
+ return h8300_register_name_common(register_names, ARRAY_SIZE(register_names),
+ gdbarch, regno);
}
static void
rval = get_frame_register_signed (frame, regno);
fprintf_filtered (file, "%-14s ", name);
- if ((regno == E_PSEUDO_CCR_REGNUM) || \
- (regno == E_PSEUDO_EXR_REGNUM && is_h8300smode (current_gdbarch)))
+ if ((regno == E_PSEUDO_CCR_REGNUM (gdbarch)) || \
+ (regno == E_PSEUDO_EXR_REGNUM (gdbarch) && is_h8300smode (gdbarch)))
{
fprintf_filtered (file, "0x%02x ", (unsigned char) rval);
print_longest (file, 'u', 1, rval);
}
else
{
- fprintf_filtered (file, "0x%s ", phex ((ULONGEST) rval, BINWORD));
+ fprintf_filtered (file, "0x%s ", phex ((ULONGEST) rval,
+ BINWORD (gdbarch)));
print_longest (file, 'd', 1, rval);
}
- if (regno == E_PSEUDO_CCR_REGNUM)
+ if (regno == E_PSEUDO_CCR_REGNUM (gdbarch))
{
/* CCR register */
int C, Z, N, V;
fprintf_filtered (file, "u> ");
if ((C | Z) == 1)
fprintf_filtered (file, "u<= ");
- if ((C == 0))
+ if (C == 0)
fprintf_filtered (file, "u>= ");
if (C == 1)
fprintf_filtered (file, "u< ");
if ((Z | (N ^ V)) == 1)
fprintf_filtered (file, "<= ");
}
- else if (regno == E_PSEUDO_EXR_REGNUM && is_h8300smode (current_gdbarch))
+ else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch) && is_h8300smode (gdbarch))
{
/* EXR register */
unsigned char l = rval & 0xff;
{
for (regno = E_R0_REGNUM; regno <= E_SP_REGNUM; ++regno)
h8300_print_register (gdbarch, file, frame, regno);
- h8300_print_register (gdbarch, file, frame, E_PSEUDO_CCR_REGNUM);
+ h8300_print_register (gdbarch, file, frame,
+ E_PSEUDO_CCR_REGNUM (gdbarch));
h8300_print_register (gdbarch, file, frame, E_PC_REGNUM);
- if (is_h8300smode (current_gdbarch))
+ if (is_h8300smode (gdbarch))
{
- h8300_print_register (gdbarch, file, frame, E_PSEUDO_EXR_REGNUM);
- if (is_h8300sxmode (current_gdbarch))
+ h8300_print_register (gdbarch, file, frame,
+ E_PSEUDO_EXR_REGNUM (gdbarch));
+ if (is_h8300sxmode (gdbarch))
{
h8300_print_register (gdbarch, file, frame, E_SBR_REGNUM);
h8300_print_register (gdbarch, file, frame, E_VBR_REGNUM);
else
{
if (regno == E_CCR_REGNUM)
- h8300_print_register (gdbarch, file, frame, E_PSEUDO_CCR_REGNUM);
- else if (regno == E_PSEUDO_EXR_REGNUM
- && is_h8300smode (current_gdbarch))
- h8300_print_register (gdbarch, file, frame, E_PSEUDO_EXR_REGNUM);
+ h8300_print_register (gdbarch, file, frame,
+ E_PSEUDO_CCR_REGNUM (gdbarch));
+ else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch)
+ && is_h8300smode (gdbarch))
+ h8300_print_register (gdbarch, file, frame,
+ E_PSEUDO_EXR_REGNUM (gdbarch));
else
h8300_print_register (gdbarch, file, frame, regno);
}
static struct type *
h8300_register_type (struct gdbarch *gdbarch, int regno)
{
- if (regno < 0 || regno >= NUM_REGS + NUM_PSEUDO_REGS)
+ if (regno < 0 || regno >= gdbarch_num_cooked_regs (gdbarch))
internal_error (__FILE__, __LINE__,
- "h8300_register_type: illegal register number %d", regno);
+ _("h8300_register_type: illegal register number %d"),
+ regno);
else
{
switch (regno)
{
case E_PC_REGNUM:
- return builtin_type_void_func_ptr;
+ return builtin_type (gdbarch)->builtin_func_ptr;
case E_SP_REGNUM:
case E_FP_REGNUM:
- return builtin_type_void_data_ptr;
+ return builtin_type (gdbarch)->builtin_data_ptr;
default:
- if (regno == E_PSEUDO_CCR_REGNUM)
- return builtin_type_uint8;
- else if (regno == E_PSEUDO_EXR_REGNUM)
- return builtin_type_uint8;
- else if (is_h8300hmode (current_gdbarch))
- return builtin_type_int32;
+ if (regno == E_PSEUDO_CCR_REGNUM (gdbarch))
+ return builtin_type (gdbarch)->builtin_uint8;
+ else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch))
+ return builtin_type (gdbarch)->builtin_uint8;
+ else if (is_h8300hmode (gdbarch))
+ return builtin_type (gdbarch)->builtin_int32;
else
- return builtin_type_int16;
+ return builtin_type (gdbarch)->builtin_int16;
}
}
}
+/* Helpers for h8300_pseudo_register_read. We expose ccr/exr as
+ pseudo-registers to users with smaller sizes than the corresponding
+ raw registers. These helpers extend/narrow the values. */
+
+static enum register_status
+pseudo_from_raw_register (struct gdbarch *gdbarch, readable_regcache *regcache,
+ gdb_byte *buf, int pseudo_regno, int raw_regno)
+{
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+ enum register_status status;
+ ULONGEST val;
+
+ status = regcache->raw_read (raw_regno, &val);
+ if (status == REG_VALID)
+ store_unsigned_integer (buf,
+ register_size (gdbarch, pseudo_regno),
+ byte_order, val);
+ return status;
+}
+
+/* See pseudo_from_raw_register. */
+
static void
+raw_from_pseudo_register (struct gdbarch *gdbarch, struct regcache *regcache,
+ const gdb_byte *buf, int raw_regno, int pseudo_regno)
+{
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+ ULONGEST val;
+
+ val = extract_unsigned_integer (buf, register_size (gdbarch, pseudo_regno),
+ byte_order);
+ regcache_raw_write_unsigned (regcache, raw_regno, val);
+}
+
+static enum register_status
h8300_pseudo_register_read (struct gdbarch *gdbarch,
- struct regcache *regcache, int regno, void *buf)
+ readable_regcache *regcache, int regno,
+ gdb_byte *buf)
{
- if (regno == E_PSEUDO_CCR_REGNUM)
- regcache_raw_read (regcache, E_CCR_REGNUM, buf);
- else if (regno == E_PSEUDO_EXR_REGNUM)
- regcache_raw_read (regcache, E_EXR_REGNUM, buf);
+ if (regno == E_PSEUDO_CCR_REGNUM (gdbarch))
+ {
+ return pseudo_from_raw_register (gdbarch, regcache, buf,
+ regno, E_CCR_REGNUM);
+ }
+ else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch))
+ {
+ return pseudo_from_raw_register (gdbarch, regcache, buf,
+ regno, E_EXR_REGNUM);
+ }
else
- regcache_raw_read (regcache, regno, buf);
+ return regcache->raw_read (regno, buf);
}
static void
h8300_pseudo_register_write (struct gdbarch *gdbarch,
struct regcache *regcache, int regno,
- const void *buf)
+ const gdb_byte *buf)
{
- if (regno == E_PSEUDO_CCR_REGNUM)
- regcache_raw_write (regcache, E_CCR_REGNUM, buf);
- else if (regno == E_PSEUDO_EXR_REGNUM)
- regcache_raw_write (regcache, E_EXR_REGNUM, buf);
+ if (regno == E_PSEUDO_CCR_REGNUM (gdbarch))
+ raw_from_pseudo_register (gdbarch, regcache, buf, E_CCR_REGNUM, regno);
+ else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch))
+ raw_from_pseudo_register (gdbarch, regcache, buf, E_EXR_REGNUM, regno);
else
- regcache_raw_write (regcache, regno, buf);
+ regcache->raw_write (regno, buf);
}
static int
-h8300_dbg_reg_to_regnum (int regno)
+h8300_dbg_reg_to_regnum (struct gdbarch *gdbarch, int regno)
{
if (regno == E_CCR_REGNUM)
- return E_PSEUDO_CCR_REGNUM;
+ return E_PSEUDO_CCR_REGNUM (gdbarch);
return regno;
}
static int
-h8300s_dbg_reg_to_regnum (int regno)
+h8300s_dbg_reg_to_regnum (struct gdbarch *gdbarch, int regno)
{
if (regno == E_CCR_REGNUM)
- return E_PSEUDO_CCR_REGNUM;
+ return E_PSEUDO_CCR_REGNUM (gdbarch);
if (regno == E_EXR_REGNUM)
- return E_PSEUDO_EXR_REGNUM;
+ return E_PSEUDO_EXR_REGNUM (gdbarch);
return regno;
}
-static CORE_ADDR
-h8300_extract_struct_value_address (struct regcache *regcache)
-{
- ULONGEST addr;
- regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &addr);
- return addr;
-}
-
-const static unsigned char *
-h8300_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
-{
- /*static unsigned char breakpoint[] = { 0x7A, 0xFF }; *//* ??? */
- static unsigned char breakpoint[] = { 0x01, 0x80 }; /* Sleep */
-
- *lenptr = sizeof (breakpoint);
- return breakpoint;
-}
-
-static CORE_ADDR
-h8300_push_dummy_code (struct gdbarch *gdbarch,
- CORE_ADDR sp, CORE_ADDR funaddr, int using_gcc,
- struct value **args, int nargs,
- struct type *value_type,
- CORE_ADDR *real_pc, CORE_ADDR *bp_addr)
-{
- /* Allocate space sufficient for a breakpoint. */
- sp = (sp - 2) & ~1;
- /* Store the address of that breakpoint */
- *bp_addr = sp;
- /* h8300 always starts the call at the callee's entry point. */
- *real_pc = funaddr;
- return sp;
-}
+/*static unsigned char breakpoint[] = { 0x7A, 0xFF }; *//* ??? */
+constexpr gdb_byte h8300_break_insn[] = { 0x01, 0x80 }; /* Sleep */
-static void
-h8300_print_float_info (struct gdbarch *gdbarch, struct ui_file *file,
- struct frame_info *frame, const char *args)
-{
- fprintf_filtered (file, "\
-No floating-point info available for this processor.\n");
-}
+typedef BP_MANIPULATION (h8300_break_insn) h8300_breakpoint;
static struct gdbarch *
h8300_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
{
- struct gdbarch_tdep *tdep = NULL;
struct gdbarch *gdbarch;
arches = gdbarch_list_lookup_by_info (arches, &info);
if (arches != NULL)
return arches->gdbarch;
-#if 0
- tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
-#endif
-
if (info.bfd_arch_info->arch != bfd_arch_h8300)
return NULL;
gdbarch = gdbarch_alloc (&info, 0);
+ set_gdbarch_register_sim_regno (gdbarch, h8300_register_sim_regno);
+
switch (info.bfd_arch_info->mach)
{
case bfd_mach_h8300:
set_gdbarch_num_regs (gdbarch, 13);
set_gdbarch_num_pseudo_regs (gdbarch, 1);
- set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
- set_gdbarch_dwarf_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
set_gdbarch_stab_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
set_gdbarch_register_name (gdbarch, h8300_register_name);
set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
- set_gdbarch_extract_return_value (gdbarch, h8300_extract_return_value);
- set_gdbarch_store_return_value (gdbarch, h8300_store_return_value);
- set_gdbarch_print_insn (gdbarch, print_insn_h8300);
+ set_gdbarch_return_value (gdbarch, h8300_return_value);
break;
case bfd_mach_h8300h:
case bfd_mach_h8300hn:
set_gdbarch_num_regs (gdbarch, 13);
set_gdbarch_num_pseudo_regs (gdbarch, 1);
- set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
- set_gdbarch_dwarf_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
set_gdbarch_stab_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
- set_gdbarch_register_name (gdbarch, h8300_register_name);
+ set_gdbarch_register_name (gdbarch, h8300h_register_name);
if (info.bfd_arch_info->mach != bfd_mach_h8300hn)
{
set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
}
- set_gdbarch_extract_return_value (gdbarch, h8300h_extract_return_value);
- set_gdbarch_store_return_value (gdbarch, h8300h_store_return_value);
- set_gdbarch_print_insn (gdbarch, print_insn_h8300h);
+ set_gdbarch_return_value (gdbarch, h8300h_return_value);
break;
case bfd_mach_h8300s:
case bfd_mach_h8300sn:
set_gdbarch_num_regs (gdbarch, 16);
set_gdbarch_num_pseudo_regs (gdbarch, 2);
- set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
- set_gdbarch_dwarf_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
set_gdbarch_stab_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
set_gdbarch_register_name (gdbarch, h8300s_register_name);
set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
}
- set_gdbarch_extract_return_value (gdbarch, h8300h_extract_return_value);
- set_gdbarch_store_return_value (gdbarch, h8300h_store_return_value);
- set_gdbarch_print_insn (gdbarch, print_insn_h8300s);
+ set_gdbarch_return_value (gdbarch, h8300h_return_value);
break;
case bfd_mach_h8300sx:
case bfd_mach_h8300sxn:
set_gdbarch_num_regs (gdbarch, 18);
set_gdbarch_num_pseudo_regs (gdbarch, 2);
- set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
- set_gdbarch_dwarf_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
set_gdbarch_stab_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
set_gdbarch_register_name (gdbarch, h8300sx_register_name);
set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
}
- set_gdbarch_extract_return_value (gdbarch, h8300h_extract_return_value);
- set_gdbarch_store_return_value (gdbarch, h8300h_store_return_value);
- set_gdbarch_print_insn (gdbarch, print_insn_h8300s);
+ set_gdbarch_return_value (gdbarch, h8300h_return_value);
break;
}
*/
set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM);
- set_gdbarch_deprecated_fp_regnum (gdbarch, E_FP_REGNUM);
set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM);
set_gdbarch_register_type (gdbarch, h8300_register_type);
set_gdbarch_print_registers_info (gdbarch, h8300_print_registers_info);
- set_gdbarch_print_float_info (gdbarch, h8300_print_float_info);
/*
* Frame Info
set_gdbarch_skip_prologue (gdbarch, h8300_skip_prologue);
/* Frame unwinder. */
- set_gdbarch_unwind_dummy_id (gdbarch, h8300_unwind_dummy_id);
- set_gdbarch_unwind_pc (gdbarch, h8300_unwind_pc);
-
- /* Hook in the DWARF CFI frame unwinder. */
- frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer);
+ frame_base_set_default (gdbarch, &h8300_frame_base);
/*
- * Miscelany
+ * Miscellany
*/
- /* Stack grows up. */
+ /* Stack grows up. */
set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
- set_gdbarch_deprecated_extract_struct_value_address (gdbarch,
- h8300_extract_struct_value_address);
- set_gdbarch_deprecated_use_struct_convention (gdbarch,
- always_use_struct_convention);
- set_gdbarch_breakpoint_from_pc (gdbarch, h8300_breakpoint_from_pc);
- set_gdbarch_push_dummy_code (gdbarch, h8300_push_dummy_code);
+ set_gdbarch_breakpoint_kind_from_pc (gdbarch,
+ h8300_breakpoint::kind_from_pc);
+ set_gdbarch_sw_breakpoint_from_kind (gdbarch,
+ h8300_breakpoint::bp_from_kind);
set_gdbarch_push_dummy_call (gdbarch, h8300_push_dummy_call);
+ set_gdbarch_char_signed (gdbarch, 0);
set_gdbarch_int_bit (gdbarch, 2 * TARGET_CHAR_BIT);
set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
+
+ set_gdbarch_wchar_bit (gdbarch, 2 * TARGET_CHAR_BIT);
+ set_gdbarch_wchar_signed (gdbarch, 0);
+
set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
+ set_gdbarch_double_format (gdbarch, floatformats_ieee_single);
set_gdbarch_long_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
+ set_gdbarch_long_double_format (gdbarch, floatformats_ieee_single);
set_gdbarch_believe_pcc_promotion (gdbarch, 1);
- /* Char is unsigned. */
- set_gdbarch_char_signed (gdbarch, 0);
-
- frame_unwind_append_sniffer (gdbarch, h8300_frame_sniffer);
+ /* Hook in the DWARF CFI frame unwinder. */
+ dwarf2_append_unwinders (gdbarch);
+ frame_unwind_append_unwinder (gdbarch, &h8300_frame_unwind);
return gdbarch;
}
-extern initialize_file_ftype _initialize_h8300_tdep; /* -Wmissing-prototypes */
-
void
_initialize_h8300_tdep (void)
{
projects / deliverable / binutils-gdb.git / blobdiff