gdb::noop_deleter<hppa_objfile_private>>
hppa_objfile_priv_data;
-/* Get at various relevent fields of an instruction word. */
+/* Get at various relevant fields of an instruction word. */
#define MASK_5 0x1f
#define MASK_11 0x7ff
#define MASK_14 0x3fff
/* For reasons unknown the HP PA64 tools generate multiple unwinder
sections in a single executable. So we just iterate over every
- section in the BFD looking for unwinder sections intead of trying
+ section in the BFD looking for unwinder sections instead of trying
to do a lookup with bfd_get_section_by_name.
First determine the total size of the unwind tables so that we
if (strcmp (unwind_sec->name, "$UNWIND_START$") == 0
|| strcmp (unwind_sec->name, ".PARISC.unwind") == 0)
{
- unwind_size = bfd_section_size (objfile->obfd, unwind_sec);
+ unwind_size = bfd_section_size (unwind_sec);
unwind_entries = unwind_size / UNWIND_ENTRY_SIZE;
total_entries += unwind_entries;
if (stub_unwind_sec)
{
- stub_unwind_size = bfd_section_size (objfile->obfd, stub_unwind_sec);
+ stub_unwind_size = bfd_section_size (stub_unwind_sec);
stub_entries = stub_unwind_size / STUB_UNWIND_ENTRY_SIZE;
}
else
if (strcmp (unwind_sec->name, "$UNWIND_START$") == 0
|| strcmp (unwind_sec->name, ".PARISC.unwind") == 0)
{
- unwind_size = bfd_section_size (objfile->obfd, unwind_sec);
+ unwind_size = bfd_section_size (unwind_sec);
unwind_entries = unwind_size / UNWIND_ENTRY_SIZE;
internalize_unwinds (objfile, &ui->table[index], unwind_sec,
if (len > 16)
{
- /* All return values larget than 128 bits must be aggregate
+ /* All return values larger than 128 bits must be aggregate
return values. */
gdb_assert (!hppa64_integral_or_pointer_p (type));
gdb_assert (!hppa64_floating_p (type));
return align_up (addr, 16);
}
-CORE_ADDR
+static CORE_ADDR
hppa_read_pc (readable_regcache *regcache)
{
ULONGEST ipsw;
- stw: 0x1a, store a word from a general register.
- stwm: 0x1b, store a word from a general register and perform base
- register modification (2.0 will still treate it as stw).
+ register modification (2.0 will still treat it as stw).
- std: 0x1c, store a doubleword from a general register (2.0 only).
For unoptimized GCC code and for any HP CC code this will never ever
examine any user instructions.
- For optimzied GCC code we're faced with problems. GCC will schedule
+ For optimized GCC code we're faced with problems. GCC will schedule
its prologue and make prologue instructions available for delay slot
filling. The end result is user code gets mixed in with the prologue
and a prologue instruction may be in the delay slot of the first branch
final_iteration = 1;
}
- /* We've got a tenative location for the end of the prologue. However
+ /* We've got a tentative location for the end of the prologue. However
because of limitations in the unwind descriptor mechanism we may
have went too far into user code looking for the save of a register
that does not exist. So, if there registers we expected to be saved
{
for (minimal_symbol *msym : objfile->msymbols ())
{
- if (strcmp (MSYMBOL_LINKAGE_NAME (msym), name) == 0)
+ if (strcmp (msym->linkage_name (), name) == 0)
{
struct unwind_table_entry *u;
return 1;
}
-/* This relaxed version of the insstruction matcher allows us to match
+/* This relaxed version of the instruction matcher allows us to match
from somewhere inside the pattern, by looking backwards in the
instruction scheme. */