/* Intel 386 target-dependent stuff.
- Copyright (C) 1988-2015 Free Software Foundation, Inc.
+ Copyright (C) 1988-2016 Free Software Foundation, Inc.
This file is part of GDB.
#include "features/i386/i386.c"
#include "features/i386/i386-avx.c"
#include "features/i386/i386-mpx.c"
+#include "features/i386/i386-avx-mpx.c"
#include "features/i386/i386-avx512.c"
#include "features/i386/i386-mmx.c"
#include "expression.h"
#include "parser-defs.h"
#include <ctype.h>
+#include <algorithm>
/* Register names. */
return gdbarch_num_regs (gdbarch) + gdbarch_num_pseudo_regs (gdbarch);
}
-/* Convert SVR4 register number REG to the appropriate register number
+/* Convert SVR4 DWARF register number REG to the appropriate register number
used by GDB. */
static int
-i386_svr4_reg_to_regnum (struct gdbarch *gdbarch, int reg)
+i386_svr4_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
{
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
case 45: return I386_GS_REGNUM;
}
- /* This will hopefully provoke a warning. */
- return gdbarch_num_regs (gdbarch) + gdbarch_num_pseudo_regs (gdbarch);
+ return -1;
+}
+
+/* Wrapper on i386_svr4_dwarf_reg_to_regnum to return
+ num_regs + num_pseudo_regs for other debug formats. */
+
+static int
+i386_svr4_reg_to_regnum (struct gdbarch *gdbarch, int reg)
+{
+ int regnum = i386_svr4_dwarf_reg_to_regnum (gdbarch, reg);
+
+ if (regnum == -1)
+ return gdbarch_num_regs (gdbarch) + gdbarch_num_pseudo_regs (gdbarch);
+ return regnum;
}
\f
This function is 64-bit safe. */
-static const gdb_byte *
-i386_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pc, int *len)
-{
- static gdb_byte break_insn[] = { 0xcc }; /* int 3 */
+constexpr gdb_byte i386_break_insn[] = { 0xcc }; /* int 3 */
+
+typedef BP_MANIPULATION (i386_break_insn) i386_breakpoint;
- *len = sizeof (break_insn);
- return break_insn;
-}
\f
/* Displaced instruction handling. */
if (current_pc > pc + offset_and)
cache->saved_sp_reg = regnums[reg];
- return min (pc + offset + 3, current_pc);
+ return std::min (pc + offset + 3, current_pc);
}
/* Maximum instruction length we need to handle. */
&& (cust != NULL
&& COMPUNIT_PRODUCER (cust) != NULL
&& startswith (COMPUNIT_PRODUCER (cust), "clang ")))
- return max (start_pc, post_prologue_pc);
+ return std::max (start_pc, post_prologue_pc);
}
cache.locals = -1;
struct i386_frame_cache *cache;
if (*this_cache)
- return *this_cache;
+ return (struct i386_frame_cache *) *this_cache;
cache = i386_alloc_frame_cache ();
*this_cache = cache;
CORE_ADDR sp;
if (*this_cache)
- return *this_cache;
+ return (struct i386_frame_cache *) *this_cache;
cache = i386_alloc_frame_cache ();
*this_cache = cache;
gdb_byte buf[4];
if (*this_cache)
- return *this_cache;
+ return (struct i386_frame_cache *) *this_cache;
cache = i386_alloc_frame_cache ();
if (!tdep->i386_bnd_type)
{
- struct type *t, *bound_t;
+ struct type *t;
const struct builtin_type *bt = builtin_type (gdbarch);
/* The type we're building is described bellow: */
}
else if (i386_byte_regnum_p (gdbarch, regnum))
{
- /* Check byte pseudo registers last since this function will
- be called from amd64_pseudo_register_read, which handles
- byte pseudo registers differently. */
int gpnum = regnum - tdep->al_regnum;
/* Extract (always little endian). We read both lower and
}
else if (i386_byte_regnum_p (gdbarch, regnum))
{
- /* Check byte pseudo registers last since this function will
- be called from amd64_pseudo_register_read, which handles
- byte pseudo registers differently. */
int gpnum = regnum - tdep->al_regnum;
/* Read ... We read both lower and upper registers. */
internal_error (__FILE__, __LINE__, _("invalid regnum"));
}
}
+
+/* Implement the 'ax_pseudo_register_collect' gdbarch method. */
+
+int
+i386_ax_pseudo_register_collect (struct gdbarch *gdbarch,
+ struct agent_expr *ax, int regnum)
+{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
+ if (i386_mmx_regnum_p (gdbarch, regnum))
+ {
+ /* MMX to FPU register mapping depends on current TOS. Let's just
+ not care and collect everything... */
+ int i;
+
+ ax_reg_mask (ax, I387_FSTAT_REGNUM (tdep));
+ for (i = 0; i < 8; i++)
+ ax_reg_mask (ax, I387_ST0_REGNUM (tdep) + i);
+ return 0;
+ }
+ else if (i386_bnd_regnum_p (gdbarch, regnum))
+ {
+ regnum -= tdep->bnd0_regnum;
+ ax_reg_mask (ax, I387_BND0R_REGNUM (tdep) + regnum);
+ return 0;
+ }
+ else if (i386_k_regnum_p (gdbarch, regnum))
+ {
+ regnum -= tdep->k0_regnum;
+ ax_reg_mask (ax, tdep->k0_regnum + regnum);
+ return 0;
+ }
+ else if (i386_zmm_regnum_p (gdbarch, regnum))
+ {
+ regnum -= tdep->zmm0_regnum;
+ if (regnum < num_lower_zmm_regs)
+ {
+ ax_reg_mask (ax, I387_XMM0_REGNUM (tdep) + regnum);
+ ax_reg_mask (ax, tdep->ymm0h_regnum + regnum);
+ }
+ else
+ {
+ ax_reg_mask (ax, I387_XMM16_REGNUM (tdep) + regnum
+ - num_lower_zmm_regs);
+ ax_reg_mask (ax, I387_YMM16H_REGNUM (tdep) + regnum
+ - num_lower_zmm_regs);
+ }
+ ax_reg_mask (ax, tdep->zmm0h_regnum + regnum);
+ return 0;
+ }
+ else if (i386_ymm_regnum_p (gdbarch, regnum))
+ {
+ regnum -= tdep->ymm0_regnum;
+ ax_reg_mask (ax, I387_XMM0_REGNUM (tdep) + regnum);
+ ax_reg_mask (ax, tdep->ymm0h_regnum + regnum);
+ return 0;
+ }
+ else if (i386_ymm_avx512_regnum_p (gdbarch, regnum))
+ {
+ regnum -= tdep->ymm16_regnum;
+ ax_reg_mask (ax, I387_XMM16_REGNUM (tdep) + regnum);
+ ax_reg_mask (ax, tdep->ymm16h_regnum + regnum);
+ return 0;
+ }
+ else if (i386_word_regnum_p (gdbarch, regnum))
+ {
+ int gpnum = regnum - tdep->ax_regnum;
+
+ ax_reg_mask (ax, gpnum);
+ return 0;
+ }
+ else if (i386_byte_regnum_p (gdbarch, regnum))
+ {
+ int gpnum = regnum - tdep->al_regnum;
+
+ ax_reg_mask (ax, gpnum % 4);
+ return 0;
+ }
+ else
+ internal_error (__FILE__, __LINE__, _("invalid regnum"));
+ return 1;
+}
\f
/* Return the register number of the register allocated by GCC after
{
struct gdbarch *gdbarch = get_regcache_arch (regcache);
const struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
- const gdb_byte *regs = gregs;
+ const gdb_byte *regs = (const gdb_byte *) gregs;
int i;
gdb_assert (len >= tdep->sizeof_gregset);
{
struct gdbarch *gdbarch = get_regcache_arch (regcache);
const struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
- gdb_byte *regs = gregs;
+ gdb_byte *regs = (gdb_byte *) gregs;
int i;
gdb_assert (len >= tdep->sizeof_gregset);
{
if (record_full_memory_query)
{
- int q;
-
- target_terminal_ours ();
- q = yquery (_("\
+ if (yquery (_("\
Process record ignores the memory change of instruction at address %s\n\
because it can't get the value of the segment register.\n\
Do you want to stop the program?"),
- paddress (gdbarch, irp->orig_addr));
- target_terminal_inferior ();
- if (q)
- return -1;
+ paddress (gdbarch, irp->orig_addr)))
+ return -1;
}
return 0;
{
if (record_full_memory_query)
{
- int q;
-
- target_terminal_ours ();
- q = yquery (_("\
+ if (yquery (_("\
Process record ignores the memory change of instruction at address %s\n\
because it can't get the value of the segment register.\n\
Do you want to stop the program?"),
- paddress (gdbarch, ir.orig_addr));
- target_terminal_inferior ();
- if (q)
+ paddress (gdbarch, ir.orig_addr)))
return -1;
}
}
/* addr += ((uint32_t) read_register (I386_ES_REGNUM)) << 4; */
if (record_full_memory_query)
{
- int q;
-
- target_terminal_ours ();
- q = yquery (_("\
+ if (yquery (_("\
Process record ignores the memory change of instruction at address %s\n\
because it can't get the value of the segment register.\n\
Do you want to stop the program?"),
- paddress (gdbarch, ir.orig_addr));
- target_terminal_inferior ();
- if (q)
+ paddress (gdbarch, ir.orig_addr)))
return -1;
}
}
{
if (record_full_memory_query)
{
- int q;
-
- target_terminal_ours ();
- q = yquery (_("\
+ if (yquery (_("\
Process record ignores the memory change of instruction at address %s\n\
because it can't get the value of the segment register.\n\
Do you want to stop the program?"),
- paddress (gdbarch, ir.orig_addr));
- target_terminal_inferior ();
- if (q)
- return -1;
+ paddress (gdbarch, ir.orig_addr)))
+ return -1;
}
}
else
{
if (record_full_memory_query)
{
- int q;
-
- target_terminal_ours ();
- q = yquery (_("\
+ if (yquery (_("\
Process record ignores the memory change of instruction at address %s\n\
because it can't get the value of the segment register.\n\
Do you want to stop the program?"),
- paddress (gdbarch, ir.orig_addr));
- target_terminal_inferior ();
- if (q)
+ paddress (gdbarch, ir.orig_addr)))
return -1;
}
}
}
}
+/* Return a floating-point format for a floating-point variable of
+ length LEN in bits. If non-NULL, NAME is the name of its type.
+ If no suitable type is found, return NULL. */
+
+const struct floatformat **
+i386_floatformat_for_type (struct gdbarch *gdbarch,
+ const char *name, int len)
+{
+ if (len == 128 && name)
+ if (strcmp (name, "__float128") == 0
+ || strcmp (name, "_Float128") == 0
+ || strcmp (name, "complex _Float128") == 0)
+ return floatformats_ia64_quad;
+
+ return default_floatformat_for_type (gdbarch, name, len);
+}
+
static int
i386_validate_tdesc_p (struct gdbarch_tdep *tdep,
struct tdesc_arch_data *tdesc_data)
}
\f
+/* Note: This is called for both i386 and amd64. */
+
static struct gdbarch *
i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
{
int ymm0_regnum;
int bnd0_regnum;
int num_bnd_cooked;
- int k0_regnum;
- int zmm0_regnum;
/* If there is already a candidate, use it. */
arches = gdbarch_list_lookup_by_info (arches, &info);
if (arches != NULL)
return arches->gdbarch;
- /* Allocate space for the new architecture. */
+ /* Allocate space for the new architecture. Assume i386 for now. */
tdep = XCNEW (struct gdbarch_tdep);
gdbarch = gdbarch_alloc (&info, tdep);
alignment. */
set_gdbarch_long_double_bit (gdbarch, 96);
+ /* Support for floating-point data type variants. */
+ set_gdbarch_floatformat_for_type (gdbarch, i386_floatformat_for_type);
+
/* Register numbers of various important registers. */
set_gdbarch_sp_regnum (gdbarch, I386_ESP_REGNUM); /* %esp */
set_gdbarch_pc_regnum (gdbarch, I386_EIP_REGNUM); /* %eip */
set_gdbarch_sdb_reg_to_regnum (gdbarch, i386_dbx_reg_to_regnum);
/* Use the SVR4 register numbering scheme for DWARF 2. */
- set_gdbarch_dwarf2_reg_to_regnum (gdbarch, i386_svr4_reg_to_regnum);
+ set_gdbarch_dwarf2_reg_to_regnum (gdbarch, i386_svr4_dwarf_reg_to_regnum);
/* We don't set gdbarch_stab_reg_to_regnum, since ECOFF doesn't seem to
be in use on any of the supported i386 targets. */
/* Stack grows downward. */
set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
- set_gdbarch_breakpoint_from_pc (gdbarch, i386_breakpoint_from_pc);
+ set_gdbarch_breakpoint_kind_from_pc (gdbarch, i386_breakpoint::kind_from_pc);
+ set_gdbarch_sw_breakpoint_from_kind (gdbarch, i386_breakpoint::bp_from_kind);
+
set_gdbarch_decr_pc_after_break (gdbarch, 1);
set_gdbarch_max_insn_length (gdbarch, I386_MAX_INSN_LEN);
set_gdbarch_pseudo_register_read_value (gdbarch,
i386_pseudo_register_read_value);
set_gdbarch_pseudo_register_write (gdbarch, i386_pseudo_register_write);
+ set_gdbarch_ax_pseudo_register_collect (gdbarch,
+ i386_ax_pseudo_register_collect);
set_tdesc_pseudo_register_type (gdbarch, i386_pseudo_register_type);
set_tdesc_pseudo_register_name (gdbarch, i386_pseudo_register_name);
set_gdbarch_insn_is_ret (gdbarch, i386_insn_is_ret);
set_gdbarch_insn_is_jump (gdbarch, i386_insn_is_jump);
- /* Hook in ABI-specific overrides, if they have been registered. */
- info.tdep_info = (void *) tdesc_data;
+ /* Hook in ABI-specific overrides, if they have been registered.
+ Note: If INFO specifies a 64 bit arch, this is where we turn
+ a 32-bit i386 into a 64-bit amd64. */
+ info.tdep_info = tdesc_data;
gdbarch_init_osabi (info, gdbarch);
if (!i386_validate_tdesc_p (tdep, tdesc_data))
case X86_XSTATE_MPX_AVX512_MASK:
case X86_XSTATE_AVX512_MASK:
return tdesc_i386_avx512;
+ case X86_XSTATE_AVX_MPX_MASK:
+ return tdesc_i386_avx_mpx;
case X86_XSTATE_MPX_MASK:
return tdesc_i386_mpx;
case X86_XSTATE_AVX_MASK:
struct gdbarch_tdep *tdep;
ULONGEST ret;
enum register_status regstatus;
- struct gdb_exception except;
rcache = get_current_regcache ();
tdep = gdbarch_tdep (get_regcache_arch (rcache));
return ret & MPX_BASE_MASK;
}
-/* Check if the current target is MPX enabled. */
-
-static int
+int
i386_mpx_enabled (void)
{
const struct gdbarch_tdep *tdep = gdbarch_tdep (get_current_arch ());
bt_mask = (CORE_ADDR) MPX_BT_MASK;
if ( sizeof (CORE_ADDR) == 4)
- error (_("operation not supported"));
+ error (_("bound table examination not supported\
+ for 64-bit process with 32-bit GDB"));
}
else
{
struct gdbarch *gdbarch = get_current_arch ();
struct type *data_ptr_type = builtin_type (gdbarch)->builtin_data_ptr;
- if (!i386_mpx_enabled ())
+ if (gdbarch_bfd_arch_info (gdbarch)->arch != bfd_arch_i386
+ || !i386_mpx_enabled ())
{
- printf_unfiltered (_("Intel(R) Memory Protection Extensions not "
+ printf_unfiltered (_("Intel Memory Protection Extensions not "
"supported on this target.\n"));
return;
}
for (i = 0; i < 4; i++)
bt_entry[i] = read_memory_typed_address (bt_entry_addr
- + i * data_ptr_type->length,
+ + i * TYPE_LENGTH (data_ptr_type),
data_ptr_type);
i386_mpx_print_bounds (bt_entry);
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
struct type *data_ptr_type = builtin_type (gdbarch)->builtin_data_ptr;
- if (!i386_mpx_enabled ())
- error (_("Intel(R) Memory Protection Extensions not supported\
+ if (gdbarch_bfd_arch_info (gdbarch)->arch != bfd_arch_i386
+ || !i386_mpx_enabled ())
+ error (_("Intel Memory Protection Extensions not supported\
on this target."));
if (args == NULL)
bt_entry_addr = i386_mpx_get_bt_entry (addr, bd_base);
for (i = 0; i < 2; i++)
bt_entry[i] = read_memory_typed_address (bt_entry_addr
- + i * data_ptr_type->length,
+ + i * TYPE_LENGTH (data_ptr_type),
data_ptr_type);
bt_entry[0] = (uint64_t) lower;
bt_entry[1] = ~(uint64_t) upper;
for (i = 0; i < 2; i++)
- write_memory_unsigned_integer (bt_entry_addr + i * data_ptr_type->length,
- data_ptr_type->length, byte_order,
+ write_memory_unsigned_integer (bt_entry_addr
+ + i * TYPE_LENGTH (data_ptr_type),
+ TYPE_LENGTH (data_ptr_type), byte_order,
bt_entry[i]);
}
/* Add "mpx" prefix for the set commands. */
add_prefix_cmd ("mpx", class_support, set_mpx_cmd, _("\
-Set Intel(R) Memory Protection Extensions specific variables."),
+Set Intel Memory Protection Extensions specific variables."),
&mpx_set_cmdlist, "set mpx ",
0 /* allow-unknown */, &setlist);
/* Add "mpx" prefix for the show commands. */
add_prefix_cmd ("mpx", class_support, show_mpx_cmd, _("\
-Show Intel(R) Memory Protection Extensions specific variables."),
+Show Intel Memory Protection Extensions specific variables."),
&mpx_show_cmdlist, "show mpx ",
0 /* allow-unknown */, &showlist);
initialize_tdesc_i386_mmx ();
initialize_tdesc_i386_avx ();
initialize_tdesc_i386_mpx ();
+ initialize_tdesc_i386_avx_mpx ();
initialize_tdesc_i386_avx512 ();
/* Tell remote stub that we support XML target description. */
projects / deliverable / binutils-gdb.git / blobdiff