/* Intel 386 target-dependent stuff.
- Copyright (C) 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
- 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009,
- 2010, 2011 Free Software Foundation, Inc.
+ Copyright (C) 1988-2013 Free Software Foundation, Inc.
This file is part of GDB.
#include "dis-asm.h"
#include "disasm.h"
#include "remote.h"
-
+#include "exceptions.h"
#include "gdb_assert.h"
-#include "gdb_string.h"
+#include <string.h>
#include "i386-tdep.h"
#include "i387-tdep.h"
#include "i386-xstate.h"
#include "record.h"
+#include "record-full.h"
#include <stdint.h>
#include "features/i386/i386.c"
#include "features/i386/i386-avx.c"
+#include "features/i386/i386-mpx.c"
#include "features/i386/i386-mmx.c"
+#include "ax.h"
+#include "ax-gdb.h"
+
+#include "stap-probe.h"
+#include "user-regs.h"
+#include "cli/cli-utils.h"
+#include "expression.h"
+#include "parser-defs.h"
+#include <ctype.h>
+
/* Register names. */
static const char *i386_register_names[] =
"ymm4h", "ymm5h", "ymm6h", "ymm7h",
};
+static const char *i386_mpx_names[] =
+{
+ "bnd0raw", "bnd1raw", "bnd2raw", "bnd3raw", "bndcfgu", "bndstatus"
+};
+
+/* Register names for MPX pseudo-registers. */
+
+static const char *i386_bnd_names[] =
+{
+ "bnd0", "bnd1", "bnd2", "bnd3"
+};
+
/* Register names for MMX pseudo-registers. */
static const char *i386_mmx_names[] =
return regnum >= 0 && regnum < tdep->num_ymm_regs;
}
+/* BND register? */
+
+int
+i386_bnd_regnum_p (struct gdbarch *gdbarch, int regnum)
+{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ int bnd0_regnum = tdep->bnd0_regnum;
+
+ if (bnd0_regnum < 0)
+ return 0;
+
+ regnum -= bnd0_regnum;
+ return regnum >= 0 && regnum < I387_NUM_BND_REGS;
+}
+
/* SSE register? */
int
&& regnum < I387_XMM0_REGNUM (tdep));
}
+/* BNDr (raw) register? */
+
+static int
+i386_bndr_regnum_p (struct gdbarch *gdbarch, int regnum)
+{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
+ if (I387_BND0R_REGNUM (tdep) < 0)
+ return 0;
+
+ regnum -= tdep->bnd0r_regnum;
+ return regnum >= 0 && regnum < I387_NUM_BND_REGS;
+}
+
+/* BND control register? */
+
+static int
+i386_mpx_ctrl_regnum_p (struct gdbarch *gdbarch, int regnum)
+{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
+ if (I387_BNDCFGU_REGNUM (tdep) < 0)
+ return 0;
+
+ regnum -= I387_BNDCFGU_REGNUM (tdep);
+ return regnum >= 0 && regnum < I387_NUM_MPX_CTRL_REGS;
+}
+
/* Return the name of register REGNUM, or the empty string if it is
an anonymous register. */
i386_pseudo_register_name (struct gdbarch *gdbarch, int regnum)
{
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ if (i386_bnd_regnum_p (gdbarch, regnum))
+ return i386_bnd_names[regnum - tdep->bnd0_regnum];
if (i386_mmx_regnum_p (gdbarch, regnum))
return i386_mmx_names[regnum - I387_MM0_REGNUM (tdep)];
else if (i386_ymm_regnum_p (gdbarch, regnum))
its legitimate values. */
static const char att_flavor[] = "att";
static const char intel_flavor[] = "intel";
-static const char *valid_flavors[] =
+static const char *const valid_flavors[] =
{
att_flavor,
intel_flavor,
static int
i386_syscall_p (const gdb_byte *insn, int *lengthp)
{
- if (insn[0] == 0xcd)
+ /* Is it 'int $0x80'? */
+ if ((insn[0] == 0xcd && insn[1] == 0x80)
+ /* Or is it 'sysenter'? */
+ || (insn[0] == 0x0f && insn[1] == 0x34)
+ /* Or is it 'syscall'? */
+ || (insn[0] == 0x0f && insn[1] == 0x05))
{
*lengthp = 2;
return 1;
/* Where "ret" in the original code will return to. */
ret_addr = oldloc + insn_length;
push_buf[0] = 0x68; /* pushq $... */
- memcpy (&push_buf[1], &ret_addr, 4);
+ store_unsigned_integer (&push_buf[1], 4, byte_order, ret_addr);
/* Push the push. */
append_insns (to, 5, push_buf);
{
/* Base address. */
CORE_ADDR base;
+ int base_p;
LONGEST sp_offset;
CORE_ADDR pc;
cache = FRAME_OBSTACK_ZALLOC (struct i386_frame_cache);
/* Base address. */
+ cache->base_p = 0;
cache->base = 0;
cache->sp_offset = -4;
cache->pc = 0;
gdb_byte mask[I386_MAX_MATCHED_INSN_LEN];
};
-/* Search for the instruction at PC in the list SKIP_INSNS. Return
- the first instruction description that matches. Otherwise, return
- NULL. */
+/* Return whether instruction at PC matches PATTERN. */
-static struct i386_insn *
-i386_match_insn (CORE_ADDR pc, struct i386_insn *skip_insns)
+static int
+i386_match_pattern (CORE_ADDR pc, struct i386_insn pattern)
{
- struct i386_insn *insn;
gdb_byte op;
if (target_read_memory (pc, &op, 1))
- return NULL;
+ return 0;
- for (insn = skip_insns; insn->len > 0; insn++)
+ if ((op & pattern.mask[0]) == pattern.insn[0])
{
- if ((op & insn->mask[0]) == insn->insn[0])
- {
- gdb_byte buf[I386_MAX_MATCHED_INSN_LEN - 1];
- int insn_matched = 1;
- size_t i;
+ gdb_byte buf[I386_MAX_MATCHED_INSN_LEN - 1];
+ int insn_matched = 1;
+ size_t i;
- gdb_assert (insn->len > 1);
- gdb_assert (insn->len <= I386_MAX_MATCHED_INSN_LEN);
+ gdb_assert (pattern.len > 1);
+ gdb_assert (pattern.len <= I386_MAX_MATCHED_INSN_LEN);
- if (target_read_memory (pc + 1, buf, insn->len - 1))
- return NULL;
-
- for (i = 1; i < insn->len; i++)
- {
- if ((buf[i - 1] & insn->mask[i]) != insn->insn[i])
- insn_matched = 0;
- }
+ if (target_read_memory (pc + 1, buf, pattern.len - 1))
+ return 0;
- if (insn_matched)
- return insn;
+ for (i = 1; i < pattern.len; i++)
+ {
+ if ((buf[i - 1] & pattern.mask[i]) != pattern.insn[i])
+ insn_matched = 0;
}
+ return insn_matched;
+ }
+ return 0;
+}
+
+/* Search for the instruction at PC in the list INSN_PATTERNS. Return
+ the first instruction description that matches. Otherwise, return
+ NULL. */
+
+static struct i386_insn *
+i386_match_insn (CORE_ADDR pc, struct i386_insn *insn_patterns)
+{
+ struct i386_insn *pattern;
+
+ for (pattern = insn_patterns; pattern->len > 0; pattern++)
+ {
+ if (i386_match_pattern (pc, *pattern))
+ return pattern;
}
return NULL;
}
+/* Return whether PC points inside a sequence of instructions that
+ matches INSN_PATTERNS. */
+
+static int
+i386_match_insn_block (CORE_ADDR pc, struct i386_insn *insn_patterns)
+{
+ CORE_ADDR current_pc;
+ int ix, i;
+ struct i386_insn *insn;
+
+ insn = i386_match_insn (pc, insn_patterns);
+ if (insn == NULL)
+ return 0;
+
+ current_pc = pc;
+ ix = insn - insn_patterns;
+ for (i = ix - 1; i >= 0; i--)
+ {
+ current_pc -= insn_patterns[i].len;
+
+ if (!i386_match_pattern (current_pc, insn_patterns[i]))
+ return 0;
+ }
+
+ current_pc = pc + insn->len;
+ for (insn = insn_patterns + ix + 1; insn->len > 0; insn++)
+ {
+ if (!i386_match_pattern (current_pc, *insn))
+ return 0;
+
+ current_pc += insn->len;
+ }
+
+ return 1;
+}
+
/* Some special instructions that might be migrated by GCC into the
part of the prologue that sets up the new stack frame. Because the
stack frame hasn't been setup yet, no registers have been saved
if (target_read_memory (pc + skip, &op, 1))
return pc + skip;
- /* Check for `movl %esp, %ebp' -- can be written in two ways. */
+ /* The i386 prologue looks like
+
+ push %ebp
+ mov %esp,%ebp
+ sub $0x10,%esp
+
+ and a different prologue can be generated for atom.
+
+ push %ebp
+ lea (%esp),%ebp
+ lea -0x10(%esp),%esp
+
+ We handle both of them here. */
+
switch (op)
{
+ /* Check for `movl %esp, %ebp' -- can be written in two ways. */
case 0x8b:
if (read_memory_unsigned_integer (pc + skip + 1, 1, byte_order)
!= 0xec)
return pc;
+ pc += (skip + 2);
break;
case 0x89:
if (read_memory_unsigned_integer (pc + skip + 1, 1, byte_order)
!= 0xe5)
return pc;
+ pc += (skip + 2);
+ break;
+ case 0x8d: /* Check for 'lea (%ebp), %ebp'. */
+ if (read_memory_unsigned_integer (pc + skip + 1, 2, byte_order)
+ != 0x242c)
+ return pc;
+ pc += (skip + 3);
break;
default:
return pc;
necessary. We also now commit to skipping the special
instructions mentioned before. */
cache->locals = 0;
- pc += (skip + 2);
/* If that's all, return now. */
if (limit <= pc)
/* Check for stack adjustment
subl $XXX, %esp
+ or
+ lea -XXX(%esp),%esp
NOTE: You can't subtract a 16-bit immediate from a 32-bit
reg, so we don't have to worry about a data16 prefix. */
cache->locals = read_memory_integer (pc + 2, 4, byte_order);
return pc + 6;
}
+ else if (op == 0x8d)
+ {
+ /* The ModR/M byte is 0x64. */
+ if (read_memory_unsigned_integer (pc + 1, 1, byte_order) != 0x64)
+ return pc;
+ /* 'lea' with 8-bit displacement. */
+ cache->locals = -1 * read_memory_integer (pc + 3, 1, byte_order);
+ return pc + 4;
+ }
else
{
- /* Some instruction other than `subl'. */
+ /* Some instruction other than `subl' nor 'lea'. */
return pc;
}
}
CORE_ADDR pc;
gdb_byte op;
int i;
+ CORE_ADDR func_addr;
+ if (find_pc_partial_function (start_pc, NULL, &func_addr, NULL))
+ {
+ CORE_ADDR post_prologue_pc
+ = skip_prologue_using_sal (gdbarch, func_addr);
+ struct symtab *s = find_pc_symtab (func_addr);
+
+ /* Clang always emits a line note before the prologue and another
+ one after. We trust clang to emit usable line notes. */
+ if (post_prologue_pc
+ && (s != NULL
+ && s->producer != NULL
+ && strncmp (s->producer, "clang ", sizeof ("clang ") - 1) == 0))
+ return max (start_pc, post_prologue_pc);
+ }
+
cache.locals = -1;
pc = i386_analyze_prologue (gdbarch, start_pc, 0xffffffff, &cache);
if (cache.locals < 0)
{
/* Make sure address is computed correctly as a 32bit
integer even if CORE_ADDR is 64 bit wide. */
- struct minimal_symbol *s;
+ struct bound_minimal_symbol s;
CORE_ADDR call_dest;
call_dest = pc + 5 + extract_signed_integer (buf, 4, byte_order);
call_dest = call_dest & 0xffffffffU;
s = lookup_minimal_symbol_by_pc (call_dest);
- if (s != NULL
- && SYMBOL_LINKAGE_NAME (s) != NULL
- && strcmp (SYMBOL_LINKAGE_NAME (s), "__main") == 0)
+ if (s.minsym != NULL
+ && SYMBOL_LINKAGE_NAME (s.minsym) != NULL
+ && strcmp (SYMBOL_LINKAGE_NAME (s.minsym), "__main") == 0)
pc += 5;
}
}
/* Normal frames. */
-static struct i386_frame_cache *
-i386_frame_cache (struct frame_info *this_frame, void **this_cache)
+static void
+i386_frame_cache_1 (struct frame_info *this_frame,
+ struct i386_frame_cache *cache)
{
struct gdbarch *gdbarch = get_frame_arch (this_frame);
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
- struct i386_frame_cache *cache;
gdb_byte buf[4];
int i;
- if (*this_cache)
- return *this_cache;
-
- cache = i386_alloc_frame_cache ();
- *this_cache = cache;
+ cache->pc = get_frame_func (this_frame);
/* In principle, for normal frames, %ebp holds the frame pointer,
which holds the base address for the current stack frame.
get_frame_register (this_frame, I386_EBP_REGNUM, buf);
cache->base = extract_unsigned_integer (buf, 4, byte_order);
if (cache->base == 0)
- return cache;
+ {
+ cache->base_p = 1;
+ return;
+ }
/* For normal frames, %eip is stored at 4(%ebp). */
cache->saved_regs[I386_EIP_REGNUM] = 4;
- cache->pc = get_frame_func (this_frame);
if (cache->pc != 0)
i386_analyze_prologue (gdbarch, cache->pc, get_frame_pc (this_frame),
cache);
- if (cache->saved_sp_reg != -1)
- {
- /* Saved stack pointer has been saved. */
- get_frame_register (this_frame, cache->saved_sp_reg, buf);
- cache->saved_sp = extract_unsigned_integer (buf, 4, byte_order);
- }
-
if (cache->locals < 0)
{
/* We didn't find a valid frame, which means that CACHE->base
if (cache->saved_sp_reg != -1)
{
+ /* Saved stack pointer has been saved. */
+ get_frame_register (this_frame, cache->saved_sp_reg, buf);
+ cache->saved_sp = extract_unsigned_integer (buf, 4, byte_order);
+
/* We're halfway aligning the stack. */
cache->base = ((cache->saved_sp - 4) & 0xfffffff0) - 4;
cache->saved_regs[I386_EIP_REGNUM] = cache->saved_sp - 4;
cache->saved_regs[I386_EBP_REGNUM] = 0;
}
+ if (cache->saved_sp_reg != -1)
+ {
+ /* Saved stack pointer has been saved (but the SAVED_SP_REG
+ register may be unavailable). */
+ if (cache->saved_sp == 0
+ && deprecated_frame_register_read (this_frame,
+ cache->saved_sp_reg, buf))
+ cache->saved_sp = extract_unsigned_integer (buf, 4, byte_order);
+ }
/* Now that we have the base address for the stack frame we can
calculate the value of %esp in the calling frame. */
- if (cache->saved_sp == 0)
+ else if (cache->saved_sp == 0)
cache->saved_sp = cache->base + 8;
/* Adjust all the saved registers such that they contain addresses
if (cache->saved_regs[i] != -1)
cache->saved_regs[i] += cache->base;
+ cache->base_p = 1;
+}
+
+static struct i386_frame_cache *
+i386_frame_cache (struct frame_info *this_frame, void **this_cache)
+{
+ volatile struct gdb_exception ex;
+ struct i386_frame_cache *cache;
+
+ if (*this_cache)
+ return *this_cache;
+
+ cache = i386_alloc_frame_cache ();
+ *this_cache = cache;
+
+ TRY_CATCH (ex, RETURN_MASK_ERROR)
+ {
+ i386_frame_cache_1 (this_frame, cache);
+ }
+ if (ex.reason < 0 && ex.error != NOT_AVAILABLE_ERROR)
+ throw_exception (ex);
+
return cache;
}
(*this_id) = frame_id_build (cache->base + 8, cache->pc);
}
+static enum unwind_stop_reason
+i386_frame_unwind_stop_reason (struct frame_info *this_frame,
+ void **this_cache)
+{
+ struct i386_frame_cache *cache = i386_frame_cache (this_frame, this_cache);
+
+ if (!cache->base_p)
+ return UNWIND_UNAVAILABLE;
+
+ /* This marks the outermost frame. */
+ if (cache->base == 0)
+ return UNWIND_OUTERMOST;
+
+ return UNWIND_NO_REASON;
+}
+
static struct value *
i386_frame_prev_register (struct frame_info *this_frame, void **this_cache,
int regnum)
if (regnum == I386_EIP_REGNUM && cache->pc_in_eax)
return frame_unwind_got_register (this_frame, regnum, I386_EAX_REGNUM);
- if (regnum == I386_ESP_REGNUM && cache->saved_sp)
- return frame_unwind_got_constant (this_frame, regnum, cache->saved_sp);
+ if (regnum == I386_ESP_REGNUM
+ && (cache->saved_sp != 0 || cache->saved_sp_reg != -1))
+ {
+ /* If the SP has been saved, but we don't know where, then this
+ means that SAVED_SP_REG register was found unavailable back
+ when we built the cache. */
+ if (cache->saved_sp == 0)
+ return frame_unwind_got_register (this_frame, regnum,
+ cache->saved_sp_reg);
+ else
+ return frame_unwind_got_constant (this_frame, regnum,
+ cache->saved_sp);
+ }
if (regnum < I386_NUM_SAVED_REGS && cache->saved_regs[regnum] != -1)
return frame_unwind_got_memory (this_frame, regnum,
static const struct frame_unwind i386_frame_unwind =
{
NORMAL_FRAME,
+ i386_frame_unwind_stop_reason,
i386_frame_this_id,
i386_frame_prev_register,
NULL,
i386_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc)
{
gdb_byte insn;
+ struct symtab *symtab;
+
+ symtab = find_pc_symtab (pc);
+ if (symtab && symtab->epilogue_unwind_valid)
+ return 0;
if (target_read_memory (pc, &insn, 1))
return 0; /* Can't read memory at pc. */
static struct i386_frame_cache *
i386_epilogue_frame_cache (struct frame_info *this_frame, void **this_cache)
{
- struct gdbarch *gdbarch = get_frame_arch (this_frame);
- enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+ volatile struct gdb_exception ex;
struct i386_frame_cache *cache;
- gdb_byte buf[4];
+ CORE_ADDR sp;
if (*this_cache)
return *this_cache;
cache = i386_alloc_frame_cache ();
*this_cache = cache;
- /* Cache base will be %esp plus cache->sp_offset (-4). */
- get_frame_register (this_frame, I386_ESP_REGNUM, buf);
- cache->base = extract_unsigned_integer (buf, 4,
- byte_order) + cache->sp_offset;
-
- /* Cache pc will be the frame func. */
- cache->pc = get_frame_pc (this_frame);
+ TRY_CATCH (ex, RETURN_MASK_ERROR)
+ {
+ cache->pc = get_frame_func (this_frame);
- /* The saved %esp will be at cache->base plus 8. */
- cache->saved_sp = cache->base + 8;
+ /* At this point the stack looks as if we just entered the
+ function, with the return address at the top of the
+ stack. */
+ sp = get_frame_register_unsigned (this_frame, I386_ESP_REGNUM);
+ cache->base = sp + cache->sp_offset;
+ cache->saved_sp = cache->base + 8;
+ cache->saved_regs[I386_EIP_REGNUM] = cache->base + 4;
- /* The saved %eip will be at cache->base plus 4. */
- cache->saved_regs[I386_EIP_REGNUM] = cache->base + 4;
+ cache->base_p = 1;
+ }
+ if (ex.reason < 0 && ex.error != NOT_AVAILABLE_ERROR)
+ throw_exception (ex);
return cache;
}
+static enum unwind_stop_reason
+i386_epilogue_frame_unwind_stop_reason (struct frame_info *this_frame,
+ void **this_cache)
+{
+ struct i386_frame_cache *cache =
+ i386_epilogue_frame_cache (this_frame, this_cache);
+
+ if (!cache->base_p)
+ return UNWIND_UNAVAILABLE;
+
+ return UNWIND_NO_REASON;
+}
+
static void
i386_epilogue_frame_this_id (struct frame_info *this_frame,
void **this_cache,
struct frame_id *this_id)
{
- struct i386_frame_cache *cache = i386_epilogue_frame_cache (this_frame,
- this_cache);
+ struct i386_frame_cache *cache =
+ i386_epilogue_frame_cache (this_frame, this_cache);
+
+ if (!cache->base_p)
+ return;
(*this_id) = frame_id_build (cache->base + 8, cache->pc);
}
+static struct value *
+i386_epilogue_frame_prev_register (struct frame_info *this_frame,
+ void **this_cache, int regnum)
+{
+ /* Make sure we've initialized the cache. */
+ i386_epilogue_frame_cache (this_frame, this_cache);
+
+ return i386_frame_prev_register (this_frame, this_cache, regnum);
+}
+
static const struct frame_unwind i386_epilogue_frame_unwind =
{
NORMAL_FRAME,
+ i386_epilogue_frame_unwind_stop_reason,
i386_epilogue_frame_this_id,
- i386_frame_prev_register,
+ i386_epilogue_frame_prev_register,
NULL,
i386_epilogue_frame_sniffer
};
\f
+/* Stack-based trampolines. */
+
+/* These trampolines are used on cross x86 targets, when taking the
+ address of a nested function. When executing these trampolines,
+ no stack frame is set up, so we are in a similar situation as in
+ epilogues and i386_epilogue_frame_this_id can be re-used. */
+
+/* Static chain passed in register. */
+
+struct i386_insn i386_tramp_chain_in_reg_insns[] =
+{
+ /* `movl imm32, %eax' and `movl imm32, %ecx' */
+ { 5, { 0xb8 }, { 0xfe } },
+
+ /* `jmp imm32' */
+ { 5, { 0xe9 }, { 0xff } },
+
+ {0}
+};
+
+/* Static chain passed on stack (when regparm=3). */
+
+struct i386_insn i386_tramp_chain_on_stack_insns[] =
+{
+ /* `push imm32' */
+ { 5, { 0x68 }, { 0xff } },
+
+ /* `jmp imm32' */
+ { 5, { 0xe9 }, { 0xff } },
+
+ {0}
+};
+
+/* Return whether PC points inside a stack trampoline. */
+
+static int
+i386_in_stack_tramp_p (CORE_ADDR pc)
+{
+ gdb_byte insn;
+ const char *name;
+
+ /* A stack trampoline is detected if no name is associated
+ to the current pc and if it points inside a trampoline
+ sequence. */
+
+ find_pc_partial_function (pc, &name, NULL, NULL);
+ if (name)
+ return 0;
+
+ if (target_read_memory (pc, &insn, 1))
+ return 0;
+
+ if (!i386_match_insn_block (pc, i386_tramp_chain_in_reg_insns)
+ && !i386_match_insn_block (pc, i386_tramp_chain_on_stack_insns))
+ return 0;
+
+ return 1;
+}
+
+static int
+i386_stack_tramp_frame_sniffer (const struct frame_unwind *self,
+ struct frame_info *this_frame,
+ void **this_cache)
+{
+ if (frame_relative_level (this_frame) == 0)
+ return i386_in_stack_tramp_p (get_frame_pc (this_frame));
+ else
+ return 0;
+}
+
+static const struct frame_unwind i386_stack_tramp_frame_unwind =
+{
+ NORMAL_FRAME,
+ i386_epilogue_frame_unwind_stop_reason,
+ i386_epilogue_frame_this_id,
+ i386_epilogue_frame_prev_register,
+ NULL,
+ i386_stack_tramp_frame_sniffer
+};
+\f
+/* Generate a bytecode expression to get the value of the saved PC. */
+
+static void
+i386_gen_return_address (struct gdbarch *gdbarch,
+ struct agent_expr *ax, struct axs_value *value,
+ CORE_ADDR scope)
+{
+ /* The following sequence assumes the traditional use of the base
+ register. */
+ ax_reg (ax, I386_EBP_REGNUM);
+ ax_const_l (ax, 4);
+ ax_simple (ax, aop_add);
+ value->type = register_type (gdbarch, I386_EIP_REGNUM);
+ value->kind = axs_lvalue_memory;
+}
+\f
+
/* Signal trampolines. */
static struct i386_frame_cache *
struct gdbarch *gdbarch = get_frame_arch (this_frame);
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+ volatile struct gdb_exception ex;
struct i386_frame_cache *cache;
CORE_ADDR addr;
gdb_byte buf[4];
cache = i386_alloc_frame_cache ();
- get_frame_register (this_frame, I386_ESP_REGNUM, buf);
- cache->base = extract_unsigned_integer (buf, 4, byte_order) - 4;
-
- addr = tdep->sigcontext_addr (this_frame);
- if (tdep->sc_reg_offset)
+ TRY_CATCH (ex, RETURN_MASK_ERROR)
{
- int i;
+ get_frame_register (this_frame, I386_ESP_REGNUM, buf);
+ cache->base = extract_unsigned_integer (buf, 4, byte_order) - 4;
- gdb_assert (tdep->sc_num_regs <= I386_NUM_SAVED_REGS);
+ addr = tdep->sigcontext_addr (this_frame);
+ if (tdep->sc_reg_offset)
+ {
+ int i;
- for (i = 0; i < tdep->sc_num_regs; i++)
- if (tdep->sc_reg_offset[i] != -1)
- cache->saved_regs[i] = addr + tdep->sc_reg_offset[i];
- }
- else
- {
- cache->saved_regs[I386_EIP_REGNUM] = addr + tdep->sc_pc_offset;
- cache->saved_regs[I386_ESP_REGNUM] = addr + tdep->sc_sp_offset;
+ gdb_assert (tdep->sc_num_regs <= I386_NUM_SAVED_REGS);
+
+ for (i = 0; i < tdep->sc_num_regs; i++)
+ if (tdep->sc_reg_offset[i] != -1)
+ cache->saved_regs[i] = addr + tdep->sc_reg_offset[i];
+ }
+ else
+ {
+ cache->saved_regs[I386_EIP_REGNUM] = addr + tdep->sc_pc_offset;
+ cache->saved_regs[I386_ESP_REGNUM] = addr + tdep->sc_sp_offset;
+ }
+
+ cache->base_p = 1;
}
+ if (ex.reason < 0 && ex.error != NOT_AVAILABLE_ERROR)
+ throw_exception (ex);
*this_cache = cache;
return cache;
}
+static enum unwind_stop_reason
+i386_sigtramp_frame_unwind_stop_reason (struct frame_info *this_frame,
+ void **this_cache)
+{
+ struct i386_frame_cache *cache =
+ i386_sigtramp_frame_cache (this_frame, this_cache);
+
+ if (!cache->base_p)
+ return UNWIND_UNAVAILABLE;
+
+ return UNWIND_NO_REASON;
+}
+
static void
i386_sigtramp_frame_this_id (struct frame_info *this_frame, void **this_cache,
struct frame_id *this_id)
struct i386_frame_cache *cache =
i386_sigtramp_frame_cache (this_frame, this_cache);
+ if (!cache->base_p)
+ return;
+
/* See the end of i386_push_dummy_call. */
(*this_id) = frame_id_build (cache->base + 8, get_frame_pc (this_frame));
}
static const struct frame_unwind i386_sigtramp_frame_unwind =
{
SIGTRAMP_FRAME,
+ i386_sigtramp_frame_unwind_stop_reason,
i386_sigtramp_frame_this_id,
i386_sigtramp_frame_prev_register,
NULL,
/* See the end of i386_push_dummy_call. */
return frame_id_build (fp + 8, get_frame_pc (this_frame));
}
+
+/* _Decimal128 function return values need 16-byte alignment on the
+ stack. */
+
+static CORE_ADDR
+i386_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp)
+{
+ return sp & -(CORE_ADDR)16;
+}
\f
/* Figure out where the longjmp will land. Slurp the args out of the
return 0;
}
+/* Implementation for set_gdbarch_push_dummy_code. */
+
+static CORE_ADDR
+i386_push_dummy_code (struct gdbarch *gdbarch, CORE_ADDR sp, CORE_ADDR funaddr,
+ struct value **args, int nargs, struct type *value_type,
+ CORE_ADDR *real_pc, CORE_ADDR *bp_addr,
+ struct regcache *regcache)
+{
+ /* Use 0xcc breakpoint - 1 byte. */
+ *bp_addr = sp - 1;
+ *real_pc = funaddr;
+
+ /* Keep the stack aligned. */
+ return sp - 16;
+}
+
static CORE_ADDR
i386_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
struct regcache *regcache, CORE_ADDR bp_addr, int nargs,
for (write_pass = 0; write_pass < 2; write_pass++)
{
int args_space_used = 0;
- int have_16_byte_aligned_arg = 0;
if (struct_return)
{
else
{
if (i386_16_byte_align_p (value_enclosing_type (args[i])))
- {
- args_space = align_up (args_space, 16);
- have_16_byte_aligned_arg = 1;
- }
+ args_space = align_up (args_space, 16);
args_space += align_up (len, 4);
}
}
if (!write_pass)
{
- if (have_16_byte_aligned_arg)
- args_space = align_up (args_space, 16);
sp -= args_space;
+
+ /* The original System V ABI only requires word alignment,
+ but modern incarnations need 16-byte alignment in order
+ to support SSE. Since wasting a few bytes here isn't
+ harmful we unconditionally enforce 16-byte alignment. */
+ sp &= ~0xf;
}
}
static const char default_struct_convention[] = "default";
static const char pcc_struct_convention[] = "pcc";
static const char reg_struct_convention[] = "reg";
-static const char *valid_conventions[] =
+static const char *const valid_conventions[] =
{
default_struct_convention,
pcc_struct_convention,
from WRITEBUF into REGCACHE. */
static enum return_value_convention
-i386_return_value (struct gdbarch *gdbarch, struct type *func_type,
+i386_return_value (struct gdbarch *gdbarch, struct value *function,
struct type *type, struct regcache *regcache,
gdb_byte *readbuf, const gdb_byte *writebuf)
{
|| code == TYPE_CODE_UNION
|| code == TYPE_CODE_ARRAY)
&& !i386_reg_struct_return_p (gdbarch, type))
+ /* Complex double and long double uses the struct return covention. */
+ || (code == TYPE_CODE_COMPLEX && TYPE_LENGTH (type) == 16)
+ || (code == TYPE_CODE_COMPLEX && TYPE_LENGTH (type) == 24)
/* 128-bit decimal float uses the struct return convention. */
|| (code == TYPE_CODE_DECFLOAT && TYPE_LENGTH (type) == 16))
{
if (code == TYPE_CODE_STRUCT && TYPE_NFIELDS (type) == 1)
{
type = check_typedef (TYPE_FIELD_TYPE (type, 0));
- return i386_return_value (gdbarch, func_type, type, regcache,
+ return i386_return_value (gdbarch, function, type, regcache,
readbuf, writebuf);
}
return tdep->i387_ext_type;
}
+/* Construct type for pseudo BND registers. We can't use
+ tdesc_find_type since a complement of one value has to be used
+ to describe the upper bound. */
+
+static struct type *
+i386_bnd_type (struct gdbarch *gdbarch)
+{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
+
+ if (!tdep->i386_bnd_type)
+ {
+ struct type *t, *bound_t;
+ const struct builtin_type *bt = builtin_type (gdbarch);
+
+ /* The type we're building is described bellow: */
+#if 0
+ struct __bound128
+ {
+ void *lbound;
+ void *ubound; /* One complement of raw ubound field. */
+ };
+#endif
+
+ t = arch_composite_type (gdbarch,
+ "__gdb_builtin_type_bound128", TYPE_CODE_STRUCT);
+
+ append_composite_type_field (t, "lbound", bt->builtin_data_ptr);
+ append_composite_type_field (t, "ubound", bt->builtin_data_ptr);
+
+ TYPE_NAME (t) = "builtin_type_bound128";
+ tdep->i386_bnd_type = t;
+ }
+
+ return tdep->i386_bnd_type;
+}
+
/* Construct vector type for pseudo YMM registers. We can't use
tdesc_find_type since YMM isn't described in target description. */
/* Return the GDB type object for the "standard" data type of data in
register REGNUM. */
-static struct type *
+struct type *
i386_pseudo_register_type (struct gdbarch *gdbarch, int regnum)
{
+ if (i386_bnd_regnum_p (gdbarch, regnum))
+ return i386_bnd_type (gdbarch);
if (i386_mmx_regnum_p (gdbarch, regnum))
return i386_mmx_type (gdbarch);
else if (i386_ymm_regnum_p (gdbarch, regnum))
return (I387_ST0_REGNUM (tdep) + fpreg);
}
-enum register_status
-i386_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
- int regnum, gdb_byte *buf)
+/* A helper function for us by i386_pseudo_register_read_value and
+ amd64_pseudo_register_read_value. It does all the work but reads
+ the data into an already-allocated value. */
+
+void
+i386_pseudo_register_read_into_value (struct gdbarch *gdbarch,
+ struct regcache *regcache,
+ int regnum,
+ struct value *result_value)
{
gdb_byte raw_buf[MAX_REGISTER_SIZE];
enum register_status status;
+ gdb_byte *buf = value_contents_raw (result_value);
if (i386_mmx_regnum_p (gdbarch, regnum))
{
/* Extract (always little endian). */
status = regcache_raw_read (regcache, fpnum, raw_buf);
if (status != REG_VALID)
- return status;
- memcpy (buf, raw_buf, register_size (gdbarch, regnum));
+ mark_value_bytes_unavailable (result_value, 0,
+ TYPE_LENGTH (value_type (result_value)));
+ else
+ memcpy (buf, raw_buf, register_size (gdbarch, regnum));
}
else
{
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ if (i386_bnd_regnum_p (gdbarch, regnum))
+ {
+ regnum -= tdep->bnd0_regnum;
+
+ /* Extract (always little endian). Read lower 128bits. */
+ status = regcache_raw_read (regcache,
+ I387_BND0R_REGNUM (tdep) + regnum,
+ raw_buf);
+ if (status != REG_VALID)
+ mark_value_bytes_unavailable (result_value, 0, 16);
+ else
+ {
+ enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ());
+ LONGEST upper, lower;
+ int size = TYPE_LENGTH (builtin_type (gdbarch)->builtin_data_ptr);
- if (i386_ymm_regnum_p (gdbarch, regnum))
+ lower = extract_unsigned_integer (raw_buf, 8, byte_order);
+ upper = extract_unsigned_integer (raw_buf + 8, 8, byte_order);
+ upper = ~upper;
+
+ memcpy (buf, &lower, size);
+ memcpy (buf + size, &upper, size);
+ }
+ }
+ else if (i386_ymm_regnum_p (gdbarch, regnum))
{
regnum -= tdep->ymm0_regnum;
I387_XMM0_REGNUM (tdep) + regnum,
raw_buf);
if (status != REG_VALID)
- return status;
- memcpy (buf, raw_buf, 16);
+ mark_value_bytes_unavailable (result_value, 0, 16);
+ else
+ memcpy (buf, raw_buf, 16);
/* Read upper 128bits. */
status = regcache_raw_read (regcache,
tdep->ymm0h_regnum + regnum,
raw_buf);
if (status != REG_VALID)
- return status;
- memcpy (buf + 16, raw_buf, 16);
+ mark_value_bytes_unavailable (result_value, 16, 32);
+ else
+ memcpy (buf + 16, raw_buf, 16);
}
else if (i386_word_regnum_p (gdbarch, regnum))
{
/* Extract (always little endian). */
status = regcache_raw_read (regcache, gpnum, raw_buf);
if (status != REG_VALID)
- return status;
- memcpy (buf, raw_buf, 2);
+ mark_value_bytes_unavailable (result_value, 0,
+ TYPE_LENGTH (value_type (result_value)));
+ else
+ memcpy (buf, raw_buf, 2);
}
else if (i386_byte_regnum_p (gdbarch, regnum))
{
upper registers. */
status = regcache_raw_read (regcache, gpnum % 4, raw_buf);
if (status != REG_VALID)
- return status;
- if (gpnum >= 4)
+ mark_value_bytes_unavailable (result_value, 0,
+ TYPE_LENGTH (value_type (result_value)));
+ else if (gpnum >= 4)
memcpy (buf, raw_buf + 1, 1);
else
memcpy (buf, raw_buf, 1);
else
internal_error (__FILE__, __LINE__, _("invalid regnum"));
}
+}
- return REG_VALID;
+static struct value *
+i386_pseudo_register_read_value (struct gdbarch *gdbarch,
+ struct regcache *regcache,
+ int regnum)
+{
+ struct value *result;
+
+ result = allocate_value (register_type (gdbarch, regnum));
+ VALUE_LVAL (result) = lval_register;
+ VALUE_REGNUM (result) = regnum;
+
+ i386_pseudo_register_read_into_value (gdbarch, regcache, regnum, result);
+
+ return result;
}
void
{
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
- if (i386_ymm_regnum_p (gdbarch, regnum))
+ if (i386_bnd_regnum_p (gdbarch, regnum))
+ {
+ ULONGEST upper, lower;
+ int size = TYPE_LENGTH (builtin_type (gdbarch)->builtin_data_ptr);
+ enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ());
+
+ /* New values from input value. */
+ regnum -= tdep->bnd0_regnum;
+ lower = extract_unsigned_integer (buf, size, byte_order);
+ upper = extract_unsigned_integer (buf + size, size, byte_order);
+
+ /* Fetching register buffer. */
+ regcache_raw_read (regcache,
+ I387_BND0R_REGNUM (tdep) + regnum,
+ raw_buf);
+
+ upper = ~upper;
+
+ /* Set register bits. */
+ memcpy (raw_buf, &lower, 8);
+ memcpy (raw_buf + 8, &upper, 8);
+
+
+ regcache_raw_write (regcache,
+ I387_BND0R_REGNUM (tdep) + regnum,
+ raw_buf);
+ }
+ else if (i386_ymm_regnum_p (gdbarch, regnum))
{
regnum -= tdep->ymm0_regnum;
/* Read a value of type TYPE from register REGNUM in frame FRAME, and
return its contents in TO. */
-static void
+static int
i386_register_to_value (struct frame_info *frame, int regnum,
- struct type *type, gdb_byte *to)
+ struct type *type, gdb_byte *to,
+ int *optimizedp, int *unavailablep)
{
struct gdbarch *gdbarch = get_frame_arch (frame);
int len = TYPE_LENGTH (type);
- /* FIXME: kettenis/20030609: What should we do if REGNUM isn't
- available in FRAME (i.e. if it wasn't saved)? */
-
if (i386_fp_regnum_p (gdbarch, regnum))
- {
- i387_register_to_value (frame, regnum, type, to);
- return;
- }
+ return i387_register_to_value (frame, regnum, type, to,
+ optimizedp, unavailablep);
/* Read a value spread across multiple registers. */
gdb_assert (regnum != -1);
gdb_assert (register_size (gdbarch, regnum) == 4);
- get_frame_register (frame, regnum, to);
+ if (!get_frame_register_bytes (frame, regnum, 0,
+ register_size (gdbarch, regnum),
+ to, optimizedp, unavailablep))
+ return 0;
+
regnum = i386_next_regnum (regnum);
len -= 4;
to += 4;
}
+
+ *optimizedp = *unavailablep = 0;
+ return 1;
}
/* Write the contents FROM of a value of type TYPE into register
unsigned long indirect =
read_memory_unsigned_integer (pc + 2, 4, byte_order);
struct minimal_symbol *indsym =
- indirect ? lookup_minimal_symbol_by_pc (indirect) : 0;
- char *symname = indsym ? SYMBOL_LINKAGE_NAME (indsym) : 0;
+ indirect ? lookup_minimal_symbol_by_pc (indirect).minsym : 0;
+ const char *symname = indsym ? SYMBOL_LINKAGE_NAME (indsym) : 0;
if (symname)
{
i386_sigtramp_p (struct frame_info *this_frame)
{
CORE_ADDR pc = get_frame_pc (this_frame);
- char *name;
+ const char *name;
find_pc_partial_function (pc, &name, NULL, NULL);
return (name && strcmp ("_sigtramp", name) == 0);
i386_svr4_sigtramp_p (struct frame_info *this_frame)
{
CORE_ADDR pc = get_frame_pc (this_frame);
- char *name;
+ const char *name;
- /* UnixWare uses _sigacthandler. The origin of the other symbols is
- currently unknown. */
+ /* The origin of these symbols is currently unknown. */
find_pc_partial_function (pc, &name, NULL, NULL);
return (name && (strcmp ("_sigreturn", name) == 0
- || strcmp ("_sigacthandler", name) == 0
|| strcmp ("sigvechandler", name) == 0));
}
return read_memory_unsigned_integer (sp + 8, 4, byte_order);
}
+
+\f
+
+/* Implementation of `gdbarch_stap_is_single_operand', as defined in
+ gdbarch.h. */
+
+int
+i386_stap_is_single_operand (struct gdbarch *gdbarch, const char *s)
+{
+ return (*s == '$' /* Literal number. */
+ || (isdigit (*s) && s[1] == '(' && s[2] == '%') /* Displacement. */
+ || (*s == '(' && s[1] == '%') /* Register indirection. */
+ || (*s == '%' && isalpha (s[1]))); /* Register access. */
+}
+
+/* Implementation of `gdbarch_stap_parse_special_token', as defined in
+ gdbarch.h. */
+
+int
+i386_stap_parse_special_token (struct gdbarch *gdbarch,
+ struct stap_parse_info *p)
+{
+ /* In order to parse special tokens, we use a state-machine that go
+ through every known token and try to get a match. */
+ enum
+ {
+ TRIPLET,
+ THREE_ARG_DISPLACEMENT,
+ DONE
+ } current_state;
+
+ current_state = TRIPLET;
+
+ /* The special tokens to be parsed here are:
+
+ - `register base + (register index * size) + offset', as represented
+ in `(%rcx,%rax,8)', or `[OFFSET](BASE_REG,INDEX_REG[,SIZE])'.
+
+ - Operands of the form `-8+3+1(%rbp)', which must be interpreted as
+ `*(-8 + 3 - 1 + (void *) $eax)'. */
+
+ while (current_state != DONE)
+ {
+ const char *s = p->arg;
+
+ switch (current_state)
+ {
+ case TRIPLET:
+ {
+ if (isdigit (*s) || *s == '-' || *s == '+')
+ {
+ int got_minus[3];
+ int i;
+ long displacements[3];
+ const char *start;
+ char *regname;
+ int len;
+ struct stoken str;
+ char *endp;
+
+ got_minus[0] = 0;
+ if (*s == '+')
+ ++s;
+ else if (*s == '-')
+ {
+ ++s;
+ got_minus[0] = 1;
+ }
+
+ displacements[0] = strtol (s, &endp, 10);
+ s = endp;
+
+ if (*s != '+' && *s != '-')
+ {
+ /* We are not dealing with a triplet. */
+ break;
+ }
+
+ got_minus[1] = 0;
+ if (*s == '+')
+ ++s;
+ else
+ {
+ ++s;
+ got_minus[1] = 1;
+ }
+
+ displacements[1] = strtol (s, &endp, 10);
+ s = endp;
+
+ if (*s != '+' && *s != '-')
+ {
+ /* We are not dealing with a triplet. */
+ break;
+ }
+
+ got_minus[2] = 0;
+ if (*s == '+')
+ ++s;
+ else
+ {
+ ++s;
+ got_minus[2] = 1;
+ }
+
+ displacements[2] = strtol (s, &endp, 10);
+ s = endp;
+
+ if (*s != '(' || s[1] != '%')
+ break;
+
+ s += 2;
+ start = s;
+
+ while (isalnum (*s))
+ ++s;
+
+ if (*s++ != ')')
+ break;
+
+ len = s - start;
+ regname = alloca (len + 1);
+
+ strncpy (regname, start, len);
+ regname[len] = '\0';
+
+ if (user_reg_map_name_to_regnum (gdbarch,
+ regname, len) == -1)
+ error (_("Invalid register name `%s' "
+ "on expression `%s'."),
+ regname, p->saved_arg);
+
+ for (i = 0; i < 3; i++)
+ {
+ write_exp_elt_opcode (OP_LONG);
+ write_exp_elt_type
+ (builtin_type (gdbarch)->builtin_long);
+ write_exp_elt_longcst (displacements[i]);
+ write_exp_elt_opcode (OP_LONG);
+ if (got_minus[i])
+ write_exp_elt_opcode (UNOP_NEG);
+ }
+
+ write_exp_elt_opcode (OP_REGISTER);
+ str.ptr = regname;
+ str.length = len;
+ write_exp_string (str);
+ write_exp_elt_opcode (OP_REGISTER);
+
+ write_exp_elt_opcode (UNOP_CAST);
+ write_exp_elt_type (builtin_type (gdbarch)->builtin_data_ptr);
+ write_exp_elt_opcode (UNOP_CAST);
+
+ write_exp_elt_opcode (BINOP_ADD);
+ write_exp_elt_opcode (BINOP_ADD);
+ write_exp_elt_opcode (BINOP_ADD);
+
+ write_exp_elt_opcode (UNOP_CAST);
+ write_exp_elt_type (lookup_pointer_type (p->arg_type));
+ write_exp_elt_opcode (UNOP_CAST);
+
+ write_exp_elt_opcode (UNOP_IND);
+
+ p->arg = s;
+
+ return 1;
+ }
+ break;
+ }
+ case THREE_ARG_DISPLACEMENT:
+ {
+ if (isdigit (*s) || *s == '(' || *s == '-' || *s == '+')
+ {
+ int offset_minus = 0;
+ long offset = 0;
+ int size_minus = 0;
+ long size = 0;
+ const char *start;
+ char *base;
+ int len_base;
+ char *index;
+ int len_index;
+ struct stoken base_token, index_token;
+
+ if (*s == '+')
+ ++s;
+ else if (*s == '-')
+ {
+ ++s;
+ offset_minus = 1;
+ }
+
+ if (offset_minus && !isdigit (*s))
+ break;
+
+ if (isdigit (*s))
+ {
+ char *endp;
+
+ offset = strtol (s, &endp, 10);
+ s = endp;
+ }
+
+ if (*s != '(' || s[1] != '%')
+ break;
+
+ s += 2;
+ start = s;
+
+ while (isalnum (*s))
+ ++s;
+
+ if (*s != ',' || s[1] != '%')
+ break;
+
+ len_base = s - start;
+ base = alloca (len_base + 1);
+ strncpy (base, start, len_base);
+ base[len_base] = '\0';
+
+ if (user_reg_map_name_to_regnum (gdbarch,
+ base, len_base) == -1)
+ error (_("Invalid register name `%s' "
+ "on expression `%s'."),
+ base, p->saved_arg);
+
+ s += 2;
+ start = s;
+
+ while (isalnum (*s))
+ ++s;
+
+ len_index = s - start;
+ index = alloca (len_index + 1);
+ strncpy (index, start, len_index);
+ index[len_index] = '\0';
+
+ if (user_reg_map_name_to_regnum (gdbarch,
+ index, len_index) == -1)
+ error (_("Invalid register name `%s' "
+ "on expression `%s'."),
+ index, p->saved_arg);
+
+ if (*s != ',' && *s != ')')
+ break;
+
+ if (*s == ',')
+ {
+ char *endp;
+
+ ++s;
+ if (*s == '+')
+ ++s;
+ else if (*s == '-')
+ {
+ ++s;
+ size_minus = 1;
+ }
+
+ size = strtol (s, &endp, 10);
+ s = endp;
+
+ if (*s != ')')
+ break;
+ }
+
+ ++s;
+
+ if (offset)
+ {
+ write_exp_elt_opcode (OP_LONG);
+ write_exp_elt_type
+ (builtin_type (gdbarch)->builtin_long);
+ write_exp_elt_longcst (offset);
+ write_exp_elt_opcode (OP_LONG);
+ if (offset_minus)
+ write_exp_elt_opcode (UNOP_NEG);
+ }
+
+ write_exp_elt_opcode (OP_REGISTER);
+ base_token.ptr = base;
+ base_token.length = len_base;
+ write_exp_string (base_token);
+ write_exp_elt_opcode (OP_REGISTER);
+
+ if (offset)
+ write_exp_elt_opcode (BINOP_ADD);
+
+ write_exp_elt_opcode (OP_REGISTER);
+ index_token.ptr = index;
+ index_token.length = len_index;
+ write_exp_string (index_token);
+ write_exp_elt_opcode (OP_REGISTER);
+
+ if (size)
+ {
+ write_exp_elt_opcode (OP_LONG);
+ write_exp_elt_type
+ (builtin_type (gdbarch)->builtin_long);
+ write_exp_elt_longcst (size);
+ write_exp_elt_opcode (OP_LONG);
+ if (size_minus)
+ write_exp_elt_opcode (UNOP_NEG);
+ write_exp_elt_opcode (BINOP_MUL);
+ }
+
+ write_exp_elt_opcode (BINOP_ADD);
+
+ write_exp_elt_opcode (UNOP_CAST);
+ write_exp_elt_type (lookup_pointer_type (p->arg_type));
+ write_exp_elt_opcode (UNOP_CAST);
+
+ write_exp_elt_opcode (UNOP_IND);
+
+ p->arg = s;
+
+ return 1;
+ }
+ break;
+ }
+ }
+
+ /* Advancing to the next state. */
+ ++current_state;
+ }
+
+ return 0;
+}
+
\f
/* Generic ELF. */
{
/* We typically use stabs-in-ELF with the SVR4 register numbering. */
set_gdbarch_stab_reg_to_regnum (gdbarch, i386_svr4_reg_to_regnum);
+
+ /* Registering SystemTap handlers. */
+ set_gdbarch_stap_integer_prefix (gdbarch, "$");
+ set_gdbarch_stap_register_prefix (gdbarch, "%");
+ set_gdbarch_stap_register_indirection_prefix (gdbarch, "(");
+ set_gdbarch_stap_register_indirection_suffix (gdbarch, ")");
+ set_gdbarch_stap_is_single_operand (gdbarch,
+ i386_stap_is_single_operand);
+ set_gdbarch_stap_parse_special_token (gdbarch,
+ i386_stap_parse_special_token);
}
/* System V Release 4 (SVR4). */
{
const struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
int fp_regnum_p, mmx_regnum_p, xmm_regnum_p, mxcsr_regnum_p,
- ymm_regnum_p, ymmh_regnum_p;
+ ymm_regnum_p, ymmh_regnum_p, bndr_regnum_p, bnd_regnum_p,
+ mpx_ctrl_regnum_p;
/* Don't include pseudo registers, except for MMX, in any register
groups. */
|| ymmh_regnum_p))
return 0;
+ bnd_regnum_p = i386_bnd_regnum_p (gdbarch, regnum);
+ if (group == all_reggroup
+ && ((bnd_regnum_p && (tdep->xcr0 & I386_XSTATE_MPX_MASK))))
+ return bnd_regnum_p;
+
+ bndr_regnum_p = i386_bndr_regnum_p (gdbarch, regnum);
+ if (group == all_reggroup
+ && ((bndr_regnum_p && (tdep->xcr0 & I386_XSTATE_MPX_MASK))))
+ return 0;
+
+ mpx_ctrl_regnum_p = i386_mpx_ctrl_regnum_p (gdbarch, regnum);
+ if (group == all_reggroup
+ && ((mpx_ctrl_regnum_p && (tdep->xcr0 & I386_XSTATE_MPX_MASK))))
+ return mpx_ctrl_regnum_p;
+
if (group == general_reggroup)
return (!fp_regnum_p
&& !mmx_regnum_p
&& !mxcsr_regnum_p
&& !xmm_regnum_p
&& !ymm_regnum_p
- && !ymmh_regnum_p);
+ && !ymmh_regnum_p
+ && !bndr_regnum_p
+ && !bnd_regnum_p
+ && !mpx_ctrl_regnum_p);
return default_register_reggroup_p (gdbarch, regnum, group);
}
{
struct gdbarch *gdbarch = get_frame_arch (frame);
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
- CORE_ADDR sp = get_frame_register_unsigned (frame, I386_ESP_REGNUM);
+ CORE_ADDR sp = get_frame_register_unsigned (frame, I386_ESP_REGNUM);
return read_memory_unsigned_integer (sp + (4 * (argi + 1)), 4, byte_order);
}
const int *regmap;
};
-/* Parse "modrm" part in current memory address that irp->addr point to
- Return -1 if something wrong. */
+/* Parse the "modrm" part of the memory address irp->addr points at.
+ Returns -1 if something goes wrong, 0 otherwise. */
static int
i386_record_modrm (struct i386_record_s *irp)
{
struct gdbarch *gdbarch = irp->gdbarch;
- if (target_read_memory (irp->addr, &irp->modrm, 1))
- {
- if (record_debug)
- printf_unfiltered (_("Process record: error reading memory at "
- "addr %s len = 1.\n"),
- paddress (gdbarch, irp->addr));
- return -1;
- }
+ if (record_read_memory (gdbarch, irp->addr, &irp->modrm, 1))
+ return -1;
+
irp->addr++;
irp->mod = (irp->modrm >> 6) & 3;
irp->reg = (irp->modrm >> 3) & 7;
return 0;
}
-/* Get the memory address that current instruction write to and set it to
- the argument "addr".
- Return -1 if something wrong. */
+/* Extract the memory address that the current instruction writes to,
+ and return it in *ADDR. Return -1 if something goes wrong. */
static int
i386_record_lea_modrm_addr (struct i386_record_s *irp, uint64_t *addr)
if (base == 4)
{
havesib = 1;
- if (target_read_memory (irp->addr, &byte, 1))
- {
- if (record_debug)
- printf_unfiltered (_("Process record: error reading memory "
- "at addr %s len = 1.\n"),
- paddress (gdbarch, irp->addr));
- return -1;
- }
+ if (record_read_memory (gdbarch, irp->addr, &byte, 1))
+ return -1;
irp->addr++;
scale = (byte >> 6) & 3;
index = ((byte >> 3) & 7) | irp->rex_x;
if ((base & 7) == 5)
{
base = 0xff;
- if (target_read_memory (irp->addr, buf, 4))
- {
- if (record_debug)
- printf_unfiltered (_("Process record: error reading "
- "memory at addr %s len = 4.\n"),
- paddress (gdbarch, irp->addr));
- return -1;
- }
+ if (record_read_memory (gdbarch, irp->addr, buf, 4))
+ return -1;
irp->addr += 4;
*addr = extract_signed_integer (buf, 4, byte_order);
if (irp->regmap[X86_RECORD_R8_REGNUM] && !havesib)
}
break;
case 1:
- if (target_read_memory (irp->addr, buf, 1))
- {
- if (record_debug)
- printf_unfiltered (_("Process record: error reading memory "
- "at addr %s len = 1.\n"),
- paddress (gdbarch, irp->addr));
- return -1;
- }
+ if (record_read_memory (gdbarch, irp->addr, buf, 1))
+ return -1;
irp->addr++;
*addr = (int8_t) buf[0];
break;
case 2:
- if (target_read_memory (irp->addr, buf, 4))
- {
- if (record_debug)
- printf_unfiltered (_("Process record: error reading memory "
- "at addr %s len = 4.\n"),
- paddress (gdbarch, irp->addr));
- return -1;
- }
+ if (record_read_memory (gdbarch, irp->addr, buf, 4))
+ return -1;
*addr = extract_signed_integer (buf, 4, byte_order);
irp->addr += 4;
break;
case 0:
if (irp->rm == 6)
{
- if (target_read_memory (irp->addr, buf, 2))
- {
- if (record_debug)
- printf_unfiltered (_("Process record: error reading "
- "memory at addr %s len = 2.\n"),
- paddress (gdbarch, irp->addr));
- return -1;
- }
+ if (record_read_memory (gdbarch, irp->addr, buf, 2))
+ return -1;
irp->addr += 2;
*addr = extract_signed_integer (buf, 2, byte_order);
irp->rm = 0;
}
break;
case 1:
- if (target_read_memory (irp->addr, buf, 1))
- {
- if (record_debug)
- printf_unfiltered (_("Process record: error reading memory "
- "at addr %s len = 1.\n"),
- paddress (gdbarch, irp->addr));
- return -1;
- }
+ if (record_read_memory (gdbarch, irp->addr, buf, 1))
+ return -1;
irp->addr++;
*addr = (int8_t) buf[0];
break;
case 2:
- if (target_read_memory (irp->addr, buf, 2))
- {
- if (record_debug)
- printf_unfiltered (_("Process record: error reading memory "
- "at addr %s len = 2.\n"),
- paddress (gdbarch, irp->addr));
- return -1;
- }
+ if (record_read_memory (gdbarch, irp->addr, buf, 2))
+ return -1;
irp->addr += 2;
*addr = extract_signed_integer (buf, 2, byte_order);
break;
return 0;
}
-/* Record the value of the memory that willbe changed in current instruction
- to "record_arch_list".
- Return -1 if something wrong. */
+/* Record the address and contents of the memory that will be changed
+ by the current instruction. Return -1 if something goes wrong, 0
+ otherwise. */
static int
i386_record_lea_modrm (struct i386_record_s *irp)
if (irp->override >= 0)
{
- if (record_memory_query)
+ if (record_full_memory_query)
{
int q;
if (i386_record_lea_modrm_addr (irp, &addr))
return -1;
- if (record_arch_list_add_mem (addr, 1 << irp->ot))
+ if (record_full_arch_list_add_mem (addr, 1 << irp->ot))
return -1;
return 0;
}
-/* Record the push operation to "record_arch_list".
- Return -1 if something wrong. */
+/* Record the effects of a push operation. Return -1 if something
+ goes wrong, 0 otherwise. */
static int
i386_record_push (struct i386_record_s *irp, int size)
{
ULONGEST addr;
- if (record_arch_list_add_reg (irp->regcache,
- irp->regmap[X86_RECORD_RESP_REGNUM]))
+ if (record_full_arch_list_add_reg (irp->regcache,
+ irp->regmap[X86_RECORD_RESP_REGNUM]))
return -1;
regcache_raw_read_unsigned (irp->regcache,
irp->regmap[X86_RECORD_RESP_REGNUM],
&addr);
- if (record_arch_list_add_mem ((CORE_ADDR) addr - size, size))
+ if (record_full_arch_list_add_mem ((CORE_ADDR) addr - size, size))
return -1;
return 0;
#define I386_SAVE_FPU_ENV 0xfffe
#define I386_SAVE_FPU_ENV_REG_STACK 0xffff
-/* Record the value of floating point registers which will be changed
- by the current instruction to "record_arch_list". Return -1 if
- something is wrong. */
+/* Record the values of the floating point registers which will be
+ changed by the current instruction. Returns -1 if something is
+ wrong, 0 otherwise. */
static int i386_record_floats (struct gdbarch *gdbarch,
struct i386_record_s *ir,
{
for (i = I387_ST0_REGNUM (tdep); i <= I387_ST0_REGNUM (tdep) + 7; i++)
{
- if (record_arch_list_add_reg (ir->regcache, i))
+ if (record_full_arch_list_add_reg (ir->regcache, i))
return -1;
}
}
{
for (i = I387_FCTRL_REGNUM (tdep); i <= I387_FOP_REGNUM (tdep); i++)
{
- if (record_arch_list_add_reg (ir->regcache, i))
+ if (record_full_arch_list_add_reg (ir->regcache, i))
return -1;
}
}
{
for (i = I387_ST0_REGNUM (tdep); i <= I387_FOP_REGNUM (tdep); i++)
{
- if (record_arch_list_add_reg (ir->regcache, i))
+ if (record_full_arch_list_add_reg (ir->regcache, i))
return -1;
}
}
else if ((iregnum >= I387_ST0_REGNUM (tdep)) &&
(iregnum <= I387_FOP_REGNUM (tdep)))
{
- if (record_arch_list_add_reg (ir->regcache,iregnum))
+ if (record_full_arch_list_add_reg (ir->regcache,iregnum))
return -1;
}
else
{
for (i = I387_FCTRL_REGNUM (tdep); i <= I387_FOP_REGNUM (tdep); i++)
{
- if (record_arch_list_add_reg (ir->regcache, i))
+ if (record_full_arch_list_add_reg (ir->regcache, i))
return -1;
}
}
return 0;
}
-/* Parse the current instruction and record the values of the registers and
- memory that will be changed in current instruction to "record_arch_list".
- Return -1 if something wrong. */
+/* Parse the current instruction, and record the values of the
+ registers and memory that will be changed by the current
+ instruction. Returns -1 if something goes wrong, 0 otherwise. */
-#define I386_RECORD_ARCH_LIST_ADD_REG(regnum) \
- record_arch_list_add_reg (ir.regcache, ir.regmap[(regnum)])
+#define I386_RECORD_FULL_ARCH_LIST_ADD_REG(regnum) \
+ record_full_arch_list_add_reg (ir.regcache, ir.regmap[(regnum)])
int
i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache,
int prefixes = 0;
int regnum = 0;
uint32_t opcode;
- uint8_t opcode8;
+ uint8_t opcode8;
ULONGEST addr;
gdb_byte buf[MAX_REGISTER_SIZE];
struct i386_record_s ir;
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
- int rex = 0;
uint8_t rex_w = -1;
uint8_t rex_r = 0;
/* prefixes */
while (1)
{
- if (target_read_memory (ir.addr, &opcode8, 1))
- {
- if (record_debug)
- printf_unfiltered (_("Process record: error reading memory at "
- "addr %s len = 1.\n"),
- paddress (gdbarch, ir.addr));
- return -1;
- }
+ if (record_read_memory (gdbarch, ir.addr, &opcode8, 1))
+ return -1;
ir.addr++;
switch (opcode8) /* Instruction prefixes */
{
if (ir.regmap[X86_RECORD_R8_REGNUM]) /* 64 bit target */
{
/* REX */
- rex = 1;
rex_w = (opcode8 >> 3) & 1;
rex_r = (opcode8 & 0x4) << 1;
ir.rex_x = (opcode8 & 0x2) << 2;
switch (opcode)
{
case 0x0f:
- if (target_read_memory (ir.addr, &opcode8, 1))
- {
- if (record_debug)
- printf_unfiltered (_("Process record: error reading memory at "
- "addr %s len = 1.\n"),
- paddress (gdbarch, ir.addr));
- return -1;
- }
+ if (record_read_memory (gdbarch, ir.addr, &opcode8, 1))
+ return -1;
ir.addr++;
opcode = (uint32_t) opcode8 | 0x0f00;
goto reswitch;
ir.rm |= ir.rex_b;
if (ir.ot == OT_BYTE && !ir.regmap[X86_RECORD_R8_REGNUM])
ir.rm &= 0x3;
- I386_RECORD_ARCH_LIST_ADD_REG (ir.rm);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.rm);
}
break;
case 1: /* OP Gv, Ev */
ir.reg |= rex_r;
if (ir.ot == OT_BYTE && !ir.regmap[X86_RECORD_R8_REGNUM])
ir.reg &= 0x3;
- I386_RECORD_ARCH_LIST_ADD_REG (ir.reg);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.reg);
break;
case 2: /* OP A, Iv */
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
break;
}
}
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
case 0x80: /* GRP1 */
return -1;
}
else
- I386_RECORD_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b);
}
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
case 0x40: /* inc */
case 0x4e:
case 0x4f:
- I386_RECORD_ARCH_LIST_ADD_REG (opcode & 7);
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (opcode & 7);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
case 0xf6: /* GRP3 */
switch (ir.reg)
{
case 0: /* test */
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
case 2: /* not */
case 3: /* neg */
ir.rm |= ir.rex_b;
if (ir.ot == OT_BYTE && !ir.regmap[X86_RECORD_R8_REGNUM])
ir.rm &= 0x3;
- I386_RECORD_ARCH_LIST_ADD_REG (ir.rm);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.rm);
}
if (ir.reg == 3) /* neg */
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
case 4: /* mul */
case 5: /* imul */
case 6: /* div */
case 7: /* idiv */
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
if (ir.ot != OT_BYTE)
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM);
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
default:
ir.addr -= 2;
ir.rm |= ir.rex_b;
if (ir.ot == OT_BYTE && !ir.regmap[X86_RECORD_R8_REGNUM])
ir.rm &= 0x3;
- I386_RECORD_ARCH_LIST_ADD_REG (ir.rm);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.rm);
}
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
case 2: /* call */
if (ir.regmap[X86_RECORD_R8_REGNUM] && ir.dflag)
ir.dflag = 2;
if (i386_record_push (&ir, 1 << (ir.dflag + 1)))
return -1;
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
case 3: /* lcall */
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_CS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_CS_REGNUM);
if (i386_record_push (&ir, 1 << (ir.dflag + 1)))
return -1;
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
case 4: /* jmp */
case 5: /* ljmp */
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
case 6: /* push */
if (ir.regmap[X86_RECORD_R8_REGNUM] && ir.dflag)
case 0x85:
case 0xa8:
case 0xa9:
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
case 0x98: /* CWDE/CBW */
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
break;
case 0x99: /* CDQ/CWD */
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM);
break;
case 0x0faf: /* imul */
ir.reg |= rex_r;
if (ir.ot == OT_BYTE && !ir.regmap[X86_RECORD_R8_REGNUM])
ir.reg &= 0x3;
- I386_RECORD_ARCH_LIST_ADD_REG (ir.reg);
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.reg);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
case 0x0fc0: /* xadd */
{
if (ir.ot == OT_BYTE && !ir.regmap[X86_RECORD_R8_REGNUM])
ir.reg &= 0x3;
- I386_RECORD_ARCH_LIST_ADD_REG (ir.reg);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.reg);
if (ir.ot == OT_BYTE && !ir.regmap[X86_RECORD_R8_REGNUM])
ir.rm &= 0x3;
- I386_RECORD_ARCH_LIST_ADD_REG (ir.rm);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.rm);
}
else
{
return -1;
if (ir.ot == OT_BYTE && !ir.regmap[X86_RECORD_R8_REGNUM])
ir.reg &= 0x3;
- I386_RECORD_ARCH_LIST_ADD_REG (ir.reg);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.reg);
}
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
case 0x0fb0: /* cmpxchg */
if (ir.mod == 3)
{
ir.reg |= rex_r;
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
if (ir.ot == OT_BYTE && !ir.regmap[X86_RECORD_R8_REGNUM])
ir.reg &= 0x3;
- I386_RECORD_ARCH_LIST_ADD_REG (ir.reg);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.reg);
}
else
{
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
if (i386_record_lea_modrm (&ir))
return -1;
}
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
case 0x0fc7: /* cmpxchg8b */
opcode = opcode << 8 | ir.modrm;
goto no_support;
}
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM);
if (i386_record_lea_modrm (&ir))
return -1;
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
case 0x50: /* push */
case 0x5d:
case 0x5e:
case 0x5f:
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM);
- I386_RECORD_ARCH_LIST_ADD_REG ((opcode & 0x7) | ir.rex_b);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG ((opcode & 0x7) | ir.rex_b);
break;
case 0x61: /* popa */
for (regnum = X86_RECORD_REAX_REGNUM;
regnum <= X86_RECORD_REDI_REGNUM;
regnum++)
- I386_RECORD_ARCH_LIST_ADD_REG (regnum);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (regnum);
break;
case 0x8f: /* pop */
if (i386_record_modrm (&ir))
return -1;
if (ir.mod == 3)
- I386_RECORD_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b);
else
{
ir.popl_esp_hack = 1 << ir.ot;
if (i386_record_lea_modrm (&ir))
return -1;
}
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM);
break;
case 0xc8: /* enter */
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REBP_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REBP_REGNUM);
if (ir.regmap[X86_RECORD_R8_REGNUM] && ir.dflag)
ir.dflag = 2;
if (i386_record_push (&ir, 1 << (ir.dflag + 1)))
break;
case 0xc9: /* leave */
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM);
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REBP_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REBP_REGNUM);
break;
case 0x07: /* pop es */
ir.addr -= 1;
goto no_support;
}
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM);
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_ES_REGNUM);
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_ES_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
case 0x17: /* pop ss */
ir.addr -= 1;
goto no_support;
}
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM);
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_SS_REGNUM);
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_SS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
case 0x1f: /* pop ds */
ir.addr -= 1;
goto no_support;
}
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM);
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_DS_REGNUM);
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_DS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
case 0x0fa1: /* pop fs */
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM);
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_FS_REGNUM);
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_FS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
case 0x0fa9: /* pop gs */
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM);
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_GS_REGNUM);
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_GS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
case 0x88: /* mov */
ir.rm |= ir.rex_b;
if (ir.ot == OT_BYTE && !ir.regmap[X86_RECORD_R8_REGNUM])
ir.rm &= 0x3;
- I386_RECORD_ARCH_LIST_ADD_REG (ir.rm);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.rm);
}
break;
ir.reg |= rex_r;
if (ir.ot == OT_BYTE && !ir.regmap[X86_RECORD_R8_REGNUM])
ir.reg &= 0x3;
- I386_RECORD_ARCH_LIST_ADD_REG (ir.reg);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.reg);
break;
case 0x8c: /* mov seg */
}
if (ir.mod == 3)
- I386_RECORD_ARCH_LIST_ADD_REG (ir.rm);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.rm);
else
{
ir.ot = OT_WORD;
goto no_support;
break;
}
- I386_RECORD_ARCH_LIST_ADD_REG (regnum);
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (regnum);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
case 0x0fb6: /* movzbS */
case 0x0fbf: /* movswS */
if (i386_record_modrm (&ir))
return -1;
- I386_RECORD_ARCH_LIST_ADD_REG (ir.reg | rex_r);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.reg | rex_r);
break;
case 0x8d: /* lea */
ir.reg |= rex_r;
if (ir.ot == OT_BYTE && !ir.regmap[X86_RECORD_R8_REGNUM])
ir.reg &= 0x3;
- I386_RECORD_ARCH_LIST_ADD_REG (ir.reg);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.reg);
break;
case 0xa0: /* mov EAX */
case 0xa1:
case 0xd7: /* xlat */
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
break;
case 0xa2: /* mov EAX */
case 0xa3:
if (ir.override >= 0)
{
- if (record_memory_query)
+ if (record_full_memory_query)
{
int q;
ir.ot = ir.dflag + OT_WORD;
if (ir.aflag == 2)
{
- if (target_read_memory (ir.addr, buf, 8))
- {
- if (record_debug)
- printf_unfiltered (_("Process record: error reading "
- "memory at addr 0x%s len = 8.\n"),
- paddress (gdbarch, ir.addr));
- return -1;
- }
+ if (record_read_memory (gdbarch, ir.addr, buf, 8))
+ return -1;
ir.addr += 8;
addr = extract_unsigned_integer (buf, 8, byte_order);
}
else if (ir.aflag)
{
- if (target_read_memory (ir.addr, buf, 4))
- {
- if (record_debug)
- printf_unfiltered (_("Process record: error reading "
- "memory at addr 0x%s len = 4.\n"),
- paddress (gdbarch, ir.addr));
- return -1;
- }
+ if (record_read_memory (gdbarch, ir.addr, buf, 4))
+ return -1;
ir.addr += 4;
addr = extract_unsigned_integer (buf, 4, byte_order);
}
else
{
- if (target_read_memory (ir.addr, buf, 2))
- {
- if (record_debug)
- printf_unfiltered (_("Process record: error reading "
- "memory at addr 0x%s len = 2.\n"),
- paddress (gdbarch, ir.addr));
- return -1;
- }
+ if (record_read_memory (gdbarch, ir.addr, buf, 2))
+ return -1;
ir.addr += 2;
addr = extract_unsigned_integer (buf, 2, byte_order);
}
- if (record_arch_list_add_mem (addr, 1 << ir.ot))
+ if (record_full_arch_list_add_mem (addr, 1 << ir.ot))
return -1;
}
break;
case 0xb5:
case 0xb6:
case 0xb7:
- I386_RECORD_ARCH_LIST_ADD_REG ((ir.regmap[X86_RECORD_R8_REGNUM])
- ? ((opcode & 0x7) | ir.rex_b)
- : ((opcode & 0x7) & 0x3));
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG ((ir.regmap[X86_RECORD_R8_REGNUM])
+ ? ((opcode & 0x7) | ir.rex_b)
+ : ((opcode & 0x7) & 0x3));
break;
case 0xb8: /* mov R, Iv */
case 0xbd:
case 0xbe:
case 0xbf:
- I386_RECORD_ARCH_LIST_ADD_REG ((opcode & 0x7) | ir.rex_b);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG ((opcode & 0x7) | ir.rex_b);
break;
case 0x91: /* xchg R, EAX */
case 0x95:
case 0x96:
case 0x97:
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
- I386_RECORD_ARCH_LIST_ADD_REG (opcode & 0x7);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (opcode & 0x7);
break;
case 0x86: /* xchg Ev, Gv */
ir.rm |= ir.rex_b;
if (ir.ot == OT_BYTE && !ir.regmap[X86_RECORD_R8_REGNUM])
ir.rm &= 0x3;
- I386_RECORD_ARCH_LIST_ADD_REG (ir.rm);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.rm);
}
else
{
ir.reg |= rex_r;
if (ir.ot == OT_BYTE && !ir.regmap[X86_RECORD_R8_REGNUM])
ir.reg &= 0x3;
- I386_RECORD_ARCH_LIST_ADD_REG (ir.reg);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.reg);
break;
case 0xc4: /* les Gv */
regnum = X86_RECORD_GS_REGNUM;
break;
}
- I386_RECORD_ARCH_LIST_ADD_REG (regnum);
- I386_RECORD_ARCH_LIST_ADD_REG (ir.reg | rex_r);
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (regnum);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.reg | rex_r);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
case 0xc0: /* shifts */
ir.rm |= ir.rex_b;
if (ir.ot == OT_BYTE && !ir.regmap[X86_RECORD_R8_REGNUM])
ir.rm &= 0x3;
- I386_RECORD_ARCH_LIST_ADD_REG (ir.rm);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.rm);
}
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
case 0x0fa4:
return -1;
if (ir.mod == 3)
{
- if (record_arch_list_add_reg (ir.regcache, ir.rm))
+ if (record_full_arch_list_add_reg (ir.regcache, ir.rm))
return -1;
}
else
switch (ir.reg >> 4)
{
case 0:
- if (record_arch_list_add_mem (addr64, 4))
+ if (record_full_arch_list_add_mem (addr64, 4))
return -1;
break;
case 2:
- if (record_arch_list_add_mem (addr64, 8))
+ if (record_full_arch_list_add_mem (addr64, 8))
return -1;
break;
case 3:
break;
default:
- if (record_arch_list_add_mem (addr64, 2))
+ if (record_full_arch_list_add_mem (addr64, 2))
return -1;
break;
}
switch (ir.reg >> 4)
{
case 0:
- if (record_arch_list_add_mem (addr64, 4))
+ if (record_full_arch_list_add_mem (addr64, 4))
return -1;
if (3 == (ir.reg & 7))
{
}
break;
case 1:
- if (record_arch_list_add_mem (addr64, 4))
+ if (record_full_arch_list_add_mem (addr64, 4))
return -1;
if ((3 == (ir.reg & 7))
|| (5 == (ir.reg & 7))
}
break;
case 2:
- if (record_arch_list_add_mem (addr64, 8))
+ if (record_full_arch_list_add_mem (addr64, 8))
return -1;
if (3 == (ir.reg & 7))
{
}
/* Fall through */
default:
- if (record_arch_list_add_mem (addr64, 2))
+ if (record_full_arch_list_add_mem (addr64, 2))
return -1;
break;
}
case 0x0e:
if (ir.dflag)
{
- if (record_arch_list_add_mem (addr64, 28))
+ if (record_full_arch_list_add_mem (addr64, 28))
return -1;
}
else
{
- if (record_arch_list_add_mem (addr64, 14))
+ if (record_full_arch_list_add_mem (addr64, 14))
return -1;
}
break;
case 0x0f:
case 0x2f:
- if (record_arch_list_add_mem (addr64, 2))
+ if (record_full_arch_list_add_mem (addr64, 2))
return -1;
/* Insn fstp, fbstp. */
if (i386_record_floats (gdbarch, &ir, I386_SAVE_FPU_REGS))
break;
case 0x1f:
case 0x3e:
- if (record_arch_list_add_mem (addr64, 10))
+ if (record_full_arch_list_add_mem (addr64, 10))
return -1;
break;
case 0x2e:
if (ir.dflag)
{
- if (record_arch_list_add_mem (addr64, 28))
+ if (record_full_arch_list_add_mem (addr64, 28))
return -1;
addr64 += 28;
}
else
{
- if (record_arch_list_add_mem (addr64, 14))
+ if (record_full_arch_list_add_mem (addr64, 14))
return -1;
addr64 += 14;
}
- if (record_arch_list_add_mem (addr64, 80))
+ if (record_full_arch_list_add_mem (addr64, 80))
return -1;
/* Insn fsave. */
if (i386_record_floats (gdbarch, &ir,
return -1;
break;
case 0x3f:
- if (record_arch_list_add_mem (addr64, 8))
+ if (record_full_arch_list_add_mem (addr64, 8))
return -1;
/* Insn fistp. */
if (i386_record_floats (gdbarch, &ir, I386_SAVE_FPU_REGS))
case 0xdf:
if (0xe0 == ir.modrm)
{
- if (record_arch_list_add_reg (ir.regcache, I386_EAX_REGNUM))
+ if (record_full_arch_list_add_reg (ir.regcache,
+ I386_EAX_REGNUM))
return -1;
}
else if ((0x0f == ir.modrm >> 4) || (0x0e == ir.modrm >> 4))
if (ir.aflag && (es != ds))
{
/* addr += ((uint32_t) read_register (I386_ES_REGNUM)) << 4; */
- if (record_memory_query)
+ if (record_full_memory_query)
{
int q;
}
else
{
- if (record_arch_list_add_mem (addr, 1 << ir.ot))
+ if (record_full_arch_list_add_mem (addr, 1 << ir.ot))
return -1;
}
if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ))
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM);
if (opcode == 0xa4 || opcode == 0xa5)
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM);
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM);
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
}
break;
case 0xa6: /* cmpsS */
case 0xa7:
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM);
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM);
if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ))
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM);
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
case 0xac: /* lodsS */
case 0xad:
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM);
if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ))
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM);
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
case 0xae: /* scasS */
case 0xaf:
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM);
if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ))
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM);
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
case 0x6e: /* outsS */
case 0x6f:
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM);
if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ))
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM);
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
case 0xe4: /* port I/O */
case 0xe5:
case 0xec:
case 0xed:
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
break;
case 0xe6:
/* control */
case 0xc2: /* ret im */
case 0xc3: /* ret */
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM);
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
case 0xca: /* lret im */
case 0xcb: /* lret */
case 0xcf: /* iret */
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_CS_REGNUM);
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM);
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_CS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
case 0xe8: /* call im */
ir.addr -= 1;
goto no_support;
}
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_CS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_CS_REGNUM);
if (i386_record_push (&ir, 1 << (ir.dflag + 1)))
return -1;
break;
case 0x0f9d:
case 0x0f9e:
case 0x0f9f:
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
ir.ot = OT_BYTE;
if (i386_record_modrm (&ir))
return -1;
if (ir.mod == 3)
- I386_RECORD_ARCH_LIST_ADD_REG (ir.rex_b ? (ir.rm | ir.rex_b)
- : (ir.rm & 0x3));
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.rex_b ? (ir.rm | ir.rex_b)
+ : (ir.rm & 0x3));
else
{
if (i386_record_lea_modrm (&ir))
ir.reg |= rex_r;
if (ir.dflag == OT_BYTE)
ir.reg &= 0x3;
- I386_RECORD_ARCH_LIST_ADD_REG (ir.reg);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.reg);
break;
/* flags */
case 0x9c: /* pushf */
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
if (ir.regmap[X86_RECORD_R8_REGNUM] && ir.dflag)
ir.dflag = 2;
if (i386_record_push (&ir, 1 << (ir.dflag + 1)))
break;
case 0x9d: /* popf */
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM);
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
case 0x9e: /* sahf */
case 0xf9: /* stc */
case 0xfc: /* cld */
case 0xfd: /* std */
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
case 0x9f: /* lahf */
ir.addr -= 1;
goto no_support;
}
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
break;
/* bit operations */
if (ir.reg != 4)
{
if (ir.mod == 3)
- I386_RECORD_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b);
else
{
if (i386_record_lea_modrm (&ir))
return -1;
}
}
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
case 0x0fa3: /* bt Gv, Ev */
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
case 0x0fab: /* bts */
if (i386_record_modrm (&ir))
return -1;
if (ir.mod == 3)
- I386_RECORD_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b);
else
{
uint64_t addr64;
addr64 += ((int64_t) addr >> 6) << 6;
break;
}
- if (record_arch_list_add_mem (addr64, 1 << ir.ot))
+ if (record_full_arch_list_add_mem (addr64, 1 << ir.ot))
return -1;
if (i386_record_lea_modrm (&ir))
return -1;
}
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
case 0x0fbc: /* bsf */
case 0x0fbd: /* bsr */
- I386_RECORD_ARCH_LIST_ADD_REG (ir.reg | rex_r);
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.reg | rex_r);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
/* bcd */
ir.addr -= 1;
goto no_support;
}
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
/* misc */
break;
case 0x9b: /* fwait */
- if (target_read_memory (ir.addr, &opcode8, 1))
- {
- if (record_debug)
- printf_unfiltered (_("Process record: error reading memory at "
- "addr 0x%s len = 1.\n"),
- paddress (gdbarch, ir.addr));
- return -1;
- }
+ if (record_read_memory (gdbarch, ir.addr, &opcode8, 1))
+ return -1;
opcode = (uint32_t) opcode8;
ir.addr++;
goto reswitch;
{
int ret;
uint8_t interrupt;
- if (target_read_memory (ir.addr, &interrupt, 1))
- {
- if (record_debug)
- printf_unfiltered (_("Process record: error reading memory "
- "at addr %s len = 1.\n"),
- paddress (gdbarch, ir.addr));
- return -1;
- }
+ if (record_read_memory (gdbarch, ir.addr, &interrupt, 1))
+ return -1;
ir.addr++;
if (interrupt != 0x80
|| tdep->i386_intx80_record == NULL)
case 0x0fcd:
case 0x0fce:
case 0x0fcf:
- I386_RECORD_ARCH_LIST_ADD_REG ((opcode & 7) | ir.rex_b);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG ((opcode & 7) | ir.rex_b);
break;
case 0xd6: /* salc */
ir.addr -= 1;
goto no_support;
}
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
case 0xe0: /* loopnz */
case 0xe1: /* loopz */
case 0xe2: /* loop */
case 0xe3: /* jecxz */
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM);
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
case 0x0f30: /* wrmsr */
break;
case 0x0f31: /* rdtsc */
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM);
break;
case 0x0f34: /* sysenter */
break;
case 0x0fa2: /* cpuid */
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM);
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM);
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REBX_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REBX_REGNUM);
break;
case 0xf4: /* hlt */
case 0: /* sldt */
case 1: /* str */
if (ir.mod == 3)
- I386_RECORD_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b);
else
{
ir.ot = OT_WORD;
break;
case 4: /* verr */
case 5: /* verw */
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
default:
ir.addr -= 3;
}
if (ir.override >= 0)
{
- if (record_memory_query)
+ if (record_full_memory_query)
{
int q;
{
if (i386_record_lea_modrm_addr (&ir, &addr64))
return -1;
- if (record_arch_list_add_mem (addr64, 2))
+ if (record_full_arch_list_add_mem (addr64, 2))
return -1;
addr64 += 2;
if (ir.regmap[X86_RECORD_R8_REGNUM])
{
- if (record_arch_list_add_mem (addr64, 8))
+ if (record_full_arch_list_add_mem (addr64, 8))
return -1;
}
else
{
- if (record_arch_list_add_mem (addr64, 4))
+ if (record_full_arch_list_add_mem (addr64, 4))
return -1;
}
}
case 0: /* monitor */
break;
case 1: /* mwait */
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
default:
ir.addr -= 3;
/* sidt */
if (ir.override >= 0)
{
- if (record_memory_query)
+ if (record_full_memory_query)
{
int q;
if (i386_record_lea_modrm_addr (&ir, &addr64))
return -1;
- if (record_arch_list_add_mem (addr64, 2))
+ if (record_full_arch_list_add_mem (addr64, 2))
return -1;
addr64 += 2;
if (ir.regmap[X86_RECORD_R8_REGNUM])
{
- if (record_arch_list_add_mem (addr64, 8))
+ if (record_full_arch_list_add_mem (addr64, 8))
return -1;
}
else
{
- if (record_arch_list_add_mem (addr64, 4))
+ if (record_full_arch_list_add_mem (addr64, 4))
return -1;
}
}
/* xgetbv */
if (ir.rm == 0)
{
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM);
break;
}
/* xsetbv */
case 4: /* smsw */
if (ir.mod == 3)
{
- if (record_arch_list_add_reg (ir.regcache, ir.rm | ir.rex_b))
+ if (record_full_arch_list_add_reg (ir.regcache, ir.rm | ir.rex_b))
return -1;
}
else
if (i386_record_lea_modrm (&ir))
return -1;
}
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
case 6: /* lmsw */
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
case 7: /* invlpg */
if (ir.mod == 3)
{
if (ir.rm == 0 && ir.regmap[X86_RECORD_R8_REGNUM])
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_GS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_GS_REGNUM);
else
{
ir.addr -= 3;
}
}
else
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
default:
ir.addr -= 3;
return -1;
if (ir.mod == 3 || ir.regmap[X86_RECORD_R8_REGNUM])
{
- I386_RECORD_ARCH_LIST_ADD_REG (ir.regmap[X86_RECORD_R8_REGNUM]
- ? (ir.reg | rex_r) : ir.rm);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.regmap[X86_RECORD_R8_REGNUM]
+ ? (ir.reg | rex_r) : ir.rm);
}
else
{
return -1;
}
if (!ir.regmap[X86_RECORD_R8_REGNUM])
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
case 0x0f02: /* lar */
case 0x0f03: /* lsl */
if (i386_record_modrm (&ir))
return -1;
- I386_RECORD_ARCH_LIST_ADD_REG (ir.reg | rex_r);
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.reg | rex_r);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
case 0x0f18:
case 4:
case 8:
if (opcode & 2)
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
else
- I386_RECORD_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b);
break;
default:
ir.addr -= 3;
goto no_support;
}
if (opcode & 2)
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
else
- I386_RECORD_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b);
break;
case 0x0f06: /* clts */
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
/* MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 */
case 0x0f77: /* emms */
if (i386_fpc_regnum_p (gdbarch, I387_FTAG_REGNUM(tdep)))
goto no_support;
- record_arch_list_add_reg (ir.regcache, I387_FTAG_REGNUM(tdep));
+ record_full_arch_list_add_reg (ir.regcache, I387_FTAG_REGNUM(tdep));
break;
case 0x0f0f: /* 3DNow! data */
if (i386_record_modrm (&ir))
return -1;
- if (target_read_memory (ir.addr, &opcode8, 1))
- {
- printf_unfiltered (_("Process record: error reading memory at "
- "addr %s len = 1.\n"),
- paddress (gdbarch, ir.addr));
- return -1;
- }
+ if (record_read_memory (gdbarch, ir.addr, &opcode8, 1))
+ return -1;
ir.addr++;
switch (opcode8)
{
case 0xbf: /* 3DNow! pavgusb */
if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.reg))
goto no_support_3dnow_data;
- record_arch_list_add_reg (ir.regcache, ir.reg);
+ record_full_arch_list_add_reg (ir.regcache, ir.reg);
break;
default:
break;
case 0x0faa: /* rsm */
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM);
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM);
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REBX_REGNUM);
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM);
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REBP_REGNUM);
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM);
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REBX_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REBP_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM);
break;
case 0x0fae:
{
uint64_t tmpu64;
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
if (i386_record_lea_modrm_addr (&ir, &tmpu64))
return -1;
- if (record_arch_list_add_mem (tmpu64, 512))
+ if (record_full_arch_list_add_mem (tmpu64, 512))
return -1;
}
break;
{
int i;
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
for (i = I387_MM0_REGNUM (tdep);
i386_mmx_regnum_p (gdbarch, i); i++)
- record_arch_list_add_reg (ir.regcache, i);
+ record_full_arch_list_add_reg (ir.regcache, i);
for (i = I387_XMM0_REGNUM (tdep);
i386_xmm_regnum_p (gdbarch, i); i++)
- record_arch_list_add_reg (ir.regcache, i);
+ record_full_arch_list_add_reg (ir.regcache, i);
if (i386_mxcsr_regnum_p (gdbarch, I387_MXCSR_REGNUM(tdep)))
- record_arch_list_add_reg (ir.regcache, I387_MXCSR_REGNUM(tdep));
+ record_full_arch_list_add_reg (ir.regcache,
+ I387_MXCSR_REGNUM(tdep));
for (i = I387_ST0_REGNUM (tdep);
i386_fp_regnum_p (gdbarch, i); i++)
- record_arch_list_add_reg (ir.regcache, i);
+ record_full_arch_list_add_reg (ir.regcache, i);
for (i = I387_FCTRL_REGNUM (tdep);
i386_fpc_regnum_p (gdbarch, i); i++)
- record_arch_list_add_reg (ir.regcache, i);
+ record_full_arch_list_add_reg (ir.regcache, i);
}
break;
case 2: /* ldmxcsr */
if (!i386_mxcsr_regnum_p (gdbarch, I387_MXCSR_REGNUM(tdep)))
goto no_support;
- record_arch_list_add_reg (ir.regcache, I387_MXCSR_REGNUM(tdep));
+ record_full_arch_list_add_reg (ir.regcache, I387_MXCSR_REGNUM(tdep));
break;
case 3: /* stmxcsr */
case 0xf20f38:
case 0x0f3a:
case 0x660f3a:
- if (target_read_memory (ir.addr, &opcode8, 1))
- {
- printf_unfiltered (_("Process record: error reading memory at "
- "addr %s len = 1.\n"),
- paddress (gdbarch, ir.addr));
- return -1;
- }
+ if (record_read_memory (gdbarch, ir.addr, &opcode8, 1))
+ return -1;
ir.addr++;
opcode = (uint32_t) opcode8 | opcode << 8;
goto reswitch_prefix_add;
ir.reg |= rex_r;
if (!i386_xmm_regnum_p (gdbarch, I387_XMM0_REGNUM (tdep) + ir.reg))
goto no_support;
- record_arch_list_add_reg (ir.regcache,
- I387_XMM0_REGNUM (tdep) + ir.reg);
+ record_full_arch_list_add_reg (ir.regcache,
+ I387_XMM0_REGNUM (tdep) + ir.reg);
if ((opcode & 0xfffffffc) == 0x660f3a60)
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
case 0x0f11: /* movups */
if (!i386_xmm_regnum_p (gdbarch,
I387_XMM0_REGNUM (tdep) + ir.rm))
goto no_support;
- record_arch_list_add_reg (ir.regcache,
- I387_XMM0_REGNUM (tdep) + ir.rm);
+ record_full_arch_list_add_reg (ir.regcache,
+ I387_XMM0_REGNUM (tdep) + ir.rm);
}
else
{
case 0x660fc5: /* pextrw */
case 0x0fd7: /* pmovmskb */
case 0x660fd7: /* pmovmskb */
- I386_RECORD_ARCH_LIST_ADD_REG (ir.reg | rex_r);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.reg | rex_r);
break;
case 0x0f3800: /* pshufb */
return -1;
if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.reg))
goto no_support;
- record_arch_list_add_reg (ir.regcache,
- I387_MM0_REGNUM (tdep) + ir.reg);
+ record_full_arch_list_add_reg (ir.regcache,
+ I387_MM0_REGNUM (tdep) + ir.reg);
break;
case 0x0f71: /* psllw */
return -1;
if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.rm))
goto no_support;
- record_arch_list_add_reg (ir.regcache,
- I387_MM0_REGNUM (tdep) + ir.rm);
+ record_full_arch_list_add_reg (ir.regcache,
+ I387_MM0_REGNUM (tdep) + ir.rm);
break;
case 0x660f71: /* psllw */
ir.rm |= ir.rex_b;
if (!i386_xmm_regnum_p (gdbarch, I387_XMM0_REGNUM (tdep) + ir.rm))
goto no_support;
- record_arch_list_add_reg (ir.regcache,
- I387_XMM0_REGNUM (tdep) + ir.rm);
+ record_full_arch_list_add_reg (ir.regcache,
+ I387_XMM0_REGNUM (tdep) + ir.rm);
break;
case 0x0f7e: /* movd */
if (i386_record_modrm (&ir))
return -1;
if (ir.mod == 3)
- I386_RECORD_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b);
else
{
if (ir.dflag == 2)
{
if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.rm))
goto no_support;
- record_arch_list_add_reg (ir.regcache,
- I387_MM0_REGNUM (tdep) + ir.rm);
+ record_full_arch_list_add_reg (ir.regcache,
+ I387_MM0_REGNUM (tdep) + ir.rm);
}
else
{
case 0xf30fb8: /* popcnt */
if (i386_record_modrm (&ir))
return -1;
- I386_RECORD_ARCH_LIST_ADD_REG (ir.reg);
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.reg);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
case 0x660fd6: /* movq */
if (!i386_xmm_regnum_p (gdbarch,
I387_XMM0_REGNUM (tdep) + ir.rm))
goto no_support;
- record_arch_list_add_reg (ir.regcache,
- I387_XMM0_REGNUM (tdep) + ir.rm);
+ record_full_arch_list_add_reg (ir.regcache,
+ I387_XMM0_REGNUM (tdep) + ir.rm);
}
else
{
case 0x660f2e: /* ucomisd */
case 0x0f2f: /* comiss */
case 0x660f2f: /* comisd */
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
case 0x0ff7: /* maskmovq */
regcache_raw_read_unsigned (ir.regcache,
ir.regmap[X86_RECORD_REDI_REGNUM],
&addr);
- if (record_arch_list_add_mem (addr, 64))
+ if (record_full_arch_list_add_mem (addr, 64))
return -1;
break;
regcache_raw_read_unsigned (ir.regcache,
ir.regmap[X86_RECORD_REDI_REGNUM],
&addr);
- if (record_arch_list_add_mem (addr, 128))
+ if (record_full_arch_list_add_mem (addr, 128))
return -1;
break;
}
/* In the future, maybe still need to deal with need_dasm. */
- I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REIP_REGNUM);
- if (record_arch_list_add_end ())
+ I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REIP_REGNUM);
+ if (record_full_arch_list_add_end ())
return -1;
return 0;
};
/* Check that the given address appears suitable for a fast
- tracepoint, which on x86 means that we need an instruction of at
+ tracepoint, which on x86-64 means that we need an instruction of at
least 5 bytes, so that we can overwrite it with a 4-byte-offset
jump and not have to worry about program jumps to an address in the
- middle of the tracepoint jump. Returns 1 if OK, and writes a size
+ middle of the tracepoint jump. On x86, it may be possible to use
+ 4-byte jumps with a 2-byte offset to a trampoline located in the
+ bottom 64 KiB of memory. Returns 1 if OK, and writes a size
of instruction to replace, and 0 if not, plus an explanatory
string. */
int len, jumplen;
static struct ui_file *gdb_null = NULL;
- /* This is based on the target agent using a 4-byte relative jump.
- Alternate future possibilities include 8-byte offset for x86-84,
- or 3-byte jumps if the program has trampoline space close by. */
- jumplen = 5;
+ /* Ask the target for the minimum instruction length supported. */
+ jumplen = target_get_min_fast_tracepoint_insn_len ();
+
+ if (jumplen < 0)
+ {
+ /* If the target does not support the get_min_fast_tracepoint_insn_len
+ operation, assume that fast tracepoints will always be implemented
+ using 4-byte relative jumps on both x86 and x86-64. */
+ jumplen = 5;
+ }
+ else if (jumplen == 0)
+ {
+ /* If the target does support get_min_fast_tracepoint_insn_len but
+ returns zero, then the IPA has not loaded yet. In this case,
+ we optimistically assume that truncated 2-byte relative jumps
+ will be available on x86, and compensate later if this assumption
+ turns out to be incorrect. On x86-64 architectures, 4-byte relative
+ jumps will always be used. */
+ jumplen = (register_size (gdbarch, 0) == 8) ? 5 : 4;
+ }
/* Dummy file descriptor for the disassembler. */
if (!gdb_null)
/* Check for fit. */
len = gdb_print_insn (gdbarch, addr, gdb_null, NULL);
+ if (isize)
+ *isize = len;
+
if (len < jumplen)
{
/* Return a bit of target-specific detail to add to the caller's
len, jumplen);
return 0;
}
-
- if (isize)
- *isize = len;
- if (msg)
- *msg = NULL;
- return 1;
+ else
+ {
+ if (msg)
+ *msg = NULL;
+ return 1;
+ }
}
static int
{
const struct target_desc *tdesc = tdep->tdesc;
const struct tdesc_feature *feature_core;
- const struct tdesc_feature *feature_sse, *feature_avx;
+ const struct tdesc_feature *feature_sse, *feature_avx, *feature_mpx;
int i, num_regs, valid_p;
if (! tdesc_has_registers (tdesc))
/* Try AVX registers. */
feature_avx = tdesc_find_feature (tdesc, "org.gnu.gdb.i386.avx");
+ /* Try MPX registers. */
+ feature_mpx = tdesc_find_feature (tdesc, "org.gnu.gdb.i386.mpx");
+
valid_p = 1;
/* The XCR0 bits. */
tdep->register_names[i]);
}
+ if (feature_mpx)
+ {
+ tdep->xcr0 = I386_XSTATE_MPX_MASK;
+
+ if (tdep->bnd0r_regnum < 0)
+ {
+ tdep->mpx_register_names = i386_mpx_names;
+ tdep->bnd0r_regnum = I386_BND0R_REGNUM;
+ tdep->bndcfgu_regnum = I386_BNDCFGU_REGNUM;
+ }
+
+ for (i = 0; i < I387_NUM_MPX_REGS; i++)
+ valid_p &= tdesc_numbered_register (feature_mpx, tdesc_data,
+ I387_BND0R_REGNUM (tdep) + i,
+ tdep->mpx_register_names[i]);
+ }
+
return valid_p;
}
const struct target_desc *tdesc;
int mm0_regnum;
int ymm0_regnum;
+ int bnd0_regnum;
+ int num_bnd_cooked;
/* If there is already a candidate, use it. */
arches = gdbarch_list_lookup_by_info (arches, &info);
tdep->record_regmap = i386_record_regmap;
+ set_gdbarch_long_long_align_bit (gdbarch, 32);
+
/* The format used for `long double' on almost all i386 targets is
the i387 extended floating-point format. In fact, of all targets
in the GCC 2.95 tree, only OSF/1 does it different, and insists
set_gdbarch_get_longjmp_target (gdbarch, i386_get_longjmp_target);
/* Call dummy code. */
+ set_gdbarch_call_dummy_location (gdbarch, ON_STACK);
+ set_gdbarch_push_dummy_code (gdbarch, i386_push_dummy_code);
set_gdbarch_push_dummy_call (gdbarch, i386_push_dummy_call);
+ set_gdbarch_frame_align (gdbarch, i386_frame_align);
set_gdbarch_convert_register_p (gdbarch, i386_convert_register_p);
set_gdbarch_register_to_value (gdbarch, i386_register_to_value);
set_gdbarch_fetch_pointer_argument (gdbarch, i386_fetch_pointer_argument);
/* Hook the function epilogue frame unwinder. This unwinder is
- appended to the list first, so that it supercedes the Dwarf
- unwinder in function epilogues (where the Dwarf unwinder
+ appended to the list first, so that it supercedes the DWARF
+ unwinder in function epilogues (where the DWARF unwinder
currently fails). */
frame_unwind_append_unwinder (gdbarch, &i386_epilogue_frame_unwind);
/* Hook in the DWARF CFI frame unwinder. This unwinder is appended
- to the list before the prologue-based unwinders, so that Dwarf
+ to the list before the prologue-based unwinders, so that DWARF
CFI info will be used if it is available. */
dwarf2_append_unwinders (gdbarch);
frame_base_set_default (gdbarch, &i386_frame_base);
/* Pseudo registers may be changed by amd64_init_abi. */
- set_gdbarch_pseudo_register_read (gdbarch, i386_pseudo_register_read);
+ set_gdbarch_pseudo_register_read_value (gdbarch,
+ i386_pseudo_register_read_value);
set_gdbarch_pseudo_register_write (gdbarch, i386_pseudo_register_write);
set_tdesc_pseudo_register_type (gdbarch, i386_pseudo_register_type);
/* Even though the default ABI only includes general-purpose registers,
floating-point registers and the SSE registers, we have to leave a
- gap for the upper AVX registers. */
- set_gdbarch_num_regs (gdbarch, I386_AVX_NUM_REGS);
+ gap for the upper AVX registers and the MPX registers. */
+ set_gdbarch_num_regs (gdbarch, I386_MPX_NUM_REGS);
/* Get the x86 target description from INFO. */
tdesc = info.target_desc;
tdep->num_mmx_regs = 8;
tdep->num_ymm_regs = 0;
+ /* No MPX registers. */
+ tdep->bnd0r_regnum = -1;
+ tdep->bndcfgu_regnum = -1;
+
tdesc_data = tdesc_data_alloc ();
set_gdbarch_relocate_instruction (gdbarch, i386_relocate_instruction);
+ set_gdbarch_gen_return_address (gdbarch, i386_gen_return_address);
+
/* Hook in ABI-specific overrides, if they have been registered. */
info.tdep_info = (void *) tdesc_data;
gdbarch_init_osabi (info, gdbarch);
return NULL;
}
+ num_bnd_cooked = (tdep->bnd0r_regnum > 0 ? I387_NUM_BND_REGS : 0);
+
/* Wire in pseudo registers. Number of pseudo registers may be
changed. */
set_gdbarch_num_pseudo_regs (gdbarch, (tdep->num_byte_regs
+ tdep->num_word_regs
+ tdep->num_dword_regs
+ tdep->num_mmx_regs
- + tdep->num_ymm_regs));
+ + tdep->num_ymm_regs
+ + num_bnd_cooked));
/* Target description may be changed. */
tdesc = tdep->tdesc;
else
tdep->ymm0_regnum = -1;
+ bnd0_regnum = mm0_regnum;
if (tdep->num_mmx_regs != 0)
{
/* Support MMX pseudo-register if MMX hasn't been disabled. */
tdep->mm0_regnum = mm0_regnum;
+ bnd0_regnum += tdep->num_mmx_regs;
}
else
tdep->mm0_regnum = -1;
+ if (tdep->bnd0r_regnum > 0)
+ tdep->bnd0_regnum = bnd0_regnum;
+ else
+ tdep-> bnd0_regnum = -1;
+
/* Hook in the legacy prologue-based unwinders last (fallback). */
+ frame_unwind_append_unwinder (gdbarch, &i386_stack_tramp_frame_unwind);
frame_unwind_append_unwinder (gdbarch, &i386_sigtramp_frame_unwind);
frame_unwind_append_unwinder (gdbarch, &i386_frame_unwind);
initialize_tdesc_i386 ();
initialize_tdesc_i386_mmx ();
initialize_tdesc_i386_avx ();
+ initialize_tdesc_i386_mpx ();
/* Tell remote stub that we support XML target description. */
register_remote_support_xml ("i386");
projects / deliverable / binutils-gdb.git / blobdiff