/* Intel 386 target-dependent stuff.
- Copyright (C) 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
- 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009,
- 2010, 2011 Free Software Foundation, Inc.
+ Copyright (C) 1988-2012 Free Software Foundation, Inc.
This file is part of GDB.
#include "dis-asm.h"
#include "disasm.h"
#include "remote.h"
-
+#include "exceptions.h"
#include "gdb_assert.h"
#include "gdb_string.h"
#include "features/i386/i386-avx.c"
#include "features/i386/i386-mmx.c"
+#include "ax.h"
+#include "ax-gdb.h"
+
/* Register names. */
static const char *i386_register_names[] =
its legitimate values. */
static const char att_flavor[] = "att";
static const char intel_flavor[] = "intel";
-static const char *valid_flavors[] =
+static const char *const valid_flavors[] =
{
att_flavor,
intel_flavor,
{
/* Base address. */
CORE_ADDR base;
+ int base_p;
LONGEST sp_offset;
CORE_ADDR pc;
cache = FRAME_OBSTACK_ZALLOC (struct i386_frame_cache);
/* Base address. */
+ cache->base_p = 0;
cache->base = 0;
cache->sp_offset = -4;
cache->pc = 0;
gdb_byte mask[I386_MAX_MATCHED_INSN_LEN];
};
-/* Search for the instruction at PC in the list SKIP_INSNS. Return
- the first instruction description that matches. Otherwise, return
- NULL. */
+/* Return whether instruction at PC matches PATTERN. */
-static struct i386_insn *
-i386_match_insn (CORE_ADDR pc, struct i386_insn *skip_insns)
+static int
+i386_match_pattern (CORE_ADDR pc, struct i386_insn pattern)
{
- struct i386_insn *insn;
gdb_byte op;
if (target_read_memory (pc, &op, 1))
- return NULL;
+ return 0;
- for (insn = skip_insns; insn->len > 0; insn++)
+ if ((op & pattern.mask[0]) == pattern.insn[0])
{
- if ((op & insn->mask[0]) == insn->insn[0])
- {
- gdb_byte buf[I386_MAX_MATCHED_INSN_LEN - 1];
- int insn_matched = 1;
- size_t i;
-
- gdb_assert (insn->len > 1);
- gdb_assert (insn->len <= I386_MAX_MATCHED_INSN_LEN);
+ gdb_byte buf[I386_MAX_MATCHED_INSN_LEN - 1];
+ int insn_matched = 1;
+ size_t i;
- if (target_read_memory (pc + 1, buf, insn->len - 1))
- return NULL;
+ gdb_assert (pattern.len > 1);
+ gdb_assert (pattern.len <= I386_MAX_MATCHED_INSN_LEN);
- for (i = 1; i < insn->len; i++)
- {
- if ((buf[i - 1] & insn->mask[i]) != insn->insn[i])
- insn_matched = 0;
- }
+ if (target_read_memory (pc + 1, buf, pattern.len - 1))
+ return 0;
- if (insn_matched)
- return insn;
+ for (i = 1; i < pattern.len; i++)
+ {
+ if ((buf[i - 1] & pattern.mask[i]) != pattern.insn[i])
+ insn_matched = 0;
}
+ return insn_matched;
+ }
+ return 0;
+}
+
+/* Search for the instruction at PC in the list INSN_PATTERNS. Return
+ the first instruction description that matches. Otherwise, return
+ NULL. */
+
+static struct i386_insn *
+i386_match_insn (CORE_ADDR pc, struct i386_insn *insn_patterns)
+{
+ struct i386_insn *pattern;
+
+ for (pattern = insn_patterns; pattern->len > 0; pattern++)
+ {
+ if (i386_match_pattern (pc, *pattern))
+ return pattern;
}
return NULL;
}
+/* Return whether PC points inside a sequence of instructions that
+ matches INSN_PATTERNS. */
+
+static int
+i386_match_insn_block (CORE_ADDR pc, struct i386_insn *insn_patterns)
+{
+ CORE_ADDR current_pc;
+ int ix, i;
+ gdb_byte op;
+ struct i386_insn *insn;
+
+ insn = i386_match_insn (pc, insn_patterns);
+ if (insn == NULL)
+ return 0;
+
+ current_pc = pc;
+ ix = insn - insn_patterns;
+ for (i = ix - 1; i >= 0; i--)
+ {
+ current_pc -= insn_patterns[i].len;
+
+ if (!i386_match_pattern (current_pc, insn_patterns[i]))
+ return 0;
+ }
+
+ current_pc = pc + insn->len;
+ for (insn = insn_patterns + ix + 1; insn->len > 0; insn++)
+ {
+ if (!i386_match_pattern (current_pc, *insn))
+ return 0;
+
+ current_pc += insn->len;
+ }
+
+ return 1;
+}
+
/* Some special instructions that might be migrated by GCC into the
part of the prologue that sets up the new stack frame. Because the
stack frame hasn't been setup yet, no registers have been saved
/* Normal frames. */
-static struct i386_frame_cache *
-i386_frame_cache (struct frame_info *this_frame, void **this_cache)
+static void
+i386_frame_cache_1 (struct frame_info *this_frame,
+ struct i386_frame_cache *cache)
{
struct gdbarch *gdbarch = get_frame_arch (this_frame);
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
- struct i386_frame_cache *cache;
gdb_byte buf[4];
int i;
- if (*this_cache)
- return *this_cache;
-
- cache = i386_alloc_frame_cache ();
- *this_cache = cache;
+ cache->pc = get_frame_func (this_frame);
/* In principle, for normal frames, %ebp holds the frame pointer,
which holds the base address for the current stack frame.
get_frame_register (this_frame, I386_EBP_REGNUM, buf);
cache->base = extract_unsigned_integer (buf, 4, byte_order);
if (cache->base == 0)
- return cache;
+ {
+ cache->base_p = 1;
+ return;
+ }
/* For normal frames, %eip is stored at 4(%ebp). */
cache->saved_regs[I386_EIP_REGNUM] = 4;
- cache->pc = get_frame_func (this_frame);
if (cache->pc != 0)
i386_analyze_prologue (gdbarch, cache->pc, get_frame_pc (this_frame),
cache);
- if (cache->saved_sp_reg != -1)
- {
- /* Saved stack pointer has been saved. */
- get_frame_register (this_frame, cache->saved_sp_reg, buf);
- cache->saved_sp = extract_unsigned_integer (buf, 4, byte_order);
- }
-
if (cache->locals < 0)
{
/* We didn't find a valid frame, which means that CACHE->base
if (cache->saved_sp_reg != -1)
{
+ /* Saved stack pointer has been saved. */
+ get_frame_register (this_frame, cache->saved_sp_reg, buf);
+ cache->saved_sp = extract_unsigned_integer (buf, 4, byte_order);
+
/* We're halfway aligning the stack. */
cache->base = ((cache->saved_sp - 4) & 0xfffffff0) - 4;
cache->saved_regs[I386_EIP_REGNUM] = cache->saved_sp - 4;
cache->saved_regs[I386_EBP_REGNUM] = 0;
}
+ if (cache->saved_sp_reg != -1)
+ {
+ /* Saved stack pointer has been saved (but the SAVED_SP_REG
+ register may be unavailable). */
+ if (cache->saved_sp == 0
+ && frame_register_read (this_frame, cache->saved_sp_reg, buf))
+ cache->saved_sp = extract_unsigned_integer (buf, 4, byte_order);
+ }
/* Now that we have the base address for the stack frame we can
calculate the value of %esp in the calling frame. */
- if (cache->saved_sp == 0)
+ else if (cache->saved_sp == 0)
cache->saved_sp = cache->base + 8;
/* Adjust all the saved registers such that they contain addresses
if (cache->saved_regs[i] != -1)
cache->saved_regs[i] += cache->base;
+ cache->base_p = 1;
+}
+
+static struct i386_frame_cache *
+i386_frame_cache (struct frame_info *this_frame, void **this_cache)
+{
+ volatile struct gdb_exception ex;
+ struct i386_frame_cache *cache;
+
+ if (*this_cache)
+ return *this_cache;
+
+ cache = i386_alloc_frame_cache ();
+ *this_cache = cache;
+
+ TRY_CATCH (ex, RETURN_MASK_ERROR)
+ {
+ i386_frame_cache_1 (this_frame, cache);
+ }
+ if (ex.reason < 0 && ex.error != NOT_AVAILABLE_ERROR)
+ throw_exception (ex);
+
return cache;
}
(*this_id) = frame_id_build (cache->base + 8, cache->pc);
}
+static enum unwind_stop_reason
+i386_frame_unwind_stop_reason (struct frame_info *this_frame,
+ void **this_cache)
+{
+ struct i386_frame_cache *cache = i386_frame_cache (this_frame, this_cache);
+
+ if (!cache->base_p)
+ return UNWIND_UNAVAILABLE;
+
+ /* This marks the outermost frame. */
+ if (cache->base == 0)
+ return UNWIND_OUTERMOST;
+
+ return UNWIND_NO_REASON;
+}
+
static struct value *
i386_frame_prev_register (struct frame_info *this_frame, void **this_cache,
int regnum)
if (regnum == I386_EIP_REGNUM && cache->pc_in_eax)
return frame_unwind_got_register (this_frame, regnum, I386_EAX_REGNUM);
- if (regnum == I386_ESP_REGNUM && cache->saved_sp)
- return frame_unwind_got_constant (this_frame, regnum, cache->saved_sp);
+ if (regnum == I386_ESP_REGNUM
+ && (cache->saved_sp != 0 || cache->saved_sp_reg != -1))
+ {
+ /* If the SP has been saved, but we don't know where, then this
+ means that SAVED_SP_REG register was found unavailable back
+ when we built the cache. */
+ if (cache->saved_sp == 0)
+ return frame_unwind_got_register (this_frame, regnum,
+ cache->saved_sp_reg);
+ else
+ return frame_unwind_got_constant (this_frame, regnum,
+ cache->saved_sp);
+ }
if (regnum < I386_NUM_SAVED_REGS && cache->saved_regs[regnum] != -1)
return frame_unwind_got_memory (this_frame, regnum,
static const struct frame_unwind i386_frame_unwind =
{
NORMAL_FRAME,
+ i386_frame_unwind_stop_reason,
i386_frame_this_id,
i386_frame_prev_register,
NULL,
i386_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc)
{
gdb_byte insn;
+ struct symtab *symtab;
+
+ symtab = find_pc_symtab (pc);
+ if (symtab && symtab->epilogue_unwind_valid)
+ return 0;
if (target_read_memory (pc, &insn, 1))
return 0; /* Can't read memory at pc. */
static struct i386_frame_cache *
i386_epilogue_frame_cache (struct frame_info *this_frame, void **this_cache)
{
- struct gdbarch *gdbarch = get_frame_arch (this_frame);
- enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+ volatile struct gdb_exception ex;
struct i386_frame_cache *cache;
- gdb_byte buf[4];
+ CORE_ADDR sp;
if (*this_cache)
return *this_cache;
cache = i386_alloc_frame_cache ();
*this_cache = cache;
- /* Cache base will be %esp plus cache->sp_offset (-4). */
- get_frame_register (this_frame, I386_ESP_REGNUM, buf);
- cache->base = extract_unsigned_integer (buf, 4,
- byte_order) + cache->sp_offset;
-
- /* Cache pc will be the frame func. */
- cache->pc = get_frame_pc (this_frame);
+ TRY_CATCH (ex, RETURN_MASK_ERROR)
+ {
+ cache->pc = get_frame_func (this_frame);
- /* The saved %esp will be at cache->base plus 8. */
- cache->saved_sp = cache->base + 8;
+ /* At this point the stack looks as if we just entered the
+ function, with the return address at the top of the
+ stack. */
+ sp = get_frame_register_unsigned (this_frame, I386_ESP_REGNUM);
+ cache->base = sp + cache->sp_offset;
+ cache->saved_sp = cache->base + 8;
+ cache->saved_regs[I386_EIP_REGNUM] = cache->base + 4;
- /* The saved %eip will be at cache->base plus 4. */
- cache->saved_regs[I386_EIP_REGNUM] = cache->base + 4;
+ cache->base_p = 1;
+ }
+ if (ex.reason < 0 && ex.error != NOT_AVAILABLE_ERROR)
+ throw_exception (ex);
return cache;
}
+static enum unwind_stop_reason
+i386_epilogue_frame_unwind_stop_reason (struct frame_info *this_frame,
+ void **this_cache)
+{
+ struct i386_frame_cache *cache =
+ i386_epilogue_frame_cache (this_frame, this_cache);
+
+ if (!cache->base_p)
+ return UNWIND_UNAVAILABLE;
+
+ return UNWIND_NO_REASON;
+}
+
static void
i386_epilogue_frame_this_id (struct frame_info *this_frame,
void **this_cache,
struct frame_id *this_id)
{
- struct i386_frame_cache *cache = i386_epilogue_frame_cache (this_frame,
- this_cache);
+ struct i386_frame_cache *cache =
+ i386_epilogue_frame_cache (this_frame, this_cache);
+
+ if (!cache->base_p)
+ return;
(*this_id) = frame_id_build (cache->base + 8, cache->pc);
}
+static struct value *
+i386_epilogue_frame_prev_register (struct frame_info *this_frame,
+ void **this_cache, int regnum)
+{
+ /* Make sure we've initialized the cache. */
+ i386_epilogue_frame_cache (this_frame, this_cache);
+
+ return i386_frame_prev_register (this_frame, this_cache, regnum);
+}
+
static const struct frame_unwind i386_epilogue_frame_unwind =
{
NORMAL_FRAME,
+ i386_epilogue_frame_unwind_stop_reason,
i386_epilogue_frame_this_id,
- i386_frame_prev_register,
+ i386_epilogue_frame_prev_register,
NULL,
i386_epilogue_frame_sniffer
};
\f
+/* Stack-based trampolines. */
+
+/* These trampolines are used on cross x86 targets, when taking the
+ address of a nested function. When executing these trampolines,
+ no stack frame is set up, so we are in a similar situation as in
+ epilogues and i386_epilogue_frame_this_id can be re-used. */
+
+/* Static chain passed in register. */
+
+struct i386_insn i386_tramp_chain_in_reg_insns[] =
+{
+ /* `movl imm32, %eax' and `movl imm32, %ecx' */
+ { 5, { 0xb8 }, { 0xfe } },
+
+ /* `jmp imm32' */
+ { 5, { 0xe9 }, { 0xff } },
+
+ {0}
+};
+
+/* Static chain passed on stack (when regparm=3). */
+
+struct i386_insn i386_tramp_chain_on_stack_insns[] =
+{
+ /* `push imm32' */
+ { 5, { 0x68 }, { 0xff } },
+
+ /* `jmp imm32' */
+ { 5, { 0xe9 }, { 0xff } },
+
+ {0}
+};
+
+/* Return whether PC points inside a stack trampoline. */
+
+static int
+i386_in_stack_tramp_p (struct gdbarch *gdbarch, CORE_ADDR pc)
+{
+ gdb_byte insn;
+ char *name;
+
+ /* A stack trampoline is detected if no name is associated
+ to the current pc and if it points inside a trampoline
+ sequence. */
+
+ find_pc_partial_function (pc, &name, NULL, NULL);
+ if (name)
+ return 0;
+
+ if (target_read_memory (pc, &insn, 1))
+ return 0;
+
+ if (!i386_match_insn_block (pc, i386_tramp_chain_in_reg_insns)
+ && !i386_match_insn_block (pc, i386_tramp_chain_on_stack_insns))
+ return 0;
+
+ return 1;
+}
+
+static int
+i386_stack_tramp_frame_sniffer (const struct frame_unwind *self,
+ struct frame_info *this_frame,
+ void **this_cache)
+{
+ if (frame_relative_level (this_frame) == 0)
+ return i386_in_stack_tramp_p (get_frame_arch (this_frame),
+ get_frame_pc (this_frame));
+ else
+ return 0;
+}
+
+static const struct frame_unwind i386_stack_tramp_frame_unwind =
+{
+ NORMAL_FRAME,
+ i386_epilogue_frame_unwind_stop_reason,
+ i386_epilogue_frame_this_id,
+ i386_epilogue_frame_prev_register,
+ NULL,
+ i386_stack_tramp_frame_sniffer
+};
+\f
+/* Generate a bytecode expression to get the value of the saved PC. */
+
+static void
+i386_gen_return_address (struct gdbarch *gdbarch,
+ struct agent_expr *ax, struct axs_value *value,
+ CORE_ADDR scope)
+{
+ /* The following sequence assumes the traditional use of the base
+ register. */
+ ax_reg (ax, I386_EBP_REGNUM);
+ ax_const_l (ax, 4);
+ ax_simple (ax, aop_add);
+ value->type = register_type (gdbarch, I386_EIP_REGNUM);
+ value->kind = axs_lvalue_memory;
+}
+\f
+
/* Signal trampolines. */
static struct i386_frame_cache *
struct gdbarch *gdbarch = get_frame_arch (this_frame);
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+ volatile struct gdb_exception ex;
struct i386_frame_cache *cache;
CORE_ADDR addr;
gdb_byte buf[4];
cache = i386_alloc_frame_cache ();
- get_frame_register (this_frame, I386_ESP_REGNUM, buf);
- cache->base = extract_unsigned_integer (buf, 4, byte_order) - 4;
-
- addr = tdep->sigcontext_addr (this_frame);
- if (tdep->sc_reg_offset)
+ TRY_CATCH (ex, RETURN_MASK_ERROR)
{
- int i;
+ get_frame_register (this_frame, I386_ESP_REGNUM, buf);
+ cache->base = extract_unsigned_integer (buf, 4, byte_order) - 4;
- gdb_assert (tdep->sc_num_regs <= I386_NUM_SAVED_REGS);
+ addr = tdep->sigcontext_addr (this_frame);
+ if (tdep->sc_reg_offset)
+ {
+ int i;
- for (i = 0; i < tdep->sc_num_regs; i++)
- if (tdep->sc_reg_offset[i] != -1)
- cache->saved_regs[i] = addr + tdep->sc_reg_offset[i];
- }
- else
- {
- cache->saved_regs[I386_EIP_REGNUM] = addr + tdep->sc_pc_offset;
- cache->saved_regs[I386_ESP_REGNUM] = addr + tdep->sc_sp_offset;
+ gdb_assert (tdep->sc_num_regs <= I386_NUM_SAVED_REGS);
+
+ for (i = 0; i < tdep->sc_num_regs; i++)
+ if (tdep->sc_reg_offset[i] != -1)
+ cache->saved_regs[i] = addr + tdep->sc_reg_offset[i];
+ }
+ else
+ {
+ cache->saved_regs[I386_EIP_REGNUM] = addr + tdep->sc_pc_offset;
+ cache->saved_regs[I386_ESP_REGNUM] = addr + tdep->sc_sp_offset;
+ }
+
+ cache->base_p = 1;
}
+ if (ex.reason < 0 && ex.error != NOT_AVAILABLE_ERROR)
+ throw_exception (ex);
*this_cache = cache;
return cache;
}
+static enum unwind_stop_reason
+i386_sigtramp_frame_unwind_stop_reason (struct frame_info *this_frame,
+ void **this_cache)
+{
+ struct i386_frame_cache *cache =
+ i386_sigtramp_frame_cache (this_frame, this_cache);
+
+ if (!cache->base_p)
+ return UNWIND_UNAVAILABLE;
+
+ return UNWIND_NO_REASON;
+}
+
static void
i386_sigtramp_frame_this_id (struct frame_info *this_frame, void **this_cache,
struct frame_id *this_id)
struct i386_frame_cache *cache =
i386_sigtramp_frame_cache (this_frame, this_cache);
+ if (!cache->base_p)
+ return;
+
/* See the end of i386_push_dummy_call. */
(*this_id) = frame_id_build (cache->base + 8, get_frame_pc (this_frame));
}
static const struct frame_unwind i386_sigtramp_frame_unwind =
{
SIGTRAMP_FRAME,
+ i386_sigtramp_frame_unwind_stop_reason,
i386_sigtramp_frame_this_id,
i386_sigtramp_frame_prev_register,
NULL,
/* See the end of i386_push_dummy_call. */
return frame_id_build (fp + 8, get_frame_pc (this_frame));
}
+
+/* _Decimal128 function return values need 16-byte alignment on the
+ stack. */
+
+static CORE_ADDR
+i386_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp)
+{
+ return sp & -(CORE_ADDR)16;
+}
\f
/* Figure out where the longjmp will land. Slurp the args out of the
static const char default_struct_convention[] = "default";
static const char pcc_struct_convention[] = "pcc";
static const char reg_struct_convention[] = "reg";
-static const char *valid_conventions[] =
+static const char *const valid_conventions[] =
{
default_struct_convention,
pcc_struct_convention,
return (I387_ST0_REGNUM (tdep) + fpreg);
}
-enum register_status
-i386_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
- int regnum, gdb_byte *buf)
+/* A helper function for us by i386_pseudo_register_read_value and
+ amd64_pseudo_register_read_value. It does all the work but reads
+ the data into an already-allocated value. */
+
+void
+i386_pseudo_register_read_into_value (struct gdbarch *gdbarch,
+ struct regcache *regcache,
+ int regnum,
+ struct value *result_value)
{
gdb_byte raw_buf[MAX_REGISTER_SIZE];
enum register_status status;
+ gdb_byte *buf = value_contents_raw (result_value);
if (i386_mmx_regnum_p (gdbarch, regnum))
{
/* Extract (always little endian). */
status = regcache_raw_read (regcache, fpnum, raw_buf);
if (status != REG_VALID)
- return status;
- memcpy (buf, raw_buf, register_size (gdbarch, regnum));
+ mark_value_bytes_unavailable (result_value, 0,
+ TYPE_LENGTH (value_type (result_value)));
+ else
+ memcpy (buf, raw_buf, register_size (gdbarch, regnum));
}
else
{
I387_XMM0_REGNUM (tdep) + regnum,
raw_buf);
if (status != REG_VALID)
- return status;
- memcpy (buf, raw_buf, 16);
+ mark_value_bytes_unavailable (result_value, 0, 16);
+ else
+ memcpy (buf, raw_buf, 16);
/* Read upper 128bits. */
status = regcache_raw_read (regcache,
tdep->ymm0h_regnum + regnum,
raw_buf);
if (status != REG_VALID)
- return status;
- memcpy (buf + 16, raw_buf, 16);
+ mark_value_bytes_unavailable (result_value, 16, 32);
+ else
+ memcpy (buf + 16, raw_buf, 16);
}
else if (i386_word_regnum_p (gdbarch, regnum))
{
/* Extract (always little endian). */
status = regcache_raw_read (regcache, gpnum, raw_buf);
if (status != REG_VALID)
- return status;
- memcpy (buf, raw_buf, 2);
+ mark_value_bytes_unavailable (result_value, 0,
+ TYPE_LENGTH (value_type (result_value)));
+ else
+ memcpy (buf, raw_buf, 2);
}
else if (i386_byte_regnum_p (gdbarch, regnum))
{
upper registers. */
status = regcache_raw_read (regcache, gpnum % 4, raw_buf);
if (status != REG_VALID)
- return status;
- if (gpnum >= 4)
+ mark_value_bytes_unavailable (result_value, 0,
+ TYPE_LENGTH (value_type (result_value)));
+ else if (gpnum >= 4)
memcpy (buf, raw_buf + 1, 1);
else
memcpy (buf, raw_buf, 1);
else
internal_error (__FILE__, __LINE__, _("invalid regnum"));
}
+}
+
+static struct value *
+i386_pseudo_register_read_value (struct gdbarch *gdbarch,
+ struct regcache *regcache,
+ int regnum)
+{
+ struct value *result;
+
+ result = allocate_value (register_type (gdbarch, regnum));
+ VALUE_LVAL (result) = lval_register;
+ VALUE_REGNUM (result) = regnum;
- return REG_VALID;
+ i386_pseudo_register_read_into_value (gdbarch, regcache, regnum, result);
+
+ return result;
}
void
/* Read a value of type TYPE from register REGNUM in frame FRAME, and
return its contents in TO. */
-static void
+static int
i386_register_to_value (struct frame_info *frame, int regnum,
- struct type *type, gdb_byte *to)
+ struct type *type, gdb_byte *to,
+ int *optimizedp, int *unavailablep)
{
struct gdbarch *gdbarch = get_frame_arch (frame);
int len = TYPE_LENGTH (type);
- /* FIXME: kettenis/20030609: What should we do if REGNUM isn't
- available in FRAME (i.e. if it wasn't saved)? */
-
if (i386_fp_regnum_p (gdbarch, regnum))
- {
- i387_register_to_value (frame, regnum, type, to);
- return;
- }
+ return i387_register_to_value (frame, regnum, type, to,
+ optimizedp, unavailablep);
/* Read a value spread across multiple registers. */
gdb_assert (regnum != -1);
gdb_assert (register_size (gdbarch, regnum) == 4);
- get_frame_register (frame, regnum, to);
+ if (!get_frame_register_bytes (frame, regnum, 0,
+ register_size (gdbarch, regnum),
+ to, optimizedp, unavailablep))
+ return 0;
+
regnum = i386_next_regnum (regnum);
len -= 4;
to += 4;
}
+
+ *optimizedp = *unavailablep = 0;
+ return 1;
}
/* Write the contents FROM of a value of type TYPE into register
};
/* Check that the given address appears suitable for a fast
- tracepoint, which on x86 means that we need an instruction of at
+ tracepoint, which on x86-64 means that we need an instruction of at
least 5 bytes, so that we can overwrite it with a 4-byte-offset
jump and not have to worry about program jumps to an address in the
- middle of the tracepoint jump. Returns 1 if OK, and writes a size
+ middle of the tracepoint jump. On x86, it may be possible to use
+ 4-byte jumps with a 2-byte offset to a trampoline located in the
+ bottom 64 KiB of memory. Returns 1 if OK, and writes a size
of instruction to replace, and 0 if not, plus an explanatory
string. */
int len, jumplen;
static struct ui_file *gdb_null = NULL;
- /* This is based on the target agent using a 4-byte relative jump.
- Alternate future possibilities include 8-byte offset for x86-84,
- or 3-byte jumps if the program has trampoline space close by. */
- jumplen = 5;
+ /* Ask the target for the minimum instruction length supported. */
+ jumplen = target_get_min_fast_tracepoint_insn_len ();
+
+ if (jumplen < 0)
+ {
+ /* If the target does not support the get_min_fast_tracepoint_insn_len
+ operation, assume that fast tracepoints will always be implemented
+ using 4-byte relative jumps on both x86 and x86-64. */
+ jumplen = 5;
+ }
+ else if (jumplen == 0)
+ {
+ /* If the target does support get_min_fast_tracepoint_insn_len but
+ returns zero, then the IPA has not loaded yet. In this case,
+ we optimistically assume that truncated 2-byte relative jumps
+ will be available on x86, and compensate later if this assumption
+ turns out to be incorrect. On x86-64 architectures, 4-byte relative
+ jumps will always be used. */
+ jumplen = (register_size (gdbarch, 0) == 8) ? 5 : 4;
+ }
/* Dummy file descriptor for the disassembler. */
if (!gdb_null)
/* Check for fit. */
len = gdb_print_insn (gdbarch, addr, gdb_null, NULL);
+ if (isize)
+ *isize = len;
+
if (len < jumplen)
{
/* Return a bit of target-specific detail to add to the caller's
len, jumplen);
return 0;
}
-
- if (isize)
- *isize = len;
- if (msg)
- *msg = NULL;
- return 1;
+ else
+ {
+ if (msg)
+ *msg = NULL;
+ return 1;
+ }
}
static int
tdep->record_regmap = i386_record_regmap;
+ set_gdbarch_long_long_align_bit (gdbarch, 32);
+
/* The format used for `long double' on almost all i386 targets is
the i387 extended floating-point format. In fact, of all targets
in the GCC 2.95 tree, only OSF/1 does it different, and insists
/* Call dummy code. */
set_gdbarch_push_dummy_call (gdbarch, i386_push_dummy_call);
+ set_gdbarch_frame_align (gdbarch, i386_frame_align);
set_gdbarch_convert_register_p (gdbarch, i386_convert_register_p);
set_gdbarch_register_to_value (gdbarch, i386_register_to_value);
set_gdbarch_fetch_pointer_argument (gdbarch, i386_fetch_pointer_argument);
/* Hook the function epilogue frame unwinder. This unwinder is
- appended to the list first, so that it supercedes the Dwarf
- unwinder in function epilogues (where the Dwarf unwinder
+ appended to the list first, so that it supercedes the DWARF
+ unwinder in function epilogues (where the DWARF unwinder
currently fails). */
frame_unwind_append_unwinder (gdbarch, &i386_epilogue_frame_unwind);
/* Hook in the DWARF CFI frame unwinder. This unwinder is appended
- to the list before the prologue-based unwinders, so that Dwarf
+ to the list before the prologue-based unwinders, so that DWARF
CFI info will be used if it is available. */
dwarf2_append_unwinders (gdbarch);
frame_base_set_default (gdbarch, &i386_frame_base);
/* Pseudo registers may be changed by amd64_init_abi. */
- set_gdbarch_pseudo_register_read (gdbarch, i386_pseudo_register_read);
+ set_gdbarch_pseudo_register_read_value (gdbarch,
+ i386_pseudo_register_read_value);
set_gdbarch_pseudo_register_write (gdbarch, i386_pseudo_register_write);
set_tdesc_pseudo_register_type (gdbarch, i386_pseudo_register_type);
set_gdbarch_relocate_instruction (gdbarch, i386_relocate_instruction);
+ set_gdbarch_gen_return_address (gdbarch, i386_gen_return_address);
+
/* Hook in ABI-specific overrides, if they have been registered. */
info.tdep_info = (void *) tdesc_data;
gdbarch_init_osabi (info, gdbarch);
tdep->mm0_regnum = -1;
/* Hook in the legacy prologue-based unwinders last (fallback). */
+ frame_unwind_append_unwinder (gdbarch, &i386_stack_tramp_frame_unwind);
frame_unwind_append_unwinder (gdbarch, &i386_sigtramp_frame_unwind);
frame_unwind_append_unwinder (gdbarch, &i386_frame_unwind);
projects / deliverable / binutils-gdb.git / blobdiff