/* Target-dependent code for the i386.
- Copyright (C) 2001, 2002, 2003, 2004, 2006, 2007, 2008, 2009
- Free Software Foundation, Inc.
+ Copyright (C) 2001-2019 Free Software Foundation, Inc.
This file is part of GDB.
#ifndef I386_TDEP_H
#define I386_TDEP_H
+#include "gdbarch.h"
+#include "infrun.h"
+
struct frame_info;
struct gdbarch;
struct reggroup;
struct gdbarch_tdep
{
/* General-purpose registers. */
- struct regset *gregset;
int *gregset_reg_offset;
int gregset_num_regs;
size_t sizeof_gregset;
/* Floating-point registers. */
- struct regset *fpregset;
size_t sizeof_fpregset;
/* Register number for %st(0). The register numbers for the other
absence of an FPU. */
int st0_regnum;
+ /* Number of MMX registers. */
+ int num_mmx_regs;
+
/* Register number for %mm0. Set this to -1 to indicate the absence
of MMX support. */
int mm0_regnum;
+ /* Number of pseudo YMM registers. */
+ int num_ymm_regs;
+
+ /* Register number for %ymm0. Set this to -1 to indicate the absence
+ of pseudo YMM register support. */
+ int ymm0_regnum;
+
+ /* Number of AVX512 OpMask registers (K-registers) */
+ int num_k_regs;
+
+ /* Register number for %k0. Set this to -1 to indicate the absence
+ of AVX512 OpMask register support. */
+ int k0_regnum;
+
+ /* Number of pseudo ZMM registers ($zmm0-$zmm31). */
+ int num_zmm_regs;
+
+ /* Register number for %zmm0. Set this to -1 to indicate the absence
+ of pseudo ZMM register support. */
+ int zmm0_regnum;
+
+ /* Number of byte registers. */
+ int num_byte_regs;
+
+ /* Register pseudo number for %al. */
+ int al_regnum;
+
+ /* Number of pseudo word registers. */
+ int num_word_regs;
+
+ /* Register number for %ax. */
+ int ax_regnum;
+
+ /* Number of pseudo dword registers. */
+ int num_dword_regs;
+
+ /* Register number for %eax. Set this to -1 to indicate the absence
+ of pseudo dword register support. */
+ int eax_regnum;
+
+ /* Number of core registers. */
+ int num_core_regs;
+
/* Number of SSE registers. */
int num_xmm_regs;
+ /* Number of SSE registers added in AVX512. */
+ int num_xmm_avx512_regs;
+
+ /* Register number of XMM16, the first XMM register added in AVX512. */
+ int xmm16_regnum;
+
+ /* Number of YMM registers added in AVX512. */
+ int num_ymm_avx512_regs;
+
+ /* Register number of YMM16, the first YMM register added in AVX512. */
+ int ymm16_regnum;
+
+ /* Bits of the extended control register 0 (the XFEATURE_ENABLED_MASK
+ register), excluding the x87 bit, which are supported by this GDB. */
+
+ uint64_t xcr0;
+
+ /* Offset of XCR0 in XSAVE extended state. */
+ int xsave_xcr0_offset;
+
+ /* Register names. */
+ const char **register_names;
+
+ /* Register number for %ymm0h. Set this to -1 to indicate the absence
+ of upper YMM register support. */
+ int ymm0h_regnum;
+
+ /* Upper YMM register names. Only used for tdesc_numbered_register. */
+ const char **ymmh_register_names;
+
+ /* Register number for %ymm16h. Set this to -1 to indicate the absence
+ of support for YMM16-31. */
+ int ymm16h_regnum;
+
+ /* YMM16-31 register names. Only used for tdesc_numbered_register. */
+ const char **ymm16h_register_names;
+
+ /* Register number for %bnd0r. Set this to -1 to indicate the absence
+ bound registers. */
+ int bnd0r_regnum;
+
+ /* Register number for pseudo register %bnd0. Set this to -1 to indicate the absence
+ bound registers. */
+ int bnd0_regnum;
+
+ /* Register number for %bndcfgu. Set this to -1 to indicate the absence
+ bound control registers. */
+ int bndcfgu_regnum;
+
+ /* MPX register names. Only used for tdesc_numbered_register. */
+ const char **mpx_register_names;
+
+ /* Register number for %zmm0h. Set this to -1 to indicate the absence
+ of ZMM_HI256 register support. */
+ int zmm0h_regnum;
+
+ /* OpMask register names. */
+ const char **k_register_names;
+
+ /* ZMM register names. Only used for tdesc_numbered_register. */
+ const char **zmmh_register_names;
+
+ /* XMM16-31 register names. Only used for tdesc_numbered_register. */
+ const char **xmm_avx512_register_names;
+
+ /* YMM16-31 register names. Only used for tdesc_numbered_register. */
+ const char **ymm_avx512_register_names;
+
+ /* Number of PKEYS registers. */
+ int num_pkeys_regs;
+
+ /* Register number for PKRU register. */
+ int pkru_regnum;
+
+ /* PKEYS register names. */
+ const char **pkeys_register_names;
+
+ /* Register number for %fsbase. Set this to -1 to indicate the
+ absence of segment base registers. */
+ int fsbase_regnum;
+
+ /* Target description. */
+ const struct target_desc *tdesc;
+
+ /* Register group function. */
+ gdbarch_register_reggroup_p_ftype *register_reggroup_p;
+
/* Offset of saved PC in jmp_buf. */
int jb_pc_offset;
/* ISA-specific data types. */
struct type *i386_mmx_type;
- struct type *i386_sse_type;
+ struct type *i386_ymm_type;
+ struct type *i386_zmm_type;
+ struct type *i387_ext_type;
+ struct type *i386_bnd_type;
+
+ /* Process record/replay target. */
+ /* The map for registers because the AMD64's registers order
+ in GDB is not same as I386 instructions. */
+ const int *record_regmap;
+ /* Parse intx80 args. */
+ int (*i386_intx80_record) (struct regcache *regcache);
+ /* Parse sysenter args. */
+ int (*i386_sysenter_record) (struct regcache *regcache);
+ /* Parse syscall args. */
+ int (*i386_syscall_record) (struct regcache *regcache);
+
+ /* Regsets. */
+ const struct regset *fpregset;
};
/* Floating-point registers. */
-/* All FPU control regusters (except for FIOFF and FOOFF) are 16-bit
+/* All FPU control registers (except for FIOFF and FOOFF) are 16-bit
(at most) in the FPU, but are zero-extended to 32 bits in GDB's
register cache. */
I386_ES_REGNUM, /* %es */
I386_FS_REGNUM, /* %fs */
I386_GS_REGNUM, /* %gs */
- I386_ST0_REGNUM /* %st(0) */
+ I386_ST0_REGNUM, /* %st(0) */
+ I386_MXCSR_REGNUM = 40, /* %mxcsr */
+ I386_YMM0H_REGNUM, /* %ymm0h */
+ I386_YMM7H_REGNUM = I386_YMM0H_REGNUM + 7,
+ I386_BND0R_REGNUM,
+ I386_BND3R_REGNUM = I386_BND0R_REGNUM + 3,
+ I386_BNDCFGU_REGNUM,
+ I386_BNDSTATUS_REGNUM,
+ I386_K0_REGNUM, /* %k0 */
+ I386_K7_REGNUM = I386_K0_REGNUM + 7,
+ I386_ZMM0H_REGNUM, /* %zmm0h */
+ I386_ZMM7H_REGNUM = I386_ZMM0H_REGNUM + 7,
+ I386_PKRU_REGNUM,
+ I386_FSBASE_REGNUM,
+ I386_GSBASE_REGNUM
+};
+
+/* Register numbers of RECORD_REGMAP. */
+
+enum record_i386_regnum
+{
+ X86_RECORD_REAX_REGNUM,
+ X86_RECORD_RECX_REGNUM,
+ X86_RECORD_REDX_REGNUM,
+ X86_RECORD_REBX_REGNUM,
+ X86_RECORD_RESP_REGNUM,
+ X86_RECORD_REBP_REGNUM,
+ X86_RECORD_RESI_REGNUM,
+ X86_RECORD_REDI_REGNUM,
+ X86_RECORD_R8_REGNUM,
+ X86_RECORD_R9_REGNUM,
+ X86_RECORD_R10_REGNUM,
+ X86_RECORD_R11_REGNUM,
+ X86_RECORD_R12_REGNUM,
+ X86_RECORD_R13_REGNUM,
+ X86_RECORD_R14_REGNUM,
+ X86_RECORD_R15_REGNUM,
+ X86_RECORD_REIP_REGNUM,
+ X86_RECORD_EFLAGS_REGNUM,
+ X86_RECORD_CS_REGNUM,
+ X86_RECORD_SS_REGNUM,
+ X86_RECORD_DS_REGNUM,
+ X86_RECORD_ES_REGNUM,
+ X86_RECORD_FS_REGNUM,
+ X86_RECORD_GS_REGNUM,
};
#define I386_NUM_GREGS 16
-#define I386_NUM_FREGS 16
#define I386_NUM_XREGS 9
-#define I386_SSE_NUM_REGS (I386_NUM_GREGS + I386_NUM_FREGS \
- + I386_NUM_XREGS)
+#define I386_SSE_NUM_REGS (I386_MXCSR_REGNUM + 1)
+#define I386_AVX_NUM_REGS (I386_YMM7H_REGNUM + 1)
+#define I386_MPX_NUM_REGS (I386_BNDSTATUS_REGNUM + 1)
+#define I386_AVX512_NUM_REGS (I386_ZMM7H_REGNUM + 1)
+#define I386_PKEYS_NUM_REGS (I386_PKRU_REGNUM + 1)
+#define I386_NUM_REGS (I386_GSBASE_REGNUM + 1)
/* Size of the largest register. */
-#define I386_MAX_REGISTER_SIZE 16
+#define I386_MAX_REGISTER_SIZE 64
/* Types for i386-specific registers. */
-extern struct type *i386_eflags_type;
-extern struct type *i386_mxcsr_type;
-
-extern struct type *i386_mmx_type (struct gdbarch *gdbarch);
-extern struct type *i386_sse_type (struct gdbarch *gdbarch);
+extern struct type *i387_ext_type (struct gdbarch *gdbarch);
+
+/* Checks of different pseudo-registers. */
+extern int i386_byte_regnum_p (struct gdbarch *gdbarch, int regnum);
+extern int i386_word_regnum_p (struct gdbarch *gdbarch, int regnum);
+extern int i386_dword_regnum_p (struct gdbarch *gdbarch, int regnum);
+extern int i386_xmm_regnum_p (struct gdbarch *gdbarch, int regnum);
+extern int i386_xmm_avx512_regnum_p (struct gdbarch * gdbarch, int regnum);
+extern int i386_ymm_regnum_p (struct gdbarch *gdbarch, int regnum);
+extern int i386_ymm_avx512_regnum_p (struct gdbarch *gdbarch, int regnum);
+extern int i386_bnd_regnum_p (struct gdbarch *gdbarch, int regnum);
+extern int i386_k_regnum_p (struct gdbarch *gdbarch, int regnum);
+extern int i386_zmm_regnum_p (struct gdbarch *gdbarch, int regnum);
+extern int i386_zmmh_regnum_p (struct gdbarch *gdbarch, int regnum);
+extern bool i386_pkru_regnum_p (struct gdbarch *gdbarch, int regnum);
+
+extern const char *i386_pseudo_register_name (struct gdbarch *gdbarch,
+ int regnum);
+extern struct type *i386_pseudo_register_type (struct gdbarch *gdbarch,
+ int regnum);
+
+extern void i386_pseudo_register_read_into_value (struct gdbarch *gdbarch,
+ readable_regcache *regcache,
+ int regnum,
+ struct value *result);
+
+extern void i386_pseudo_register_write (struct gdbarch *gdbarch,
+ struct regcache *regcache,
+ int regnum, const gdb_byte *buf);
+
+extern int i386_ax_pseudo_register_collect (struct gdbarch *gdbarch,
+ struct agent_expr *ax,
+ int regnum);
/* Segment selectors. */
#define I386_SEL_RPL 0x0003 /* Requester's Privilege Level mask. */
-#define I386_SEL_UPL 0x0003 /* User Privilige Level. */
-#define I386_SEL_KPL 0x0000 /* Kernel Privilige Level. */
+#define I386_SEL_UPL 0x0003 /* User Privilige Level. */
+#define I386_SEL_KPL 0x0000 /* Kernel Privilige Level. */
/* The length of the longest i386 instruction (according to
include/asm-i386/kprobes.h in Linux 2.6. */
#define I386_MAX_INSN_LEN (16)
/* Functions exported from i386-tdep.c. */
-extern CORE_ADDR i386_pe_skip_trampoline_code (CORE_ADDR pc, char *name);
-extern CORE_ADDR i386_skip_main_prologue (struct gdbarch *gdbarch, CORE_ADDR pc);
+extern CORE_ADDR i386_pe_skip_trampoline_code (struct frame_info *frame,
+ CORE_ADDR pc, char *name);
+extern CORE_ADDR i386_skip_main_prologue (struct gdbarch *gdbarch,
+ CORE_ADDR pc);
/* Return whether the THIS_FRAME corresponds to a sigtramp routine. */
extern int i386_sigtramp_p (struct frame_info *this_frame);
-/* Return the name of register REGNUM. */
-extern char const *i386_register_name (struct gdbarch * gdbarch, int regnum);
-
/* Return non-zero if REGNUM is a member of the specified group. */
extern int i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
struct reggroup *group);
struct regcache *regcache, int regnum,
const void *gregs, size_t len);
-/* Collect register REGNUM from the register cache REGCACHE and store
- it in the buffer specified by GREGS and LEN as described by the
- general-purpose register set REGSET. If REGNUM is -1, do this for
- all registers in REGSET. */
-extern void i386_collect_gregset (const struct regset *regset,
- const struct regcache *regcache,
- int regnum, void *gregs, size_t len);
+/* General-purpose register set. */
+extern const struct regset i386_gregset;
+
+/* Floating-point register set. */
+extern const struct regset i386_fpregset;
-/* Return the appropriate register set for the core section identified
- by SECT_NAME and SECT_SIZE. */
-extern const struct regset *
- i386_regset_from_core_section (struct gdbarch *gdbarch,
- const char *sect_name, size_t sect_size);
+/* Default iterator over core file register note sections. */
+extern void
+ i386_iterate_over_regset_sections (struct gdbarch *gdbarch,
+ iterate_over_regset_sections_cb *cb,
+ void *cb_data,
+ const struct regcache *regcache);
+typedef buf_displaced_step_closure i386_displaced_step_closure;
+extern struct displaced_step_closure *i386_displaced_step_copy_insn
+ (struct gdbarch *gdbarch, CORE_ADDR from, CORE_ADDR to,
+ struct regcache *regs);
extern void i386_displaced_step_fixup (struct gdbarch *gdbarch,
struct displaced_step_closure *closure,
CORE_ADDR from, CORE_ADDR to,
/* Initialize a SVR4 architecture variant. */
extern void i386_svr4_init_abi (struct gdbarch_info, struct gdbarch *);
+
+/* Convert SVR4 register number REG to the appropriate register number
+ used by GDB. */
+extern int i386_svr4_reg_to_regnum (struct gdbarch *gdbarch, int reg);
+
+extern int i386_process_record (struct gdbarch *gdbarch,
+ struct regcache *regcache, CORE_ADDR addr);
+extern const struct target_desc *i386_target_description (uint64_t xcr0,
+ bool segments);
+
+/* Return true iff the current target is MPX enabled. */
+extern int i386_mpx_enabled (void);
\f
-/* Functions and variables exported from i386bsd-tdep.c. */
+/* Functions and variables exported from i386-bsd-tdep.c. */
extern void i386bsd_init_abi (struct gdbarch_info, struct gdbarch *);
extern CORE_ADDR i386fbsd_sigtramp_start_addr;
extern int i386obsd_sc_reg_offset[];
extern int i386bsd_sc_reg_offset[];
+/* SystemTap related functions. */
+
+extern int i386_stap_is_single_operand (struct gdbarch *gdbarch,
+ const char *s);
+
+extern int i386_stap_parse_special_token (struct gdbarch *gdbarch,
+ struct stap_parse_info *p);
+
#endif /* i386-tdep.h */