/* Target-dependent code for the i386.
- Copyright 2001, 2002, 2003
+ Copyright (C) 2001, 2002, 2003, 2004, 2006, 2007
Free Software Foundation, Inc.
This file is part of GDB.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
+ the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330,
- Boston, MA 02111-1307, USA. */
+ along with this program. If not, see <http://www.gnu.org/licenses/>. */
#ifndef I386_TDEP_H
#define I386_TDEP_H
struct gdbarch;
struct reggroup;
struct regset;
+struct regcache;
/* GDB's i386 target supports both the 32-bit Intel Architecture
(IA-32) and the 64-bit AMD x86-64 architecture. Internally it uses
- SSE control register
The general purpose registers for the x86-64 architecture are quite
- different from IA-32. Therefore, the FP0_REGNUM target macro
+ different from IA-32. Therefore, gdbarch_fp0_regnum
determines the register number at which the FPU data registers
start. The number of FPU data and control registers is the same
for both architectures. The number of SSE registers however,
CORE_ADDR sigtramp_start;
CORE_ADDR sigtramp_end;
+ /* Detect sigtramp. */
+ int (*sigtramp_p) (struct frame_info *);
+
/* Get address of sigcontext for sigtramp. */
CORE_ADDR (*sigcontext_addr) (struct frame_info *);
is deprecated, please use `sc_reg_offset' instead. */
int sc_pc_offset;
int sc_sp_offset;
+
+ /* ISA-specific data types. */
+ struct type *i386_mmx_type;
+ struct type *i386_sse_type;
};
/* Floating-point registers. */
(at most) in the FPU, but are zero-extended to 32 bits in GDB's
register cache. */
-/* "Generic" floating point control register. */
-#define FPC_REGNUM (FP0_REGNUM + 8)
-
-/* FPU control word. */
-#define FCTRL_REGNUM FPC_REGNUM
-
-/* FPU status word. */
-#define FSTAT_REGNUM (FPC_REGNUM + 1)
-
-/* FPU register tag word. */
-#define FTAG_REGNUM (FPC_REGNUM + 2)
-
-/* FPU instruction's code segment selector, called "FPU Instruction
- Pointer Selector" in the IA-32 manuals. */
-#define FISEG_REGNUM (FPC_REGNUM + 3)
-
-/* FPU instruction's offset within segment. */
-#define FIOFF_REGNUM (FPC_REGNUM + 4)
-
-/* FPU operand's data segment. */
-#define FOSEG_REGNUM (FPC_REGNUM + 5)
-
-/* FPU operand's offset within segment */
-#define FOOFF_REGNUM (FPC_REGNUM + 6)
-
-/* FPU opcode, bottom eleven bits. */
-#define FOP_REGNUM (FPC_REGNUM + 7)
-
/* Return non-zero if REGNUM matches the FP register and the FP
register set is active. */
extern int i386_fp_regnum_p (int regnum);
extern int i386_fpc_regnum_p (int regnum);
-/* SSE registers. */
-
-/* First SSE data register. */
-#define XMM0_REGNUM (FPC_REGNUM + 8)
-
-/* SSE control/status register. */
-#define MXCSR_REGNUM \
- (XMM0_REGNUM + gdbarch_tdep (current_gdbarch)->num_xmm_regs)
-
/* Register numbers of various important registers. */
enum i386_regnum
I386_EDI_REGNUM, /* %edi */
I386_EIP_REGNUM, /* %eip */
I386_EFLAGS_REGNUM, /* %eflags */
- I386_ST0_REGNUM = 16, /* %st(0) */
+ I386_CS_REGNUM, /* %cs */
+ I386_SS_REGNUM, /* %ss */
+ I386_DS_REGNUM, /* %ds */
+ I386_ES_REGNUM, /* %es */
+ I386_FS_REGNUM, /* %fs */
+ I386_GS_REGNUM, /* %gs */
+ I386_ST0_REGNUM /* %st(0) */
};
#define I386_NUM_GREGS 16
/* Size of the largest register. */
#define I386_MAX_REGISTER_SIZE 16
+/* Types for i386-specific registers. */
+extern struct type *i386_eflags_type;
+extern struct type *i386_mxcsr_type;
+
+extern struct type *i386_mmx_type (struct gdbarch *gdbarch);
+extern struct type *i386_sse_type (struct gdbarch *gdbarch);
+
+/* Segment selectors. */
+#define I386_SEL_RPL 0x0003 /* Requester's Privilege Level mask. */
+#define I386_SEL_UPL 0x0003 /* User Privilige Level. */
+#define I386_SEL_KPL 0x0000 /* Kernel Privilige Level. */
+
/* Functions exported from i386-tdep.c. */
extern CORE_ADDR i386_pe_skip_trampoline_code (CORE_ADDR pc, char *name);
-extern int i386_frameless_signal_p (struct frame_info *frame);
-/* Return the name of register REG. */
-extern char const *i386_register_name (int reg);
+/* Return the name of register REGNUM. */
+extern char const *i386_register_name (int regnum);
/* Return non-zero if REGNUM is a member of the specified group. */
extern int i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
struct regcache *regcache, int regnum,
const void *gregs, size_t len);
+/* Collect register REGNUM from the register cache REGCACHE and store
+ it in the buffer specified by GREGS and LEN as described by the
+ general-purpose register set REGSET. If REGNUM is -1, do this for
+ all registers in REGSET. */
+extern void i386_collect_gregset (const struct regset *regset,
+ const struct regcache *regcache,
+ int regnum, void *gregs, size_t len);
+
/* Return the appropriate register set for the core section identified
by SECT_NAME and SECT_SIZE. */
extern const struct regset *
/* Functions and variables exported from i386bsd-tdep.c. */
extern void i386bsd_init_abi (struct gdbarch_info, struct gdbarch *);
-extern CORE_ADDR i386fbsd_sigtramp_start;
-extern CORE_ADDR i386fbsd_sigtramp_end;
-extern CORE_ADDR i386obsd_sigtramp_start;
-extern CORE_ADDR i386obsd_sigtramp_end;
+extern CORE_ADDR i386fbsd_sigtramp_start_addr;
+extern CORE_ADDR i386fbsd_sigtramp_end_addr;
+extern CORE_ADDR i386obsd_sigtramp_start_addr;
+extern CORE_ADDR i386obsd_sigtramp_end_addr;
extern int i386fbsd4_sc_reg_offset[];
extern int i386fbsd_sc_reg_offset[];
extern int i386nbsd_sc_reg_offset[];
projects / deliverable / binutils-gdb.git / blobdiff