/* Intel 387 floating point stuff.
Copyright (C) 1988, 1989, 1991, 1992, 1993, 1994, 1998, 1999, 2000, 2001,
- 2002, 2003, 2004, 2005, 2007 Free Software Foundation, Inc.
+ 2002, 2003, 2004, 2005, 2007, 2008 Free Software Foundation, Inc.
This file is part of GDB.
gdb_assert (gdbarch == get_frame_arch (frame));
- /* Define I387_ST0_REGNUM such that we use the proper definitions
- for FRAME's architecture. */
-#define I387_ST0_REGNUM tdep->st0_regnum
-
- fctrl = get_frame_register_unsigned (frame, I387_FCTRL_REGNUM);
- fstat = get_frame_register_unsigned (frame, I387_FSTAT_REGNUM);
- ftag = get_frame_register_unsigned (frame, I387_FTAG_REGNUM);
- fiseg = get_frame_register_unsigned (frame, I387_FISEG_REGNUM);
- fioff = get_frame_register_unsigned (frame, I387_FIOFF_REGNUM);
- foseg = get_frame_register_unsigned (frame, I387_FOSEG_REGNUM);
- fooff = get_frame_register_unsigned (frame, I387_FOOFF_REGNUM);
- fop = get_frame_register_unsigned (frame, I387_FOP_REGNUM);
+ fctrl = get_frame_register_unsigned (frame, I387_FCTRL_REGNUM (tdep));
+ fstat = get_frame_register_unsigned (frame, I387_FSTAT_REGNUM (tdep));
+ ftag = get_frame_register_unsigned (frame, I387_FTAG_REGNUM (tdep));
+ fiseg = get_frame_register_unsigned (frame, I387_FISEG_REGNUM (tdep));
+ fioff = get_frame_register_unsigned (frame, I387_FIOFF_REGNUM (tdep));
+ foseg = get_frame_register_unsigned (frame, I387_FOSEG_REGNUM (tdep));
+ fooff = get_frame_register_unsigned (frame, I387_FOOFF_REGNUM (tdep));
+ fop = get_frame_register_unsigned (frame, I387_FOP_REGNUM (tdep));
top = ((fstat >> 11) & 7);
break;
}
- get_frame_register (frame, (fpreg + 8 - top) % 8 + I387_ST0_REGNUM, raw);
+ get_frame_register (frame, (fpreg + 8 - top) % 8 + I387_ST0_REGNUM (tdep),
+ raw);
fputs_filtered ("0x", file);
for (i = 9; i >= 0; i--)
fprintf_filtered (file, "%s\n", hex_string_custom (fooff, 8));
fprintf_filtered (file, "Opcode: %s\n",
hex_string_custom (fop ? (fop | 0xd800) : 0, 4));
-
-#undef I387_ST0_REGNUM
}
\f
needs any special handling. */
int
-i387_convert_register_p (int regnum, struct type *type)
+i387_convert_register_p (struct gdbarch *gdbarch, int regnum, struct type *type)
{
- if (i386_fp_regnum_p (regnum))
+ if (i386_fp_regnum_p (gdbarch, regnum))
{
/* Floating point registers must be converted unless we are
accessing them in their hardware type. */
{
gdb_byte from[I386_MAX_REGISTER_SIZE];
- gdb_assert (i386_fp_regnum_p (regnum));
+ gdb_assert (i386_fp_regnum_p (get_frame_arch (frame), regnum));
/* We only support floating-point values. */
if (TYPE_CODE (type) != TYPE_CODE_FLT)
{
gdb_byte to[I386_MAX_REGISTER_SIZE];
- gdb_assert (i386_fp_regnum_p (regnum));
+ gdb_assert (i386_fp_regnum_p (get_frame_arch (frame), regnum));
/* We only support floating-point values. */
if (TYPE_CODE (type) != TYPE_CODE_FLT)
18 /* `fop' (bottom 11 bits). */
};
-#define FSAVE_ADDR(fsave, regnum) \
- (fsave + fsave_offset[regnum - I387_ST0_REGNUM])
+#define FSAVE_ADDR(tdep, fsave, regnum) \
+ (fsave + fsave_offset[regnum - I387_ST0_REGNUM (tdep)])
\f
/* Fill register REGNUM in REGCACHE with the appropriate value from
gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
- /* Define I387_ST0_REGNUM and I387_NUM_XMM_REGS such that we use the
- proper definitions for REGCACHE's architecture. */
-
-#define I387_ST0_REGNUM tdep->st0_regnum
-#define I387_NUM_XMM_REGS tdep->num_xmm_regs
-
- for (i = I387_ST0_REGNUM; i < I387_XMM0_REGNUM; i++)
+ for (i = I387_ST0_REGNUM (tdep); i < I387_XMM0_REGNUM (tdep); i++)
if (regnum == -1 || regnum == i)
{
if (fsave == NULL)
/* Most of the FPU control registers occupy only 16 bits in the
fsave area. Give those a special treatment. */
- if (i >= I387_FCTRL_REGNUM
- && i != I387_FIOFF_REGNUM && i != I387_FOOFF_REGNUM)
+ if (i >= I387_FCTRL_REGNUM (tdep)
+ && i != I387_FIOFF_REGNUM (tdep) && i != I387_FOOFF_REGNUM (tdep))
{
gdb_byte val[4];
- memcpy (val, FSAVE_ADDR (regs, i), 2);
+ memcpy (val, FSAVE_ADDR (tdep, regs, i), 2);
val[2] = val[3] = 0;
- if (i == I387_FOP_REGNUM)
+ if (i == I387_FOP_REGNUM (tdep))
val[1] &= ((1 << 3) - 1);
regcache_raw_supply (regcache, i, val);
}
else
- regcache_raw_supply (regcache, i, FSAVE_ADDR (regs, i));
+ regcache_raw_supply (regcache, i, FSAVE_ADDR (tdep, regs, i));
}
/* Provide dummy values for the SSE registers. */
- for (i = I387_XMM0_REGNUM; i < I387_MXCSR_REGNUM; i++)
+ for (i = I387_XMM0_REGNUM (tdep); i < I387_MXCSR_REGNUM (tdep); i++)
if (regnum == -1 || regnum == i)
regcache_raw_supply (regcache, i, NULL);
- if (regnum == -1 || regnum == I387_MXCSR_REGNUM)
+ if (regnum == -1 || regnum == I387_MXCSR_REGNUM (tdep))
{
gdb_byte buf[4];
store_unsigned_integer (buf, 4, 0x1f80);
- regcache_raw_supply (regcache, I387_MXCSR_REGNUM, buf);
+ regcache_raw_supply (regcache, I387_MXCSR_REGNUM (tdep), buf);
}
-
-#undef I387_ST0_REGNUM
-#undef I387_NUM_XMM_REGS
}
/* Fill register REGNUM (if it is a floating-point register) in *FSAVE
gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
- /* Define I387_ST0_REGNUM such that we use the proper definitions
- for REGCACHE's architecture. */
-#define I387_ST0_REGNUM tdep->st0_regnum
-
- for (i = I387_ST0_REGNUM; i < I387_XMM0_REGNUM; i++)
+ for (i = I387_ST0_REGNUM (tdep); i < I387_XMM0_REGNUM (tdep); i++)
if (regnum == -1 || regnum == i)
{
/* Most of the FPU control registers occupy only 16 bits in
the fsave area. Give those a special treatment. */
- if (i >= I387_FCTRL_REGNUM
- && i != I387_FIOFF_REGNUM && i != I387_FOOFF_REGNUM)
+ if (i >= I387_FCTRL_REGNUM (tdep)
+ && i != I387_FIOFF_REGNUM (tdep) && i != I387_FOOFF_REGNUM (tdep))
{
gdb_byte buf[4];
regcache_raw_collect (regcache, i, buf);
- if (i == I387_FOP_REGNUM)
+ if (i == I387_FOP_REGNUM (tdep))
{
/* The opcode occupies only 11 bits. Make sure we
don't touch the other bits. */
buf[1] &= ((1 << 3) - 1);
- buf[1] |= ((FSAVE_ADDR (regs, i))[1] & ~((1 << 3) - 1));
+ buf[1] |= ((FSAVE_ADDR (tdep, regs, i))[1] & ~((1 << 3) - 1));
}
- memcpy (FSAVE_ADDR (regs, i), buf, 2);
+ memcpy (FSAVE_ADDR (tdep, regs, i), buf, 2);
}
else
- regcache_raw_collect (regcache, i, FSAVE_ADDR (regs, i));
+ regcache_raw_collect (regcache, i, FSAVE_ADDR (tdep, regs, i));
}
-#undef I387_ST0_REGNUM
}
\f
160 + 15 * 16, /* ... %xmm15 (128 bits each). */
};
-#define FXSAVE_ADDR(fxsave, regnum) \
- (fxsave + fxsave_offset[regnum - I387_ST0_REGNUM])
+#define FXSAVE_ADDR(tdep, fxsave, regnum) \
+ (fxsave + fxsave_offset[regnum - I387_ST0_REGNUM (tdep)])
/* We made an unfortunate choice in putting %mxcsr after the SSE
registers %xmm0-%xmm7 instead of before, since it makes supporting
gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
gdb_assert (tdep->num_xmm_regs > 0);
- /* Define I387_ST0_REGNUM and I387_NUM_XMM_REGS such that we use the
- proper definitions for REGCACHE's architecture. */
-
-#define I387_ST0_REGNUM tdep->st0_regnum
-#define I387_NUM_XMM_REGS tdep->num_xmm_regs
-
- for (i = I387_ST0_REGNUM; i < I387_MXCSR_REGNUM; i++)
+ for (i = I387_ST0_REGNUM (tdep); i < I387_MXCSR_REGNUM (tdep); i++)
if (regnum == -1 || regnum == i)
{
if (regs == NULL)
/* Most of the FPU control registers occupy only 16 bits in
the fxsave area. Give those a special treatment. */
- if (i >= I387_FCTRL_REGNUM && i < I387_XMM0_REGNUM
- && i != I387_FIOFF_REGNUM && i != I387_FOOFF_REGNUM)
+ if (i >= I387_FCTRL_REGNUM (tdep) && i < I387_XMM0_REGNUM (tdep)
+ && i != I387_FIOFF_REGNUM (tdep) && i != I387_FOOFF_REGNUM (tdep))
{
gdb_byte val[4];
- memcpy (val, FXSAVE_ADDR (regs, i), 2);
+ memcpy (val, FXSAVE_ADDR (tdep, regs, i), 2);
val[2] = val[3] = 0;
- if (i == I387_FOP_REGNUM)
+ if (i == I387_FOP_REGNUM (tdep))
val[1] &= ((1 << 3) - 1);
- else if (i== I387_FTAG_REGNUM)
+ else if (i== I387_FTAG_REGNUM (tdep))
{
/* The fxsave area contains a simplified version of
the tag word. We have to look at the actual 80-bit
int fpreg;
int top;
- top = ((FXSAVE_ADDR (regs, I387_FSTAT_REGNUM))[1] >> 3);
+ top = ((FXSAVE_ADDR (tdep, regs,
+ I387_FSTAT_REGNUM (tdep)))[1] >> 3);
top &= 0x7;
for (fpreg = 7; fpreg >= 0; fpreg--)
if (val[0] & (1 << fpreg))
{
- int regnum = (fpreg + 8 - top) % 8 + I387_ST0_REGNUM;
- tag = i387_tag (FXSAVE_ADDR (regs, regnum));
+ int regnum = (fpreg + 8 - top) % 8
+ + I387_ST0_REGNUM (tdep);
+ tag = i387_tag (FXSAVE_ADDR (tdep, regs, regnum));
}
else
tag = 3; /* Empty */
regcache_raw_supply (regcache, i, val);
}
else
- regcache_raw_supply (regcache, i, FXSAVE_ADDR (regs, i));
+ regcache_raw_supply (regcache, i, FXSAVE_ADDR (tdep, regs, i));
}
- if (regnum == I387_MXCSR_REGNUM || regnum == -1)
+ if (regnum == I387_MXCSR_REGNUM (tdep) || regnum == -1)
{
if (regs == NULL)
- regcache_raw_supply (regcache, I387_MXCSR_REGNUM, NULL);
+ regcache_raw_supply (regcache, I387_MXCSR_REGNUM (tdep), NULL);
else
- regcache_raw_supply (regcache, I387_MXCSR_REGNUM,
+ regcache_raw_supply (regcache, I387_MXCSR_REGNUM (tdep),
FXSAVE_MXCSR_ADDR (regs));
}
-
-#undef I387_ST0_REGNUM
-#undef I387_NUM_XMM_REGS
}
/* Fill register REGNUM (if it is a floating-point or SSE register) in
gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
gdb_assert (tdep->num_xmm_regs > 0);
- /* Define I387_ST0_REGNUM and I387_NUM_XMM_REGS such that we use the
- proper definitions for REGCACHE's architecture. */
-
-#define I387_ST0_REGNUM tdep->st0_regnum
-#define I387_NUM_XMM_REGS tdep->num_xmm_regs
-
- for (i = I387_ST0_REGNUM; i < I387_MXCSR_REGNUM; i++)
+ for (i = I387_ST0_REGNUM (tdep); i < I387_MXCSR_REGNUM (tdep); i++)
if (regnum == -1 || regnum == i)
{
/* Most of the FPU control registers occupy only 16 bits in
the fxsave area. Give those a special treatment. */
- if (i >= I387_FCTRL_REGNUM && i < I387_XMM0_REGNUM
- && i != I387_FIOFF_REGNUM && i != I387_FOOFF_REGNUM)
+ if (i >= I387_FCTRL_REGNUM (tdep) && i < I387_XMM0_REGNUM (tdep)
+ && i != I387_FIOFF_REGNUM (tdep) && i != I387_FOOFF_REGNUM (tdep))
{
gdb_byte buf[4];
regcache_raw_collect (regcache, i, buf);
- if (i == I387_FOP_REGNUM)
+ if (i == I387_FOP_REGNUM (tdep))
{
/* The opcode occupies only 11 bits. Make sure we
don't touch the other bits. */
buf[1] &= ((1 << 3) - 1);
- buf[1] |= ((FXSAVE_ADDR (regs, i))[1] & ~((1 << 3) - 1));
+ buf[1] |= ((FXSAVE_ADDR (tdep, regs, i))[1] & ~((1 << 3) - 1));
}
- else if (i == I387_FTAG_REGNUM)
+ else if (i == I387_FTAG_REGNUM (tdep))
{
/* Converting back is much easier. */
buf[0] |= (1 << fpreg);
}
}
- memcpy (FXSAVE_ADDR (regs, i), buf, 2);
+ memcpy (FXSAVE_ADDR (tdep, regs, i), buf, 2);
}
else
- regcache_raw_collect (regcache, i, FXSAVE_ADDR (regs, i));
+ regcache_raw_collect (regcache, i, FXSAVE_ADDR (tdep, regs, i));
}
- if (regnum == I387_MXCSR_REGNUM || regnum == -1)
- regcache_raw_collect (regcache, I387_MXCSR_REGNUM,
+ if (regnum == I387_MXCSR_REGNUM (tdep) || regnum == -1)
+ regcache_raw_collect (regcache, I387_MXCSR_REGNUM (tdep),
FXSAVE_MXCSR_ADDR (regs));
-
-#undef I387_ST0_REGNUM
-#undef I387_NUM_XMM_REGS
}
/* Recreate the FTW (tag word) valid bits from the 80-bit FP data in
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
ULONGEST fstat;
- /* Define I387_ST0_REGNUM such that we use the proper
- definitions for the architecture. */
-#define I387_ST0_REGNUM tdep->st0_regnum
-
/* Set the top of the floating-point register stack to 7. The
actual value doesn't really matter, but 7 is what a normal
function return would end up with if the program started out with
a freshly initialized FPU. */
- regcache_raw_read_unsigned (regcache, I387_FSTAT_REGNUM, &fstat);
+ regcache_raw_read_unsigned (regcache, I387_FSTAT_REGNUM (tdep), &fstat);
fstat |= (7 << 11);
- regcache_raw_write_unsigned (regcache, I387_FSTAT_REGNUM, fstat);
+ regcache_raw_write_unsigned (regcache, I387_FSTAT_REGNUM (tdep), fstat);
/* Mark %st(1) through %st(7) as empty. Since we set the top of the
floating-point register stack to 7, the appropriate value for the
tag word is 0x3fff. */
- regcache_raw_write_unsigned (regcache, I387_FTAG_REGNUM, 0x3fff);
+ regcache_raw_write_unsigned (regcache, I387_FTAG_REGNUM (tdep), 0x3fff);
-#undef I387_ST0_REGNUM
}
projects / deliverable / binutils-gdb.git / blobdiff