/* Intel 387 floating point stuff.
- Copyright (C) 1988-2014 Free Software Foundation, Inc.
+ Copyright (C) 1988-2017 Free Software Foundation, Inc.
This file is part of GDB.
#include "i386-tdep.h"
#include "i387-tdep.h"
-#include "i386-xstate.h"
+#include "x86-xstate.h"
/* Print the floating point number specified by RAW. */
struct gdbarch *gdbarch = get_regcache_arch (regcache);
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
- const gdb_byte *regs = fsave;
+ const gdb_byte *regs = (const gdb_byte *) fsave;
int i;
gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
i387_collect_fsave (const struct regcache *regcache, int regnum, void *fsave)
{
struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache));
- gdb_byte *regs = fsave;
+ gdb_byte *regs = (gdb_byte *) fsave;
int i;
gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
i387_supply_fxsave (struct regcache *regcache, int regnum, const void *fxsave)
{
struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache));
- const gdb_byte *regs = fxsave;
+ const gdb_byte *regs = (const gdb_byte *) fxsave;
int i;
gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
i387_collect_fxsave (const struct regcache *regcache, int regnum, void *fxsave)
{
struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache));
- gdb_byte *regs = fxsave;
+ gdb_byte *regs = (gdb_byte *) fxsave;
int i;
gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
#define XSAVE_AVX512_ZMM_H_ADDR(tdep, xsave, regnum) \
(xsave + xsave_avx512_zmm_h_offset[regnum - I387_ZMM0H_REGNUM (tdep)])
+/* At xsave_pkeys_offset[REGNUM] you find the offset to the location
+ of the PKRU register data structure used by the "xsave"
+ instruction where GDB register REGNUM is stored. */
+
+static int xsave_pkeys_offset[] =
+{
+2688 + 0 * 8 /* %pkru (64 bits in XSTATE, 32-bit actually used by
+ instructions and applications). */
+};
+
+#define XSAVE_PKEYS_ADDR(tdep, xsave, regnum) \
+ (xsave + xsave_pkeys_offset[regnum - I387_PKRU_REGNUM (tdep)])
+
/* Similar to i387_supply_fxsave, but use XSAVE extended state. */
void
{
struct gdbarch *gdbarch = get_regcache_arch (regcache);
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
- const gdb_byte *regs = xsave;
+ const gdb_byte *regs = (const gdb_byte *) xsave;
int i;
- unsigned int clear_bv;
- static const gdb_byte zero[MAX_REGISTER_SIZE] = { 0 };
+ ULONGEST clear_bv;
+ static const gdb_byte zero[I386_MAX_REGISTER_SIZE] = { 0 };
enum
{
none = 0x0,
avx512_zmm_h = 0x20,
avx512_ymmh_avx512 = 0x40,
avx512_xmm_avx512 = 0x80,
+ pkeys = 0x100,
all = x87 | sse | avxh | mpx | avx512_k | avx512_zmm_h
- | avx512_ymmh_avx512 | avx512_xmm_avx512
+ | avx512_ymmh_avx512 | avx512_xmm_avx512 | pkeys
} regclass;
gdb_assert (regs != NULL);
if (regnum == -1)
regclass = all;
+ else if (regnum >= I387_PKRU_REGNUM (tdep)
+ && regnum < I387_PKEYSEND_REGNUM (tdep))
+ regclass = pkeys;
else if (regnum >= I387_ZMM0H_REGNUM (tdep)
&& regnum < I387_ZMMENDH_REGNUM (tdep))
regclass = avx512_zmm_h;
if (regclass != none)
{
- /* Get `xstat_bv'. */
- const gdb_byte *xstate_bv_p = XSAVE_XSTATE_BV_ADDR (regs);
+ /* Get `xstat_bv'. The supported bits in `xstat_bv' are 8 bytes. */
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+ ULONGEST xstate_bv = 0;
- /* The supported bits in `xstat_bv' are 1 byte. Clear part in
- vector registers if its bit in xstat_bv is zero. */
- clear_bv = (~(*xstate_bv_p)) & tdep->xcr0;
+ xstate_bv = extract_unsigned_integer (XSAVE_XSTATE_BV_ADDR (regs),
+ 8, byte_order);
+
+ /* Clear part in vector registers if its bit in xstat_bv is zero. */
+ clear_bv = (~(xstate_bv)) & tdep->xcr0;
}
else
- clear_bv = I386_XSTATE_ALL_MASK;
+ clear_bv = X86_XSTATE_ALL_MASK;
/* With the delayed xsave mechanism, in between the program
starting, and the program accessing the vector registers for the
case none:
break;
+ case pkeys:
+ if ((clear_bv & X86_XSTATE_PKRU))
+ regcache_raw_supply (regcache, regnum, zero);
+ else
+ regcache_raw_supply (regcache, regnum,
+ XSAVE_PKEYS_ADDR (tdep, regs, regnum));
+ return;
+
case avx512_zmm_h:
- if ((clear_bv & (I386_XSTATE_ZMM_H | I386_XSTATE_ZMM)))
+ if ((clear_bv & (X86_XSTATE_ZMM_H | X86_XSTATE_ZMM)))
regcache_raw_supply (regcache, regnum, zero);
else
regcache_raw_supply (regcache, regnum,
return;
case avx512_k:
- if ((clear_bv & I386_XSTATE_K))
+ if ((clear_bv & X86_XSTATE_K))
regcache_raw_supply (regcache, regnum, zero);
else
regcache_raw_supply (regcache, regnum,
return;
case avx512_ymmh_avx512:
- if ((clear_bv & I386_XSTATE_ZMM))
+ if ((clear_bv & X86_XSTATE_ZMM))
regcache_raw_supply (regcache, regnum, zero);
else
regcache_raw_supply (regcache, regnum,
return;
case avx512_xmm_avx512:
- if ((clear_bv & I386_XSTATE_ZMM))
+ if ((clear_bv & X86_XSTATE_ZMM))
regcache_raw_supply (regcache, regnum, zero);
else
regcache_raw_supply (regcache, regnum,
return;
case avxh:
- if ((clear_bv & I386_XSTATE_AVX))
+ if ((clear_bv & X86_XSTATE_AVX))
regcache_raw_supply (regcache, regnum, zero);
else
regcache_raw_supply (regcache, regnum,
return;
case mpx:
- if ((clear_bv & I386_XSTATE_BNDREGS))
+ if ((clear_bv & X86_XSTATE_BNDREGS))
regcache_raw_supply (regcache, regnum, zero);
else
regcache_raw_supply (regcache, regnum,
return;
case sse:
- if ((clear_bv & I386_XSTATE_SSE))
+ if ((clear_bv & X86_XSTATE_SSE))
regcache_raw_supply (regcache, regnum, zero);
else
regcache_raw_supply (regcache, regnum,
return;
case x87:
- if ((clear_bv & I386_XSTATE_X87))
+ if ((clear_bv & X86_XSTATE_X87))
regcache_raw_supply (regcache, regnum, zero);
else
regcache_raw_supply (regcache, regnum,
return;
case all:
+ /* Handle PKEYS registers. */
+ if ((tdep->xcr0 & X86_XSTATE_PKRU))
+ {
+ if ((clear_bv & X86_XSTATE_PKRU))
+ {
+ for (i = I387_PKRU_REGNUM (tdep);
+ i < I387_PKEYSEND_REGNUM (tdep);
+ i++)
+ regcache_raw_supply (regcache, i, zero);
+ }
+ else
+ {
+ for (i = I387_PKRU_REGNUM (tdep);
+ i < I387_PKEYSEND_REGNUM (tdep);
+ i++)
+ regcache_raw_supply (regcache, i,
+ XSAVE_PKEYS_ADDR (tdep, regs, i));
+ }
+ }
+
/* Handle the upper ZMM registers. */
- if ((tdep->xcr0 & (I386_XSTATE_ZMM_H | I386_XSTATE_ZMM)))
+ if ((tdep->xcr0 & (X86_XSTATE_ZMM_H | X86_XSTATE_ZMM)))
{
- if ((clear_bv & (I386_XSTATE_ZMM_H | I386_XSTATE_ZMM)))
+ if ((clear_bv & (X86_XSTATE_ZMM_H | X86_XSTATE_ZMM)))
{
for (i = I387_ZMM0H_REGNUM (tdep);
i < I387_ZMMENDH_REGNUM (tdep);
}
/* Handle AVX512 OpMask registers. */
- if ((tdep->xcr0 & I386_XSTATE_K))
+ if ((tdep->xcr0 & X86_XSTATE_K))
{
- if ((clear_bv & I386_XSTATE_K))
+ if ((clear_bv & X86_XSTATE_K))
{
for (i = I387_K0_REGNUM (tdep);
i < I387_KEND_REGNUM (tdep);
}
/* Handle the YMM_AVX512 registers. */
- if ((tdep->xcr0 & I386_XSTATE_ZMM))
+ if ((tdep->xcr0 & X86_XSTATE_ZMM))
{
- if ((clear_bv & I386_XSTATE_ZMM))
+ if ((clear_bv & X86_XSTATE_ZMM))
{
for (i = I387_YMM16H_REGNUM (tdep);
i < I387_YMMH_AVX512_END_REGNUM (tdep);
}
}
/* Handle the upper YMM registers. */
- if ((tdep->xcr0 & I386_XSTATE_AVX))
+ if ((tdep->xcr0 & X86_XSTATE_AVX))
{
- if ((clear_bv & I386_XSTATE_AVX))
+ if ((clear_bv & X86_XSTATE_AVX))
{
for (i = I387_YMM0H_REGNUM (tdep);
i < I387_YMMENDH_REGNUM (tdep);
}
/* Handle the MPX registers. */
- if ((tdep->xcr0 & I386_XSTATE_BNDREGS))
+ if ((tdep->xcr0 & X86_XSTATE_BNDREGS))
{
- if (clear_bv & I386_XSTATE_BNDREGS)
+ if (clear_bv & X86_XSTATE_BNDREGS)
{
for (i = I387_BND0R_REGNUM (tdep);
i < I387_BNDCFGU_REGNUM (tdep); i++)
}
/* Handle the MPX registers. */
- if ((tdep->xcr0 & I386_XSTATE_BNDCFG))
+ if ((tdep->xcr0 & X86_XSTATE_BNDCFG))
{
- if (clear_bv & I386_XSTATE_BNDCFG)
+ if (clear_bv & X86_XSTATE_BNDCFG)
{
for (i = I387_BNDCFGU_REGNUM (tdep);
i < I387_MPXEND_REGNUM (tdep); i++)
}
/* Handle the XMM registers. */
- if ((tdep->xcr0 & I386_XSTATE_SSE))
+ if ((tdep->xcr0 & X86_XSTATE_SSE))
{
- if ((clear_bv & I386_XSTATE_SSE))
+ if ((clear_bv & X86_XSTATE_SSE))
{
for (i = I387_XMM0_REGNUM (tdep);
i < I387_MXCSR_REGNUM (tdep);
}
/* Handle the x87 registers. */
- if ((tdep->xcr0 & I386_XSTATE_X87))
+ if ((tdep->xcr0 & X86_XSTATE_X87))
{
- if ((clear_bv & I386_XSTATE_X87))
+ if ((clear_bv & X86_XSTATE_X87))
{
for (i = I387_ST0_REGNUM (tdep);
i < I387_FCTRL_REGNUM (tdep);
{
struct gdbarch *gdbarch = get_regcache_arch (regcache);
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
- gdb_byte *regs = xsave;
+ gdb_byte *regs = (gdb_byte *) xsave;
int i;
enum
{
avx512_zmm_h = 0x40 | check,
avx512_ymmh_avx512 = 0x80 | check,
avx512_xmm_avx512 = 0x100 | check,
+ pkeys = 0x200 | check,
all = x87 | sse | avxh | mpx | avx512_k | avx512_zmm_h
- | avx512_ymmh_avx512 | avx512_xmm_avx512
+ | avx512_ymmh_avx512 | avx512_xmm_avx512 | pkeys
} regclass;
gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
if (regnum == -1)
regclass = all;
+ else if (regnum >= I387_PKRU_REGNUM (tdep)
+ && regnum < I387_PKEYSEND_REGNUM (tdep))
+ regclass = pkeys;
else if (regnum >= I387_ZMM0H_REGNUM (tdep)
&& regnum < I387_ZMMENDH_REGNUM (tdep))
regclass = avx512_zmm_h;
if (gcore)
{
/* Clear XSAVE extended state. */
- memset (regs, 0, I386_XSTATE_SIZE (tdep->xcr0));
+ memset (regs, 0, X86_XSTATE_SIZE (tdep->xcr0));
/* Update XCR0 and `xstate_bv' with XCR0 for gcore. */
if (tdep->xsave_xcr0_offset != -1)
if ((regclass & check))
{
gdb_byte raw[I386_MAX_REGISTER_SIZE];
- gdb_byte *xstate_bv_p = XSAVE_XSTATE_BV_ADDR (regs);
- unsigned int xstate_bv = 0;
- /* The supported bits in `xstat_bv' are 1 byte. */
- unsigned int clear_bv = (~(*xstate_bv_p)) & tdep->xcr0;
+ ULONGEST initial_xstate_bv, clear_bv, xstate_bv = 0;
gdb_byte *p;
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+
+ /* The supported bits in `xstat_bv' are 8 bytes. */
+ initial_xstate_bv = extract_unsigned_integer (XSAVE_XSTATE_BV_ADDR (regs),
+ 8, byte_order);
+ clear_bv = (~(initial_xstate_bv)) & tdep->xcr0;
/* Clear register set if its bit in xstat_bv is zero. */
if (clear_bv)
{
- if ((clear_bv & I386_XSTATE_BNDREGS))
+ if ((clear_bv & X86_XSTATE_PKRU))
+ for (i = I387_PKRU_REGNUM (tdep);
+ i < I387_PKEYSEND_REGNUM (tdep); i++)
+ memset (XSAVE_PKEYS_ADDR (tdep, regs, i), 0, 4);
+
+ if ((clear_bv & X86_XSTATE_BNDREGS))
for (i = I387_BND0R_REGNUM (tdep);
i < I387_BNDCFGU_REGNUM (tdep); i++)
memset (XSAVE_MPX_ADDR (tdep, regs, i), 0, 16);
- if ((clear_bv & I386_XSTATE_BNDCFG))
+ if ((clear_bv & X86_XSTATE_BNDCFG))
for (i = I387_BNDCFGU_REGNUM (tdep);
i < I387_MPXEND_REGNUM (tdep); i++)
memset (XSAVE_MPX_ADDR (tdep, regs, i), 0, 8);
- if ((clear_bv & (I386_XSTATE_ZMM_H | I386_XSTATE_ZMM)))
+ if ((clear_bv & (X86_XSTATE_ZMM_H | X86_XSTATE_ZMM)))
for (i = I387_ZMM0H_REGNUM (tdep);
i < I387_ZMMENDH_REGNUM (tdep); i++)
memset (XSAVE_AVX512_ZMM_H_ADDR (tdep, regs, i), 0, 32);
- if ((clear_bv & I386_XSTATE_K))
+ if ((clear_bv & X86_XSTATE_K))
for (i = I387_K0_REGNUM (tdep);
i < I387_KEND_REGNUM (tdep); i++)
memset (XSAVE_AVX512_K_ADDR (tdep, regs, i), 0, 8);
- if ((clear_bv & I386_XSTATE_ZMM))
+ if ((clear_bv & X86_XSTATE_ZMM))
{
for (i = I387_YMM16H_REGNUM (tdep);
i < I387_YMMH_AVX512_END_REGNUM (tdep); i++)
memset (XSAVE_XMM_AVX512_ADDR (tdep, regs, i), 0, 16);
}
- if ((clear_bv & I386_XSTATE_AVX))
+ if ((clear_bv & X86_XSTATE_AVX))
for (i = I387_YMM0H_REGNUM (tdep);
i < I387_YMMENDH_REGNUM (tdep); i++)
memset (XSAVE_AVXH_ADDR (tdep, regs, i), 0, 16);
- if ((clear_bv & I386_XSTATE_SSE))
+ if ((clear_bv & X86_XSTATE_SSE))
for (i = I387_XMM0_REGNUM (tdep);
i < I387_MXCSR_REGNUM (tdep); i++)
memset (FXSAVE_ADDR (tdep, regs, i), 0, 16);
- if ((clear_bv & I386_XSTATE_X87))
+ if ((clear_bv & X86_XSTATE_X87))
for (i = I387_ST0_REGNUM (tdep);
i < I387_FCTRL_REGNUM (tdep); i++)
memset (FXSAVE_ADDR (tdep, regs, i), 0, 10);
if (regclass == all)
{
+ /* Check if any PKEYS registers are changed. */
+ if ((tdep->xcr0 & X86_XSTATE_PKRU))
+ for (i = I387_PKRU_REGNUM (tdep);
+ i < I387_PKEYSEND_REGNUM (tdep); i++)
+ {
+ regcache_raw_collect (regcache, i, raw);
+ p = XSAVE_PKEYS_ADDR (tdep, regs, i);
+ if (memcmp (raw, p, 4) != 0)
+ {
+ xstate_bv |= X86_XSTATE_PKRU;
+ memcpy (p, raw, 4);
+ }
+ }
+
/* Check if any ZMMH registers are changed. */
- if ((tdep->xcr0 & (I386_XSTATE_ZMM_H | I386_XSTATE_ZMM)))
+ if ((tdep->xcr0 & (X86_XSTATE_ZMM_H | X86_XSTATE_ZMM)))
for (i = I387_ZMM0H_REGNUM (tdep);
i < I387_ZMMENDH_REGNUM (tdep); i++)
{
p = XSAVE_AVX512_ZMM_H_ADDR (tdep, regs, i);
if (memcmp (raw, p, 32) != 0)
{
- xstate_bv |= (I386_XSTATE_ZMM_H | I386_XSTATE_ZMM);
+ xstate_bv |= (X86_XSTATE_ZMM_H | X86_XSTATE_ZMM);
memcpy (p, raw, 32);
}
}
/* Check if any K registers are changed. */
- if ((tdep->xcr0 & I386_XSTATE_K))
+ if ((tdep->xcr0 & X86_XSTATE_K))
for (i = I387_K0_REGNUM (tdep);
i < I387_KEND_REGNUM (tdep); i++)
{
p = XSAVE_AVX512_K_ADDR (tdep, regs, i);
if (memcmp (raw, p, 8) != 0)
{
- xstate_bv |= I386_XSTATE_K;
+ xstate_bv |= X86_XSTATE_K;
memcpy (p, raw, 8);
}
}
/* Check if any XMM or upper YMM registers are changed. */
- if ((tdep->xcr0 & I386_XSTATE_ZMM))
+ if ((tdep->xcr0 & X86_XSTATE_ZMM))
{
for (i = I387_YMM16H_REGNUM (tdep);
i < I387_YMMH_AVX512_END_REGNUM (tdep); i++)
p = XSAVE_YMM_AVX512_ADDR (tdep, regs, i);
if (memcmp (raw, p, 16) != 0)
{
- xstate_bv |= I386_XSTATE_ZMM;
+ xstate_bv |= X86_XSTATE_ZMM;
memcpy (p, raw, 16);
}
}
p = XSAVE_XMM_AVX512_ADDR (tdep, regs, i);
if (memcmp (raw, p, 16) != 0)
{
- xstate_bv |= I386_XSTATE_ZMM;
+ xstate_bv |= X86_XSTATE_ZMM;
memcpy (p, raw, 16);
}
}
}
/* Check if any upper YMM registers are changed. */
- if ((tdep->xcr0 & I386_XSTATE_AVX))
+ if ((tdep->xcr0 & X86_XSTATE_AVX))
for (i = I387_YMM0H_REGNUM (tdep);
i < I387_YMMENDH_REGNUM (tdep); i++)
{
p = XSAVE_AVXH_ADDR (tdep, regs, i);
if (memcmp (raw, p, 16))
{
- xstate_bv |= I386_XSTATE_AVX;
+ xstate_bv |= X86_XSTATE_AVX;
memcpy (p, raw, 16);
}
}
/* Check if any upper MPX registers are changed. */
- if ((tdep->xcr0 & I386_XSTATE_BNDREGS))
+ if ((tdep->xcr0 & X86_XSTATE_BNDREGS))
for (i = I387_BND0R_REGNUM (tdep);
i < I387_BNDCFGU_REGNUM (tdep); i++)
{
p = XSAVE_MPX_ADDR (tdep, regs, i);
if (memcmp (raw, p, 16))
{
- xstate_bv |= I386_XSTATE_BNDREGS;
+ xstate_bv |= X86_XSTATE_BNDREGS;
memcpy (p, raw, 16);
}
}
/* Check if any upper MPX registers are changed. */
- if ((tdep->xcr0 & I386_XSTATE_BNDCFG))
+ if ((tdep->xcr0 & X86_XSTATE_BNDCFG))
for (i = I387_BNDCFGU_REGNUM (tdep);
i < I387_MPXEND_REGNUM (tdep); i++)
{
p = XSAVE_MPX_ADDR (tdep, regs, i);
if (memcmp (raw, p, 8))
{
- xstate_bv |= I386_XSTATE_BNDCFG;
+ xstate_bv |= X86_XSTATE_BNDCFG;
memcpy (p, raw, 8);
}
}
/* Check if any SSE registers are changed. */
- if ((tdep->xcr0 & I386_XSTATE_SSE))
+ if ((tdep->xcr0 & X86_XSTATE_SSE))
for (i = I387_XMM0_REGNUM (tdep);
i < I387_MXCSR_REGNUM (tdep); i++)
{
p = FXSAVE_ADDR (tdep, regs, i);
if (memcmp (raw, p, 16))
{
- xstate_bv |= I386_XSTATE_SSE;
+ xstate_bv |= X86_XSTATE_SSE;
memcpy (p, raw, 16);
}
}
/* Check if any X87 registers are changed. */
- if ((tdep->xcr0 & I386_XSTATE_X87))
+ if ((tdep->xcr0 & X86_XSTATE_X87))
for (i = I387_ST0_REGNUM (tdep);
i < I387_FCTRL_REGNUM (tdep); i++)
{
p = FXSAVE_ADDR (tdep, regs, i);
if (memcmp (raw, p, 10))
{
- xstate_bv |= I386_XSTATE_X87;
+ xstate_bv |= X86_XSTATE_X87;
memcpy (p, raw, 10);
}
}
internal_error (__FILE__, __LINE__,
_("invalid i387 regclass"));
+ case pkeys:
+ /* This is a PKEYS register. */
+ p = XSAVE_PKEYS_ADDR (tdep, regs, regnum);
+ if (memcmp (raw, p, 4) != 0)
+ {
+ xstate_bv |= X86_XSTATE_PKRU;
+ memcpy (p, raw, 4);
+ }
+ break;
+
case avx512_zmm_h:
/* This is a ZMM register. */
p = XSAVE_AVX512_ZMM_H_ADDR (tdep, regs, regnum);
if (memcmp (raw, p, 32) != 0)
{
- xstate_bv |= (I386_XSTATE_ZMM_H | I386_XSTATE_ZMM);
+ xstate_bv |= (X86_XSTATE_ZMM_H | X86_XSTATE_ZMM);
memcpy (p, raw, 32);
}
break;
p = XSAVE_AVX512_K_ADDR (tdep, regs, regnum);
if (memcmp (raw, p, 8) != 0)
{
- xstate_bv |= I386_XSTATE_K;
+ xstate_bv |= X86_XSTATE_K;
memcpy (p, raw, 8);
}
break;
p = XSAVE_YMM_AVX512_ADDR (tdep, regs, regnum);
if (memcmp (raw, p, 16) != 0)
{
- xstate_bv |= I386_XSTATE_ZMM;
+ xstate_bv |= X86_XSTATE_ZMM;
memcpy (p, raw, 16);
}
break;
p = XSAVE_XMM_AVX512_ADDR (tdep, regs, regnum);
if (memcmp (raw, p, 16) != 0)
{
- xstate_bv |= I386_XSTATE_ZMM;
+ xstate_bv |= X86_XSTATE_ZMM;
memcpy (p, raw, 16);
}
break;
p = XSAVE_AVXH_ADDR (tdep, regs, regnum);
if (memcmp (raw, p, 16))
{
- xstate_bv |= I386_XSTATE_AVX;
+ xstate_bv |= X86_XSTATE_AVX;
memcpy (p, raw, 16);
}
break;
p = XSAVE_MPX_ADDR (tdep, regs, regnum);
if (memcmp (raw, p, 16))
{
- xstate_bv |= I386_XSTATE_BNDREGS;
+ xstate_bv |= X86_XSTATE_BNDREGS;
memcpy (p, raw, 16);
}
}
else
{
p = XSAVE_MPX_ADDR (tdep, regs, regnum);
- xstate_bv |= I386_XSTATE_BNDCFG;
+ xstate_bv |= X86_XSTATE_BNDCFG;
memcpy (p, raw, 8);
}
break;
p = FXSAVE_ADDR (tdep, regs, regnum);
if (memcmp (raw, p, 16))
{
- xstate_bv |= I386_XSTATE_SSE;
+ xstate_bv |= X86_XSTATE_SSE;
memcpy (p, raw, 16);
}
break;
p = FXSAVE_ADDR (tdep, regs, regnum);
if (memcmp (raw, p, 10))
{
- xstate_bv |= I386_XSTATE_X87;
+ xstate_bv |= X86_XSTATE_X87;
memcpy (p, raw, 10);
}
break;
registers are changed. */
if (xstate_bv)
{
- /* The supported bits in `xstat_bv' are 1 byte. */
- *xstate_bv_p |= (gdb_byte) xstate_bv;
+ /* The supported bits in `xstat_bv' are 8 bytes. */
+ initial_xstate_bv |= xstate_bv;
+ store_unsigned_integer (XSAVE_XSTATE_BV_ADDR (regs),
+ 8, byte_order,
+ initial_xstate_bv);
switch (regclass)
{
case avx512_zmm_h:
case avx512_ymmh_avx512:
case avx512_xmm_avx512:
+ case pkeys:
/* Register REGNUM has been updated. Return. */
return;
}
regcache_raw_write_unsigned (regcache, I387_FTAG_REGNUM (tdep), 0x3fff);
}
+
+/* See i387-tdep.h. */
+
+void
+i387_reset_bnd_regs (struct gdbarch *gdbarch, struct regcache *regcache)
+{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
+ if (I387_BND0R_REGNUM (tdep) > 0)
+ {
+ gdb_byte bnd_buf[16];
+
+ memset (bnd_buf, 0, 16);
+ for (int i = 0; i < I387_NUM_BND_REGS; i++)
+ regcache_raw_write (regcache, I387_BND0R_REGNUM (tdep) + i, bnd_buf);
+ }
+}
projects / deliverable / binutils-gdb.git / blobdiff