/* Functions specific to running gdb native on IA-64 running
GNU/Linux.
- Copyright (C) 1999-2017 Free Software Foundation, Inc.
+ Copyright (C) 1999-2020 Free Software Foundation, Inc.
This file is part of GDB.
#include <signal.h>
#include "nat/gdb_ptrace.h"
-#include "gdb_wait.h"
+#include "gdbsupport/gdb_wait.h"
#ifdef HAVE_SYS_REG_H
#include <sys/reg.h>
#endif
#include "inf-ptrace.h"
+class ia64_linux_nat_target final : public linux_nat_target
+{
+public:
+ /* Add our register access methods. */
+ void fetch_registers (struct regcache *, int) override;
+ void store_registers (struct regcache *, int) override;
+
+ enum target_xfer_status xfer_partial (enum target_object object,
+ const char *annex,
+ gdb_byte *readbuf,
+ const gdb_byte *writebuf,
+ ULONGEST offset, ULONGEST len,
+ ULONGEST *xfered_len) override;
+
+ /* Override watchpoint routines. */
+
+ /* The IA-64 architecture can step over a watch point (without
+ triggering it again) if the "dd" (data debug fault disable) bit
+ in the processor status word is set.
+
+ This PSR bit is set in
+ ia64_linux_nat_target::stopped_by_watchpoint when the code there
+ has determined that a hardware watchpoint has indeed been hit.
+ The CPU will then be able to execute one instruction without
+ triggering a watchpoint. */
+ bool have_steppable_watchpoint () override { return true; }
+
+ int can_use_hw_breakpoint (enum bptype, int, int) override;
+ bool stopped_by_watchpoint () override;
+ bool stopped_data_address (CORE_ADDR *) override;
+ int insert_watchpoint (CORE_ADDR, int, enum target_hw_bp_type,
+ struct expression *) override;
+ int remove_watchpoint (CORE_ADDR, int, enum target_hw_bp_type,
+ struct expression *) override;
+ /* Override linux_nat_target low methods. */
+ void low_new_thread (struct lwp_info *lp) override;
+ bool low_status_is_event (int status) override;
+};
+
+static ia64_linux_nat_target the_ia64_linux_nat_target;
+
/* These must match the order of the register names.
Some sort of lookup table is needed because the offsets associated
for (regi = IA64_GR0_REGNUM; regi <= IA64_GR31_REGNUM; regi++)
{
- regcache_raw_supply (regcache, regi, regp + (regi - IA64_GR0_REGNUM));
+ regcache->raw_supply (regi, regp + (regi - IA64_GR0_REGNUM));
}
/* FIXME: NAT collection bits are at index 32; gotta deal with these
somehow... */
- regcache_raw_supply (regcache, IA64_PR_REGNUM, regp + 33);
+ regcache->raw_supply (IA64_PR_REGNUM, regp + 33);
for (regi = IA64_BR0_REGNUM; regi <= IA64_BR7_REGNUM; regi++)
{
- regcache_raw_supply (regcache, regi,
- regp + 34 + (regi - IA64_BR0_REGNUM));
+ regcache->raw_supply (regi, regp + 34 + (regi - IA64_BR0_REGNUM));
}
- regcache_raw_supply (regcache, IA64_IP_REGNUM, regp + 42);
- regcache_raw_supply (regcache, IA64_CFM_REGNUM, regp + 43);
- regcache_raw_supply (regcache, IA64_PSR_REGNUM, regp + 44);
- regcache_raw_supply (regcache, IA64_RSC_REGNUM, regp + 45);
- regcache_raw_supply (regcache, IA64_BSP_REGNUM, regp + 46);
- regcache_raw_supply (regcache, IA64_BSPSTORE_REGNUM, regp + 47);
- regcache_raw_supply (regcache, IA64_RNAT_REGNUM, regp + 48);
- regcache_raw_supply (regcache, IA64_CCV_REGNUM, regp + 49);
- regcache_raw_supply (regcache, IA64_UNAT_REGNUM, regp + 50);
- regcache_raw_supply (regcache, IA64_FPSR_REGNUM, regp + 51);
- regcache_raw_supply (regcache, IA64_PFS_REGNUM, regp + 52);
- regcache_raw_supply (regcache, IA64_LC_REGNUM, regp + 53);
- regcache_raw_supply (regcache, IA64_EC_REGNUM, regp + 54);
+ regcache->raw_supply (IA64_IP_REGNUM, regp + 42);
+ regcache->raw_supply (IA64_CFM_REGNUM, regp + 43);
+ regcache->raw_supply (IA64_PSR_REGNUM, regp + 44);
+ regcache->raw_supply (IA64_RSC_REGNUM, regp + 45);
+ regcache->raw_supply (IA64_BSP_REGNUM, regp + 46);
+ regcache->raw_supply (IA64_BSPSTORE_REGNUM, regp + 47);
+ regcache->raw_supply (IA64_RNAT_REGNUM, regp + 48);
+ regcache->raw_supply (IA64_CCV_REGNUM, regp + 49);
+ regcache->raw_supply (IA64_UNAT_REGNUM, regp + 50);
+ regcache->raw_supply (IA64_FPSR_REGNUM, regp + 51);
+ regcache->raw_supply (IA64_PFS_REGNUM, regp + 52);
+ regcache->raw_supply (IA64_LC_REGNUM, regp + 53);
+ regcache->raw_supply (IA64_EC_REGNUM, regp + 54);
}
void
#define COPY_REG(_idx_,_regi_) \
if ((regno == -1) || regno == _regi_) \
- regcache_raw_collect (regcache, _regi_, regp + _idx_)
+ regcache->raw_collect (_regi_, regp + _idx_)
for (regi = IA64_GR0_REGNUM; regi <= IA64_GR31_REGNUM; regi++)
{
for fr0/fr1 and always supply their expected values. */
/* fr0 is always read as zero. */
- regcache_raw_supply (regcache, IA64_FR0_REGNUM, f_zero);
+ regcache->raw_supply (IA64_FR0_REGNUM, f_zero);
/* fr1 is always read as one (1.0). */
- regcache_raw_supply (regcache, IA64_FR1_REGNUM, f_one);
+ regcache->raw_supply (IA64_FR1_REGNUM, f_one);
for (regi = IA64_FR2_REGNUM; regi <= IA64_FR127_REGNUM; regi++)
{
from = (const char *) &((*fpregsetp)[regi - IA64_FR0_REGNUM]);
- regcache_raw_supply (regcache, regi, from);
+ regcache->raw_supply (regi, from);
}
}
for (regi = IA64_FR0_REGNUM; regi <= IA64_FR127_REGNUM; regi++)
{
if ((regno == -1) || (regno == regi))
- regcache_raw_collect (regcache, regi,
- &((*fpregsetp)[regi - IA64_FR0_REGNUM]));
+ regcache->raw_collect (regi, &((*fpregsetp)[regi - IA64_FR0_REGNUM]));
}
}
{
int tid;
- tid = ptid_get_lwp (ptid);
+ tid = ptid.lwp ();
if (tid == 0)
- tid = ptid_get_pid (ptid);
+ tid = ptid.pid ();
(void) ptrace (PT_WRITE_U, tid, (PTRACE_TYPE_ARG3) (PT_DBR + 8 * idx), val);
}
return onecount <= 1;
}
-static int
-ia64_linux_insert_watchpoint (struct target_ops *self,
- CORE_ADDR addr, int len,
- enum target_hw_bp_type type,
- struct expression *cond)
+int
+ia64_linux_nat_target::insert_watchpoint (CORE_ADDR addr, int len,
+ enum target_hw_bp_type type,
+ struct expression *cond)
{
struct lwp_info *lp;
int idx;
return 0;
}
-static int
-ia64_linux_remove_watchpoint (struct target_ops *self,
- CORE_ADDR addr, int len,
- enum target_hw_bp_type type,
- struct expression *cond)
+int
+ia64_linux_nat_target::remove_watchpoint (CORE_ADDR addr, int len,
+ enum target_hw_bp_type type,
+ struct expression *cond)
{
int idx;
long dbr_addr, dbr_mask;
return -1;
}
-static void
-ia64_linux_new_thread (struct lwp_info *lp)
+void
+ia64_linux_nat_target::low_new_thread (struct lwp_info *lp)
{
int i, any;
enable_watchpoints_in_psr (lp->ptid);
}
-static int
-ia64_linux_stopped_data_address (struct target_ops *ops, CORE_ADDR *addr_p)
+bool
+ia64_linux_nat_target::stopped_data_address (CORE_ADDR *addr_p)
{
CORE_ADDR psr;
siginfo_t siginfo;
struct regcache *regcache = get_current_regcache ();
if (!linux_nat_get_siginfo (inferior_ptid, &siginfo))
- return 0;
+ return false;
if (siginfo.si_signo != SIGTRAP
|| (siginfo.si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */)
- return 0;
+ return false;
regcache_cooked_read_unsigned (regcache, IA64_PSR_REGNUM, &psr);
psr |= IA64_PSR_DD; /* Set the dd bit - this will disable the watchpoint
regcache_cooked_write_unsigned (regcache, IA64_PSR_REGNUM, psr);
*addr_p = (CORE_ADDR) siginfo.si_addr;
- return 1;
+ return true;
}
-static int
-ia64_linux_stopped_by_watchpoint (struct target_ops *ops)
+bool
+ia64_linux_nat_target::stopped_by_watchpoint ()
{
CORE_ADDR addr;
- return ia64_linux_stopped_data_address (ops, &addr);
+ return stopped_data_address (&addr);
}
-static int
-ia64_linux_can_use_hw_breakpoint (struct target_ops *self,
- enum bptype type,
- int cnt, int othertype)
+int
+ia64_linux_nat_target::can_use_hw_breakpoint (enum bptype type,
+ int cnt, int othertype)
{
return 1;
}
static void
ia64_linux_fetch_register (struct regcache *regcache, int regnum)
{
- struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ struct gdbarch *gdbarch = regcache->arch ();
CORE_ADDR addr;
size_t size;
PTRACE_TYPE_RET *buf;
const gdb_byte zero[8] = { 0 };
gdb_assert (sizeof (zero) == register_size (gdbarch, regnum));
- regcache_raw_supply (regcache, regnum, zero);
+ regcache->raw_supply (regnum, zero);
return;
}
const gdb_byte f_zero[16] = { 0 };
gdb_assert (sizeof (f_zero) == register_size (gdbarch, regnum));
- regcache_raw_supply (regcache, regnum, f_zero);
+ regcache->raw_supply (regnum, f_zero);
return;
}
{ 0, 0, 0, 0, 0, 0, 0, 0x80, 0xff, 0xff, 0, 0, 0, 0, 0, 0 };
gdb_assert (sizeof (f_one) == register_size (gdbarch, regnum));
- regcache_raw_supply (regcache, regnum, f_one);
+ regcache->raw_supply (regnum, f_one);
return;
}
if (ia64_cannot_fetch_register (gdbarch, regnum))
{
- regcache_raw_supply (regcache, regnum, NULL);
+ regcache->raw_supply (regnum, NULL);
return;
}
- pid = get_ptrace_pid (regcache_get_ptid (regcache));
+ pid = get_ptrace_pid (regcache->ptid ());
/* This isn't really an address, but ptrace thinks of it as one. */
addr = ia64_register_addr (gdbarch, regnum);
addr += sizeof (PTRACE_TYPE_RET);
}
- regcache_raw_supply (regcache, regnum, buf);
+ regcache->raw_supply (regnum, buf);
}
/* Fetch register REGNUM from the inferior. If REGNUM is -1, do this
for all registers. */
-static void
-ia64_linux_fetch_registers (struct target_ops *ops,
- struct regcache *regcache, int regnum)
+void
+ia64_linux_nat_target::fetch_registers (struct regcache *regcache, int regnum)
{
if (regnum == -1)
for (regnum = 0;
- regnum < gdbarch_num_regs (get_regcache_arch (regcache));
+ regnum < gdbarch_num_regs (regcache->arch ());
regnum++)
ia64_linux_fetch_register (regcache, regnum);
else
static void
ia64_linux_store_register (const struct regcache *regcache, int regnum)
{
- struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ struct gdbarch *gdbarch = regcache->arch ();
CORE_ADDR addr;
size_t size;
PTRACE_TYPE_RET *buf;
if (ia64_cannot_store_register (gdbarch, regnum))
return;
- pid = get_ptrace_pid (regcache_get_ptid (regcache));
+ pid = get_ptrace_pid (regcache->ptid ());
/* This isn't really an address, but ptrace thinks of it as one. */
addr = ia64_register_addr (gdbarch, regnum);
buf = (PTRACE_TYPE_RET *) alloca (size);
/* Write the register contents into the inferior a chunk at a time. */
- regcache_raw_collect (regcache, regnum, buf);
+ regcache->raw_collect (regnum, buf);
for (i = 0; i < size / sizeof (PTRACE_TYPE_RET); i++)
{
errno = 0;
/* Store register REGNUM back into the inferior. If REGNUM is -1, do
this for all registers. */
-static void
-ia64_linux_store_registers (struct target_ops *ops,
- struct regcache *regcache, int regnum)
+void
+ia64_linux_nat_target::store_registers (struct regcache *regcache, int regnum)
{
if (regnum == -1)
for (regnum = 0;
- regnum < gdbarch_num_regs (get_regcache_arch (regcache));
+ regnum < gdbarch_num_regs (regcache->arch ());
regnum++)
ia64_linux_store_register (regcache, regnum);
else
ia64_linux_store_register (regcache, regnum);
}
+/* Implement the xfer_partial target_ops method. */
-static target_xfer_partial_ftype *super_xfer_partial;
-
-/* Implement the to_xfer_partial target_ops method. */
-
-static enum target_xfer_status
-ia64_linux_xfer_partial (struct target_ops *ops,
- enum target_object object,
- const char *annex,
- gdb_byte *readbuf, const gdb_byte *writebuf,
- ULONGEST offset, ULONGEST len,
- ULONGEST *xfered_len)
+enum target_xfer_status
+ia64_linux_nat_target::xfer_partial (enum target_object object,
+ const char *annex,
+ gdb_byte *readbuf, const gdb_byte *writebuf,
+ ULONGEST offset, ULONGEST len,
+ ULONGEST *xfered_len)
{
if (object == TARGET_OBJECT_UNWIND_TABLE && readbuf != NULL)
{
return TARGET_XFER_OK;
}
- return super_xfer_partial (ops, object, annex, readbuf, writebuf,
- offset, len, xfered_len);
+ return linux_nat_target::xfer_partial (object, annex, readbuf, writebuf,
+ offset, len, xfered_len);
}
/* For break.b instruction ia64 CPU forgets the immediate value and generates
ia64 does not use gdbarch_decr_pc_after_break so we do not have to make any
difference for the signals here. */
-static int
-ia64_linux_status_is_event (int status)
+bool
+ia64_linux_nat_target::low_status_is_event (int status)
{
return WIFSTOPPED (status) && (WSTOPSIG (status) == SIGTRAP
|| WSTOPSIG (status) == SIGILL);
void
_initialize_ia64_linux_nat (void)
{
- struct target_ops *t;
-
- /* Fill in the generic GNU/Linux methods. */
- t = linux_target ();
-
- /* Override the default fetch/store register routines. */
- t->to_fetch_registers = ia64_linux_fetch_registers;
- t->to_store_registers = ia64_linux_store_registers;
-
- /* Override the default to_xfer_partial. */
- super_xfer_partial = t->to_xfer_partial;
- t->to_xfer_partial = ia64_linux_xfer_partial;
-
- /* Override watchpoint routines. */
-
- /* The IA-64 architecture can step over a watch point (without triggering
- it again) if the "dd" (data debug fault disable) bit in the processor
- status word is set.
-
- This PSR bit is set in ia64_linux_stopped_by_watchpoint when the
- code there has determined that a hardware watchpoint has indeed
- been hit. The CPU will then be able to execute one instruction
- without triggering a watchpoint. */
-
- t->to_have_steppable_watchpoint = 1;
- t->to_can_use_hw_breakpoint = ia64_linux_can_use_hw_breakpoint;
- t->to_stopped_by_watchpoint = ia64_linux_stopped_by_watchpoint;
- t->to_stopped_data_address = ia64_linux_stopped_data_address;
- t->to_insert_watchpoint = ia64_linux_insert_watchpoint;
- t->to_remove_watchpoint = ia64_linux_remove_watchpoint;
-
/* Register the target. */
- linux_nat_add_target (t);
- linux_nat_set_new_thread (t, ia64_linux_new_thread);
- linux_nat_set_status_is_event (t, ia64_linux_status_is_event);
+ linux_target = &the_ia64_linux_nat_target;
+ add_inf_child_target (&the_ia64_linux_nat_target);
}