/* Target-dependent code for the IA-64 for GDB, the GNU debugger.
- Copyright 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
+ Copyright (C) 1999-2020 Free Software Foundation, Inc.
This file is part of GDB.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
+ the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330,
- Boston, MA 02111-1307, USA. */
+ along with this program. If not, see <http://www.gnu.org/licenses/>. */
#include "defs.h"
#include "inferior.h"
-#include "symfile.h" /* for entry_point_address */
#include "gdbcore.h"
#include "arch-utils.h"
#include "floatformat.h"
+#include "gdbtypes.h"
#include "regcache.h"
-#include "doublest.h"
+#include "reggroups.h"
+#include "frame.h"
+#include "frame-base.h"
+#include "frame-unwind.h"
+#include "target-float.h"
#include "value.h"
-#include "gdb_assert.h"
#include "objfiles.h"
#include "elf/common.h" /* for DT_PLTGOT value */
#include "elf-bfd.h"
+#include "dis-asm.h"
+#include "infcall.h"
+#include "osabi.h"
+#include "ia64-tdep.h"
+#include "cp-abi.h"
+
+#ifdef HAVE_LIBUNWIND_IA64_H
+#include "elf/ia64.h" /* for PT_IA_64_UNWIND value */
+#include "ia64-libunwind-tdep.h"
+
+/* Note: KERNEL_START is supposed to be an address which is not going
+ to ever contain any valid unwind info. For ia64 linux, the choice
+ of 0xc000000000000000 is fairly safe since that's uncached space.
+
+ We use KERNEL_START as follows: after obtaining the kernel's
+ unwind table via getunwind(), we project its unwind data into
+ address-range KERNEL_START-(KERNEL_START+ktab_size) and then
+ when ia64_access_mem() sees a memory access to this
+ address-range, we redirect it to ktab instead.
+
+ None of this hackery is needed with a modern kernel/libcs
+ which uses the kernel virtual DSO to provide access to the
+ kernel's unwind info. In that case, ktab_size remains 0 and
+ hence the value of KERNEL_START doesn't matter. */
+
+#define KERNEL_START 0xc000000000000000ULL
+
+static size_t ktab_size = 0;
+struct ia64_table_entry
+ {
+ uint64_t start_offset;
+ uint64_t end_offset;
+ uint64_t info_offset;
+ };
-/* Hook for determining the global pointer when calling functions in
- the inferior under AIX. The initialization code in ia64-aix-nat.c
- sets this hook to the address of a function which will find the
- global pointer for a given address.
-
- The generic code which uses the dynamic section in the inferior for
- finding the global pointer is not of much use on AIX since the
- values obtained from the inferior have not been relocated. */
+static struct ia64_table_entry *ktab = NULL;
+static gdb::optional<gdb::byte_vector> ktab_buf;
-CORE_ADDR (*native_find_global_pointer) (CORE_ADDR) = 0;
+#endif
/* An enumeration of the different IA-64 instruction types. */
is set to six (which is how it was set up initially). -- objdump
displays pretty disassembly dumps with this value. For our purposes,
we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
- never want to also display the raw bytes the way objdump does. */
+ never want to also display the raw bytes the way objdump does. */
#define SLOT_MULTIPLIER 1
-/* Length in bytes of an instruction bundle */
+/* Length in bytes of an instruction bundle. */
#define BUNDLE_LEN 16
-/* FIXME: These extern declarations should go in ia64-tdep.h. */
-extern CORE_ADDR ia64_linux_sigcontext_register_address (CORE_ADDR, int);
-extern CORE_ADDR ia64_aix_sigcontext_register_address (CORE_ADDR, int);
+/* See the saved memory layout comment for ia64_memory_insert_breakpoint. */
+
+#if BREAKPOINT_MAX < BUNDLE_LEN - 2
+# error "BREAKPOINT_MAX < BUNDLE_LEN - 2"
+#endif
static gdbarch_init_ftype ia64_gdbarch_init;
static gdbarch_register_name_ftype ia64_register_name;
+static gdbarch_register_type_ftype ia64_register_type;
static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc;
static gdbarch_skip_prologue_ftype ia64_skip_prologue;
-static gdbarch_deprecated_extract_return_value_ftype ia64_extract_return_value;
-static gdbarch_deprecated_extract_struct_value_address_ftype ia64_extract_struct_value_address;
-static gdbarch_use_struct_convention_ftype ia64_use_struct_convention;
-static gdbarch_frameless_function_invocation_ftype ia64_frameless_function_invocation;
-static gdbarch_deprecated_saved_pc_after_call_ftype ia64_saved_pc_after_call;
-static void ia64_pop_frame_regular (struct frame_info *frame);
static struct type *is_float_or_hfa_type (struct type *t);
+static CORE_ADDR ia64_find_global_pointer (struct gdbarch *gdbarch,
+ CORE_ADDR faddr);
-static int ia64_num_regs = 590;
+#define NUM_IA64_RAW_REGS 462
+
+/* Big enough to hold a FP register in bytes. */
+#define IA64_FP_REGISTER_SIZE 16
-static int pc_regnum = IA64_IP_REGNUM;
static int sp_regnum = IA64_GR12_REGNUM;
-static int fp_regnum = IA64_VFP_REGNUM;
-static int lr_regnum = IA64_VRAP_REGNUM;
-static LONGEST ia64_call_dummy_words[] = {0};
+/* NOTE: we treat the register stack registers r32-r127 as
+ pseudo-registers because they may not be accessible via the ptrace
+ register get/set interfaces. */
+
+enum pseudo_regs { FIRST_PSEUDO_REGNUM = NUM_IA64_RAW_REGS,
+ VBOF_REGNUM = IA64_NAT127_REGNUM + 1, V32_REGNUM,
+ V127_REGNUM = V32_REGNUM + 95,
+ VP0_REGNUM, VP16_REGNUM = VP0_REGNUM + 16,
+ VP63_REGNUM = VP0_REGNUM + 63, LAST_PSEUDO_REGNUM };
/* Array of register names; There should be ia64_num_regs strings in
the initializer. */
-static char *ia64_register_names[] =
+static const char *ia64_register_names[] =
{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
"r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
"r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
- "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
- "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
- "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
- "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
- "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
- "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
- "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
- "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
- "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
- "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
- "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
- "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
"f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
"f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
- "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
- "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
- "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
- "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
- "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
- "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
- "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
- "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
"b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7",
"nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
"nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
"nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
-};
-
-struct frame_extra_info
- {
- CORE_ADDR bsp; /* points at r32 for the current frame */
- CORE_ADDR cfm; /* cfm value for current frame */
- int sof; /* Size of frame (decoded from cfm value) */
- int sol; /* Size of locals (decoded from cfm value) */
- CORE_ADDR after_prologue;
- /* Address of first instruction after the last
- prologue instruction; Note that there may
- be instructions from the function's body
- intermingled with the prologue. */
- int mem_stack_frame_size;
- /* Size of the memory stack frame (may be zero),
- or -1 if it has not been determined yet. */
- int fp_reg; /* Register number (if any) used a frame pointer
- for this frame. 0 if no register is being used
- as the frame pointer. */
- };
-struct gdbarch_tdep
- {
- int os_ident; /* From the ELF header, one of the ELFOSABI_
- constants: ELFOSABI_LINUX, ELFOSABI_AIX,
- etc. */
- CORE_ADDR (*sigcontext_register_address) (CORE_ADDR, int);
- /* OS specific function which, given a frame address
- and register number, returns the offset to the
- given register from the start of the frame. */
- CORE_ADDR (*find_global_pointer) (CORE_ADDR);
- };
+ "bof",
+
+ "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
+ "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
+ "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
+ "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
+ "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
+ "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
+ "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
+ "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
+ "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
+ "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
+ "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
+ "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
-#define SIGCONTEXT_REGISTER_ADDRESS \
- (gdbarch_tdep (current_gdbarch)->sigcontext_register_address)
-#define FIND_GLOBAL_POINTER \
- (gdbarch_tdep (current_gdbarch)->find_global_pointer)
+ "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
+ "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
+ "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
+ "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
+ "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
+ "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
+ "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
+ "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
+};
-static const char *
-ia64_register_name (int reg)
+struct ia64_frame_cache
{
- return ia64_register_names[reg];
-}
+ CORE_ADDR base; /* frame pointer base for frame */
+ CORE_ADDR pc; /* function start pc for frame */
+ CORE_ADDR saved_sp; /* stack pointer for frame */
+ CORE_ADDR bsp; /* points at r32 for the current frame */
+ CORE_ADDR cfm; /* cfm value for current frame */
+ CORE_ADDR prev_cfm; /* cfm value for previous frame */
+ int frameless;
+ int sof; /* Size of frame (decoded from cfm value). */
+ int sol; /* Size of locals (decoded from cfm value). */
+ int sor; /* Number of rotating registers (decoded from
+ cfm value). */
+ CORE_ADDR after_prologue;
+ /* Address of first instruction after the last
+ prologue instruction; Note that there may
+ be instructions from the function's body
+ intermingled with the prologue. */
+ int mem_stack_frame_size;
+ /* Size of the memory stack frame (may be zero),
+ or -1 if it has not been determined yet. */
+ int fp_reg; /* Register number (if any) used a frame pointer
+ for this frame. 0 if no register is being used
+ as the frame pointer. */
+
+ /* Saved registers. */
+ CORE_ADDR saved_regs[NUM_IA64_RAW_REGS];
+
+};
static int
-ia64_register_raw_size (int reg)
+floatformat_valid (const struct floatformat *fmt, const void *from)
{
- return (IA64_FR0_REGNUM <= reg && reg <= IA64_FR127_REGNUM) ? 16 : 8;
+ return 1;
}
-static int
-ia64_register_virtual_size (int reg)
+static const struct floatformat floatformat_ia64_ext_little =
{
- return (IA64_FR0_REGNUM <= reg && reg <= IA64_FR127_REGNUM) ? 16 : 8;
-}
+ floatformat_little, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
+ floatformat_intbit_yes, "floatformat_ia64_ext_little", floatformat_valid, NULL
+};
-/* Return true iff register N's virtual format is different from
- its raw format. */
-static int
-ia64_register_convertible (int nr)
+static const struct floatformat floatformat_ia64_ext_big =
{
- return (IA64_FR0_REGNUM <= nr && nr <= IA64_FR127_REGNUM);
-}
+ floatformat_big, 82, 46, 47, 17, 65535, 0x1ffff, 64, 64,
+ floatformat_intbit_yes, "floatformat_ia64_ext_big", floatformat_valid
+};
-const struct floatformat floatformat_ia64_ext =
+static const struct floatformat *floatformats_ia64_ext[2] =
{
- floatformat_little, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
- floatformat_intbit_yes
+ &floatformat_ia64_ext_big,
+ &floatformat_ia64_ext_little
};
-static void
-ia64_register_convert_to_virtual (int regnum, struct type *type,
- char *from, char *to)
+static struct type *
+ia64_ext_type (struct gdbarch *gdbarch)
{
- if (regnum >= IA64_FR0_REGNUM && regnum <= IA64_FR127_REGNUM)
- {
- DOUBLEST val;
- floatformat_to_doublest (&floatformat_ia64_ext, from, &val);
- deprecated_store_floating (to, TYPE_LENGTH(type), val);
- }
- else
- error("ia64_register_convert_to_virtual called with non floating point register number");
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
+ if (!tdep->ia64_ext_type)
+ tdep->ia64_ext_type
+ = arch_float_type (gdbarch, 128, "builtin_type_ia64_ext",
+ floatformats_ia64_ext);
+
+ return tdep->ia64_ext_type;
}
-static void
-ia64_register_convert_to_raw (struct type *type, int regnum,
- const char *from, char *to)
+static int
+ia64_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
+ struct reggroup *group)
{
- if (regnum >= IA64_FR0_REGNUM && regnum <= IA64_FR127_REGNUM)
- {
- DOUBLEST val = deprecated_extract_floating (from, TYPE_LENGTH(type));
- floatformat_from_doublest (&floatformat_ia64_ext, &val, to);
- }
- else
- error("ia64_register_convert_to_raw called with non floating point register number");
+ int vector_p;
+ int float_p;
+ int raw_p;
+ if (group == all_reggroup)
+ return 1;
+ vector_p = TYPE_VECTOR (register_type (gdbarch, regnum));
+ float_p = register_type (gdbarch, regnum)->code () == TYPE_CODE_FLT;
+ raw_p = regnum < NUM_IA64_RAW_REGS;
+ if (group == float_reggroup)
+ return float_p;
+ if (group == vector_reggroup)
+ return vector_p;
+ if (group == general_reggroup)
+ return (!vector_p && !float_p);
+ if (group == save_reggroup || group == restore_reggroup)
+ return raw_p;
+ return 0;
+}
+
+static const char *
+ia64_register_name (struct gdbarch *gdbarch, int reg)
+{
+ return ia64_register_names[reg];
}
struct type *
-ia64_register_virtual_type (int reg)
+ia64_register_type (struct gdbarch *arch, int reg)
{
if (reg >= IA64_FR0_REGNUM && reg <= IA64_FR127_REGNUM)
- return builtin_type_long_double;
+ return ia64_ext_type (arch);
else
- return builtin_type_long;
+ return builtin_type (arch)->builtin_long;
}
static int
-ia64_register_byte (int reg)
+ia64_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
{
- return (8 * reg) +
- (reg <= IA64_FR0_REGNUM ? 0 : 8 * ((reg > IA64_FR127_REGNUM) ? 128 : reg - IA64_FR0_REGNUM));
+ if (reg >= IA64_GR32_REGNUM && reg <= IA64_GR127_REGNUM)
+ return V32_REGNUM + (reg - IA64_GR32_REGNUM);
+ return reg;
}
-/* Read the given register from a sigcontext structure in the
- specified frame. */
-
-static CORE_ADDR
-read_sigcontext_register (struct frame_info *frame, int regnum)
-{
- CORE_ADDR regaddr;
-
- if (frame == NULL)
- internal_error (__FILE__, __LINE__,
- "read_sigcontext_register: NULL frame");
- if (!(get_frame_type (frame) == SIGTRAMP_FRAME))
- internal_error (__FILE__, __LINE__,
- "read_sigcontext_register: frame not a signal trampoline");
- if (SIGCONTEXT_REGISTER_ADDRESS == 0)
- internal_error (__FILE__, __LINE__,
- "read_sigcontext_register: SIGCONTEXT_REGISTER_ADDRESS is 0");
-
- regaddr = SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), regnum);
- if (regaddr)
- return read_memory_integer (regaddr, REGISTER_RAW_SIZE (regnum));
- else
- internal_error (__FILE__, __LINE__,
- "read_sigcontext_register: Register %d not in struct sigcontext", regnum);
-}
/* Extract ``len'' bits from an instruction bundle starting at
bit ``from''. */
static long long
-extract_bit_field (char *bundle, int from, int len)
+extract_bit_field (const gdb_byte *bundle, int from, int len)
{
long long result = 0LL;
int to = from + len;
return result;
}
-/* Replace the specified bits in an instruction bundle */
+/* Replace the specified bits in an instruction bundle. */
static void
-replace_bit_field (char *bundle, long long val, int from, int len)
+replace_bit_field (gdb_byte *bundle, long long val, int from, int len)
{
int to = from + len;
int from_byte = from / 8;
}
/* Return the contents of slot N (for N = 0, 1, or 2) in
- and instruction bundle */
+ and instruction bundle. */
static long long
-slotN_contents (char *bundle, int slotnum)
+slotN_contents (gdb_byte *bundle, int slotnum)
{
return extract_bit_field (bundle, 5+41*slotnum, 41);
}
-/* Store an instruction in an instruction bundle */
+/* Store an instruction in an instruction bundle. */
static void
-replace_slotN_contents (char *bundle, long long instr, int slotnum)
+replace_slotN_contents (gdb_byte *bundle, long long instr, int slotnum)
{
replace_bit_field (bundle, instr, 5+41*slotnum, 41);
}
-static enum instruction_type template_encoding_table[32][3] =
+static const enum instruction_type template_encoding_table[32][3] =
{
{ M, I, I }, /* 00 */
{ M, I, I }, /* 01 */
static CORE_ADDR
fetch_instruction (CORE_ADDR addr, instruction_type *it, long long *instr)
{
- char bundle[BUNDLE_LEN];
+ gdb_byte bundle[BUNDLE_LEN];
int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
- long long template;
+ long long templ;
int val;
/* Warn about slot numbers greater than 2. We used to generate
at the assembly language level. */
if (slotnum > 2)
{
- warning ("Can't fetch instructions for slot numbers greater than 2.\n"
- "Using slot 0 instead");
+ warning (_("Can't fetch instructions for slot numbers greater than 2.\n"
+ "Using slot 0 instead"));
slotnum = 0;
}
return 0;
*instr = slotN_contents (bundle, slotnum);
- template = extract_bit_field (bundle, 0, 5);
- *it = template_encoding_table[(int)template][slotnum];
+ templ = extract_bit_field (bundle, 0, 5);
+ *it = template_encoding_table[(int)templ][slotnum];
if (slotnum == 2 || (slotnum == 1 && *it == L))
addr += 16;
simulators. So I changed the pattern slightly to do "break.i 0x080001"
instead. But that didn't work either (I later found out that this
pattern was used by the simulator that I was using.) So I ended up
- using the pattern seen below. */
+ using the pattern seen below.
+
+ SHADOW_CONTENTS has byte-based addressing (PLACED_ADDRESS and SHADOW_LEN)
+ while we need bit-based addressing as the instructions length is 41 bits and
+ we must not modify/corrupt the adjacent slots in the same bundle.
+ Fortunately we may store larger memory incl. the adjacent bits with the
+ original memory content (not the possibly already stored breakpoints there).
+ We need to be careful in ia64_memory_remove_breakpoint to always restore
+ only the specific bits of this instruction ignoring any adjacent stored
+ bits.
+
+ We use the original addressing with the low nibble in the range <0..2> which
+ gets incorrectly interpreted by generic non-ia64 breakpoint_restore_shadows
+ as the direct byte offset of SHADOW_CONTENTS. We store whole BUNDLE_LEN
+ bytes just without these two possibly skipped bytes to not to exceed to the
+ next bundle.
+
+ If we would like to store the whole bundle to SHADOW_CONTENTS we would have
+ to store already the base address (`address & ~0x0f') into PLACED_ADDRESS.
+ In such case there is no other place where to store
+ SLOTNUM (`adress & 0x0f', value in the range <0..2>). We need to know
+ SLOTNUM in ia64_memory_remove_breakpoint.
+
+ There is one special case where we need to be extra careful:
+ L-X instructions, which are instructions that occupy 2 slots
+ (The L part is always in slot 1, and the X part is always in
+ slot 2). We must refuse to insert breakpoints for an address
+ that points at slot 2 of a bundle where an L-X instruction is
+ present, since there is logically no instruction at that address.
+ However, to make things more interesting, the opcode of L-X
+ instructions is located in slot 2. This means that, to insert
+ a breakpoint at an address that points to slot 1, we actually
+ need to write the breakpoint in slot 2! Slot 1 is actually
+ the extended operand, so writing the breakpoint there would not
+ have the desired effect. Another side-effect of this issue
+ is that we need to make sure that the shadow contents buffer
+ does save byte 15 of our instruction bundle (this is the tail
+ end of slot 2, which wouldn't be saved if we were to insert
+ the breakpoint in slot 1).
+
+ ia64 16-byte bundle layout:
+ | 5 bits | slot 0 with 41 bits | slot 1 with 41 bits | slot 2 with 41 bits |
+
+ The current addressing used by the code below:
+ original PC placed_address placed_size required covered
+ == bp_tgt->shadow_len reqd \subset covered
+ 0xABCDE0 0xABCDE0 0x10 <0x0...0x5> <0x0..0xF>
+ 0xABCDE1 0xABCDE1 0xF <0x5...0xA> <0x1..0xF>
+ 0xABCDE2 0xABCDE2 0xE <0xA...0xF> <0x2..0xF>
+
+ L-X instructions are treated a little specially, as explained above:
+ 0xABCDE1 0xABCDE1 0xF <0xA...0xF> <0x1..0xF>
+
+ `objdump -d' and some other tools show a bit unjustified offsets:
+ original PC byte where starts the instruction objdump offset
+ 0xABCDE0 0xABCDE0 0xABCDE0
+ 0xABCDE1 0xABCDE5 0xABCDE6
+ 0xABCDE2 0xABCDEA 0xABCDEC
+ */
-#if 0
-#define IA64_BREAKPOINT 0x00002000040LL
-#endif
#define IA64_BREAKPOINT 0x00003333300LL
static int
-ia64_memory_insert_breakpoint (CORE_ADDR addr, char *contents_cache)
+ia64_memory_insert_breakpoint (struct gdbarch *gdbarch,
+ struct bp_target_info *bp_tgt)
{
- char bundle[BUNDLE_LEN];
- int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
- long long instr;
+ CORE_ADDR addr = bp_tgt->placed_address = bp_tgt->reqstd_address;
+ gdb_byte bundle[BUNDLE_LEN];
+ int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER, shadow_slotnum;
+ long long instr_breakpoint;
int val;
- int template;
+ int templ;
if (slotnum > 2)
- error("Can't insert breakpoint for slot numbers greater than 2.");
+ error (_("Can't insert breakpoint for slot numbers greater than 2."));
addr &= ~0x0f;
+ /* Enable the automatic memory restoration from breakpoints while
+ we read our instruction bundle for the purpose of SHADOW_CONTENTS.
+ Otherwise, we could possibly store into the shadow parts of the adjacent
+ placed breakpoints. It is due to our SHADOW_CONTENTS overlapping the real
+ breakpoint instruction bits region. */
+ scoped_restore restore_memory_0
+ = make_scoped_restore_show_memory_breakpoints (0);
val = target_read_memory (addr, bundle, BUNDLE_LEN);
+ if (val != 0)
+ return val;
+
+ /* SHADOW_SLOTNUM saves the original slot number as expected by the caller
+ for addressing the SHADOW_CONTENTS placement. */
+ shadow_slotnum = slotnum;
- /* Check for L type instruction in 2nd slot, if present then
- bump up the slot number to the 3rd slot */
- template = extract_bit_field (bundle, 0, 5);
- if (slotnum == 1 && template_encoding_table[template][1] == L)
+ /* Always cover the last byte of the bundle in case we are inserting
+ a breakpoint on an L-X instruction. */
+ bp_tgt->shadow_len = BUNDLE_LEN - shadow_slotnum;
+
+ templ = extract_bit_field (bundle, 0, 5);
+ if (template_encoding_table[templ][slotnum] == X)
+ {
+ /* X unit types can only be used in slot 2, and are actually
+ part of a 2-slot L-X instruction. We cannot break at this
+ address, as this is the second half of an instruction that
+ lives in slot 1 of that bundle. */
+ gdb_assert (slotnum == 2);
+ error (_("Can't insert breakpoint for non-existing slot X"));
+ }
+ if (template_encoding_table[templ][slotnum] == L)
{
+ /* L unit types can only be used in slot 1. But the associated
+ opcode for that instruction is in slot 2, so bump the slot number
+ accordingly. */
+ gdb_assert (slotnum == 1);
slotnum = 2;
}
- instr = slotN_contents (bundle, slotnum);
- memcpy(contents_cache, &instr, sizeof(instr));
+ /* Store the whole bundle, except for the initial skipped bytes by the slot
+ number interpreted as bytes offset in PLACED_ADDRESS. */
+ memcpy (bp_tgt->shadow_contents, bundle + shadow_slotnum,
+ bp_tgt->shadow_len);
+
+ /* Re-read the same bundle as above except that, this time, read it in order
+ to compute the new bundle inside which we will be inserting the
+ breakpoint. Therefore, disable the automatic memory restoration from
+ breakpoints while we read our instruction bundle. Otherwise, the general
+ restoration mechanism kicks in and we would possibly remove parts of the
+ adjacent placed breakpoints. It is due to our SHADOW_CONTENTS overlapping
+ the real breakpoint instruction bits region. */
+ scoped_restore restore_memory_1
+ = make_scoped_restore_show_memory_breakpoints (1);
+ val = target_read_memory (addr, bundle, BUNDLE_LEN);
+ if (val != 0)
+ return val;
+
+ /* Breakpoints already present in the code will get detected and not get
+ reinserted by bp_loc_is_permanent. Multiple breakpoints at the same
+ location cannot induce the internal error as they are optimized into
+ a single instance by update_global_location_list. */
+ instr_breakpoint = slotN_contents (bundle, slotnum);
+ if (instr_breakpoint == IA64_BREAKPOINT)
+ internal_error (__FILE__, __LINE__,
+ _("Address %s already contains a breakpoint."),
+ paddress (gdbarch, bp_tgt->placed_address));
replace_slotN_contents (bundle, IA64_BREAKPOINT, slotnum);
- if (val == 0)
- target_write_memory (addr, bundle, BUNDLE_LEN);
+
+ val = target_write_memory (addr + shadow_slotnum, bundle + shadow_slotnum,
+ bp_tgt->shadow_len);
return val;
}
static int
-ia64_memory_remove_breakpoint (CORE_ADDR addr, char *contents_cache)
+ia64_memory_remove_breakpoint (struct gdbarch *gdbarch,
+ struct bp_target_info *bp_tgt)
{
- char bundle[BUNDLE_LEN];
- int slotnum = (addr & 0x0f) / SLOT_MULTIPLIER;
- long long instr;
+ CORE_ADDR addr = bp_tgt->placed_address;
+ gdb_byte bundle_mem[BUNDLE_LEN], bundle_saved[BUNDLE_LEN];
+ int slotnum = (addr & 0x0f) / SLOT_MULTIPLIER, shadow_slotnum;
+ long long instr_breakpoint, instr_saved;
int val;
- int template;
+ int templ;
addr &= ~0x0f;
- val = target_read_memory (addr, bundle, BUNDLE_LEN);
+ /* Disable the automatic memory restoration from breakpoints while
+ we read our instruction bundle. Otherwise, the general restoration
+ mechanism kicks in and we would possibly remove parts of the adjacent
+ placed breakpoints. It is due to our SHADOW_CONTENTS overlapping the real
+ breakpoint instruction bits region. */
+ scoped_restore restore_memory_1
+ = make_scoped_restore_show_memory_breakpoints (1);
+ val = target_read_memory (addr, bundle_mem, BUNDLE_LEN);
+ if (val != 0)
+ return val;
- /* Check for L type instruction in 2nd slot, if present then
- bump up the slot number to the 3rd slot */
- template = extract_bit_field (bundle, 0, 5);
- if (slotnum == 1 && template_encoding_table[template][1] == L)
+ /* SHADOW_SLOTNUM saves the original slot number as expected by the caller
+ for addressing the SHADOW_CONTENTS placement. */
+ shadow_slotnum = slotnum;
+
+ templ = extract_bit_field (bundle_mem, 0, 5);
+ if (template_encoding_table[templ][slotnum] == X)
+ {
+ /* X unit types can only be used in slot 2, and are actually
+ part of a 2-slot L-X instruction. We refuse to insert
+ breakpoints at this address, so there should be no reason
+ for us attempting to remove one there, except if the program's
+ code somehow got modified in memory. */
+ gdb_assert (slotnum == 2);
+ warning (_("Cannot remove breakpoint at address %s from non-existing "
+ "X-type slot, memory has changed underneath"),
+ paddress (gdbarch, bp_tgt->placed_address));
+ return -1;
+ }
+ if (template_encoding_table[templ][slotnum] == L)
{
+ /* L unit types can only be used in slot 1. But the breakpoint
+ was actually saved using slot 2, so update the slot number
+ accordingly. */
+ gdb_assert (slotnum == 1);
slotnum = 2;
}
- memcpy (&instr, contents_cache, sizeof instr);
- replace_slotN_contents (bundle, instr, slotnum);
- if (val == 0)
- target_write_memory (addr, bundle, BUNDLE_LEN);
+ gdb_assert (bp_tgt->shadow_len == BUNDLE_LEN - shadow_slotnum);
+
+ instr_breakpoint = slotN_contents (bundle_mem, slotnum);
+ if (instr_breakpoint != IA64_BREAKPOINT)
+ {
+ warning (_("Cannot remove breakpoint at address %s, "
+ "no break instruction at such address."),
+ paddress (gdbarch, bp_tgt->placed_address));
+ return -1;
+ }
+
+ /* Extract the original saved instruction from SLOTNUM normalizing its
+ bit-shift for INSTR_SAVED. */
+ memcpy (bundle_saved, bundle_mem, BUNDLE_LEN);
+ memcpy (bundle_saved + shadow_slotnum, bp_tgt->shadow_contents,
+ bp_tgt->shadow_len);
+ instr_saved = slotN_contents (bundle_saved, slotnum);
+
+ /* In BUNDLE_MEM, be careful to modify only the bits belonging to SLOTNUM
+ and not any of the other ones that are stored in SHADOW_CONTENTS. */
+ replace_slotN_contents (bundle_mem, instr_saved, slotnum);
+ val = target_write_raw_memory (addr, bundle_mem, BUNDLE_LEN);
return val;
}
-/* We don't really want to use this, but remote.c needs to call it in order
- to figure out if Z-packets are supported or not. Oh, well. */
-const unsigned char *
-ia64_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
+/* Implement the breakpoint_kind_from_pc gdbarch method. */
+
+static int
+ia64_breakpoint_kind_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr)
{
- static unsigned char breakpoint[] =
- { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
- *lenptr = sizeof (breakpoint);
-#if 0
- *pcptr &= ~0x0f;
-#endif
- return breakpoint;
+ /* A place holder of gdbarch method breakpoint_kind_from_pc. */
+ return 0;
}
-static CORE_ADDR
-ia64_read_fp (void)
+/* As gdbarch_breakpoint_from_pc ranges have byte granularity and ia64
+ instruction slots ranges are bit-granular (41 bits) we have to provide an
+ extended range as described for ia64_memory_insert_breakpoint. We also take
+ care of preserving the `break' instruction 21-bit (or 62-bit) parameter to
+ make a match for permanent breakpoints. */
+
+static const gdb_byte *
+ia64_breakpoint_from_pc (struct gdbarch *gdbarch,
+ CORE_ADDR *pcptr, int *lenptr)
{
- /* We won't necessarily have a frame pointer and even if we do, it
- winds up being extraordinarly messy when attempting to find the
- frame chain. So for the purposes of creating frames (which is
- all deprecated_read_fp() is used for), simply use the stack
- pointer value instead. */
- gdb_assert (SP_REGNUM >= 0);
- return read_register (SP_REGNUM);
+ CORE_ADDR addr = *pcptr;
+ static gdb_byte bundle[BUNDLE_LEN];
+ int slotnum = (int) (*pcptr & 0x0f) / SLOT_MULTIPLIER, shadow_slotnum;
+ long long instr_fetched;
+ int val;
+ int templ;
+
+ if (slotnum > 2)
+ error (_("Can't insert breakpoint for slot numbers greater than 2."));
+
+ addr &= ~0x0f;
+
+ /* Enable the automatic memory restoration from breakpoints while
+ we read our instruction bundle to match bp_loc_is_permanent. */
+ {
+ scoped_restore restore_memory_0
+ = make_scoped_restore_show_memory_breakpoints (0);
+ val = target_read_memory (addr, bundle, BUNDLE_LEN);
+ }
+
+ /* The memory might be unreachable. This can happen, for instance,
+ when the user inserts a breakpoint at an invalid address. */
+ if (val != 0)
+ return NULL;
+
+ /* SHADOW_SLOTNUM saves the original slot number as expected by the caller
+ for addressing the SHADOW_CONTENTS placement. */
+ shadow_slotnum = slotnum;
+
+ /* Cover always the last byte of the bundle for the L-X slot case. */
+ *lenptr = BUNDLE_LEN - shadow_slotnum;
+
+ /* Check for L type instruction in slot 1, if present then bump up the slot
+ number to the slot 2. */
+ templ = extract_bit_field (bundle, 0, 5);
+ if (template_encoding_table[templ][slotnum] == X)
+ {
+ gdb_assert (slotnum == 2);
+ error (_("Can't insert breakpoint for non-existing slot X"));
+ }
+ if (template_encoding_table[templ][slotnum] == L)
+ {
+ gdb_assert (slotnum == 1);
+ slotnum = 2;
+ }
+
+ /* A break instruction has its all its opcode bits cleared except for
+ the parameter value. For L+X slot pair we are at the X slot (slot 2) so
+ we should not touch the L slot - the upper 41 bits of the parameter. */
+ instr_fetched = slotN_contents (bundle, slotnum);
+ instr_fetched &= 0x1003ffffc0LL;
+ replace_slotN_contents (bundle, instr_fetched, slotnum);
+
+ return bundle + shadow_slotnum;
}
static CORE_ADDR
-ia64_read_pc (ptid_t ptid)
+ia64_read_pc (readable_regcache *regcache)
{
- CORE_ADDR psr_value = read_register_pid (IA64_PSR_REGNUM, ptid);
- CORE_ADDR pc_value = read_register_pid (IA64_IP_REGNUM, ptid);
- int slot_num = (psr_value >> 41) & 3;
+ ULONGEST psr_value, pc_value;
+ int slot_num;
+
+ regcache->cooked_read (IA64_PSR_REGNUM, &psr_value);
+ regcache->cooked_read (IA64_IP_REGNUM, &pc_value);
+ slot_num = (psr_value >> 41) & 3;
return pc_value | (slot_num * SLOT_MULTIPLIER);
}
-static void
-ia64_write_pc (CORE_ADDR new_pc, ptid_t ptid)
+void
+ia64_write_pc (struct regcache *regcache, CORE_ADDR new_pc)
{
int slot_num = (int) (new_pc & 0xf) / SLOT_MULTIPLIER;
- CORE_ADDR psr_value = read_register_pid (IA64_PSR_REGNUM, ptid);
+ ULONGEST psr_value;
+
+ regcache_cooked_read_unsigned (regcache, IA64_PSR_REGNUM, &psr_value);
psr_value &= ~(3LL << 41);
- psr_value |= (CORE_ADDR)(slot_num & 0x3) << 41;
+ psr_value |= (ULONGEST)(slot_num & 0x3) << 41;
new_pc &= ~0xfLL;
- write_register_pid (IA64_PSR_REGNUM, psr_value, ptid);
- write_register_pid (IA64_IP_REGNUM, new_pc, ptid);
+ regcache_cooked_write_unsigned (regcache, IA64_PSR_REGNUM, psr_value);
+ regcache_cooked_write_unsigned (regcache, IA64_IP_REGNUM, new_pc);
}
#define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
/* Returns the address of the slot that's NSLOTS slots away from
- the address ADDR. NSLOTS may be positive or negative. */
+ the address ADDR. NSLOTS may be positive or negative. */
static CORE_ADDR
rse_address_add(CORE_ADDR addr, int nslots)
{
return new_addr;
}
-/* The IA-64 frame chain is a bit odd. We won't always have a frame
- pointer, so we use the SP value as the FP for the purpose of
- creating a frame. There is sometimes a register (not fixed) which
- is used as a frame pointer. When this register exists, it is not
- especially hard to determine which one is being used. It isn't
- even really hard to compute the frame chain, but it can be
- computationally expensive. So, instead of making life difficult
- (and slow), we pick a more convenient representation of the frame
- chain, knowing that we'll have to make some small adjustments in
- other places. (E.g, note that deprecated_read_fp() is actually
- read_sp() in ia64_gdbarch_init() below.)
-
- Okay, so what is the frame chain exactly? It'll be the SP value
- at the time that the function in question was entered.
-
- Note that this *should* actually the frame pointer for the current
- function! But as I note above, if we were to attempt to find the
- address of the beginning of the previous frame, we'd waste a lot
- of cycles for no good reason. So instead, we simply choose to
- represent the frame chain as the end of the previous frame instead
- of the beginning. */
+static enum register_status
+ia64_pseudo_register_read (struct gdbarch *gdbarch, readable_regcache *regcache,
+ int regnum, gdb_byte *buf)
+{
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+ enum register_status status;
-static CORE_ADDR
-ia64_frame_chain (struct frame_info *frame)
-{
- if ((get_frame_type (frame) == SIGTRAMP_FRAME))
- return read_sigcontext_register (frame, sp_regnum);
- else if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
- get_frame_base (frame),
- get_frame_base (frame)))
- return get_frame_base (frame);
- else
+ if (regnum >= V32_REGNUM && regnum <= V127_REGNUM)
{
- DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
- if (get_frame_saved_regs (frame)[IA64_VFP_REGNUM])
- return read_memory_integer (get_frame_saved_regs (frame)[IA64_VFP_REGNUM], 8);
- else
- return (get_frame_base (frame)
- + get_frame_extra_info (frame)->mem_stack_frame_size);
+#ifdef HAVE_LIBUNWIND_IA64_H
+ /* First try and use the libunwind special reg accessor,
+ otherwise fallback to standard logic. */
+ if (!libunwind_is_initialized ()
+ || libunwind_get_reg_special (gdbarch, regcache, regnum, buf) != 0)
+#endif
+ {
+ /* The fallback position is to assume that r32-r127 are
+ found sequentially in memory starting at $bof. This
+ isn't always true, but without libunwind, this is the
+ best we can do. */
+ ULONGEST cfm;
+ ULONGEST bsp;
+ CORE_ADDR reg;
+
+ status = regcache->cooked_read (IA64_BSP_REGNUM, &bsp);
+ if (status != REG_VALID)
+ return status;
+
+ status = regcache->cooked_read (IA64_CFM_REGNUM, &cfm);
+ if (status != REG_VALID)
+ return status;
+
+ /* The bsp points at the end of the register frame so we
+ subtract the size of frame from it to get start of
+ register frame. */
+ bsp = rse_address_add (bsp, -(cfm & 0x7f));
+
+ if ((cfm & 0x7f) > regnum - V32_REGNUM)
+ {
+ ULONGEST reg_addr = rse_address_add (bsp, (regnum - V32_REGNUM));
+ reg = read_memory_integer ((CORE_ADDR)reg_addr, 8, byte_order);
+ store_unsigned_integer (buf, register_size (gdbarch, regnum),
+ byte_order, reg);
+ }
+ else
+ store_unsigned_integer (buf, register_size (gdbarch, regnum),
+ byte_order, 0);
+ }
}
-}
+ else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT31_REGNUM)
+ {
+ ULONGEST unatN_val;
+ ULONGEST unat;
+
+ status = regcache->cooked_read (IA64_UNAT_REGNUM, &unat);
+ if (status != REG_VALID)
+ return status;
+ unatN_val = (unat & (1LL << (regnum - IA64_NAT0_REGNUM))) != 0;
+ store_unsigned_integer (buf, register_size (gdbarch, regnum),
+ byte_order, unatN_val);
+ }
+ else if (IA64_NAT32_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM)
+ {
+ ULONGEST natN_val = 0;
+ ULONGEST bsp;
+ ULONGEST cfm;
+ CORE_ADDR gr_addr = 0;
-static CORE_ADDR
-ia64_frame_saved_pc (struct frame_info *frame)
-{
- if ((get_frame_type (frame) == SIGTRAMP_FRAME))
- return read_sigcontext_register (frame, pc_regnum);
- else if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
- get_frame_base (frame),
- get_frame_base (frame)))
- return deprecated_read_register_dummy (get_frame_pc (frame),
- get_frame_base (frame), pc_regnum);
+ status = regcache->cooked_read (IA64_BSP_REGNUM, &bsp);
+ if (status != REG_VALID)
+ return status;
+
+ status = regcache->cooked_read (IA64_CFM_REGNUM, &cfm);
+ if (status != REG_VALID)
+ return status;
+
+ /* The bsp points at the end of the register frame so we
+ subtract the size of frame from it to get start of register frame. */
+ bsp = rse_address_add (bsp, -(cfm & 0x7f));
+
+ if ((cfm & 0x7f) > regnum - V32_REGNUM)
+ gr_addr = rse_address_add (bsp, (regnum - V32_REGNUM));
+
+ if (gr_addr != 0)
+ {
+ /* Compute address of nat collection bits. */
+ CORE_ADDR nat_addr = gr_addr | 0x1f8;
+ ULONGEST nat_collection;
+ int nat_bit;
+ /* If our nat collection address is bigger than bsp, we have to get
+ the nat collection from rnat. Otherwise, we fetch the nat
+ collection from the computed address. */
+ if (nat_addr >= bsp)
+ regcache->cooked_read (IA64_RNAT_REGNUM, &nat_collection);
+ else
+ nat_collection = read_memory_integer (nat_addr, 8, byte_order);
+ nat_bit = (gr_addr >> 3) & 0x3f;
+ natN_val = (nat_collection >> nat_bit) & 1;
+ }
+
+ store_unsigned_integer (buf, register_size (gdbarch, regnum),
+ byte_order, natN_val);
+ }
+ else if (regnum == VBOF_REGNUM)
+ {
+ /* A virtual register frame start is provided for user convenience.
+ It can be calculated as the bsp - sof (sizeof frame). */
+ ULONGEST bsp, vbsp;
+ ULONGEST cfm;
+
+ status = regcache->cooked_read (IA64_BSP_REGNUM, &bsp);
+ if (status != REG_VALID)
+ return status;
+ status = regcache->cooked_read (IA64_CFM_REGNUM, &cfm);
+ if (status != REG_VALID)
+ return status;
+
+ /* The bsp points at the end of the register frame so we
+ subtract the size of frame from it to get beginning of frame. */
+ vbsp = rse_address_add (bsp, -(cfm & 0x7f));
+ store_unsigned_integer (buf, register_size (gdbarch, regnum),
+ byte_order, vbsp);
+ }
+ else if (VP0_REGNUM <= regnum && regnum <= VP63_REGNUM)
+ {
+ ULONGEST pr;
+ ULONGEST cfm;
+ ULONGEST prN_val;
+
+ status = regcache->cooked_read (IA64_PR_REGNUM, &pr);
+ if (status != REG_VALID)
+ return status;
+ status = regcache->cooked_read (IA64_CFM_REGNUM, &cfm);
+ if (status != REG_VALID)
+ return status;
+
+ if (VP16_REGNUM <= regnum && regnum <= VP63_REGNUM)
+ {
+ /* Fetch predicate register rename base from current frame
+ marker for this frame. */
+ int rrb_pr = (cfm >> 32) & 0x3f;
+
+ /* Adjust the register number to account for register rotation. */
+ regnum = VP16_REGNUM
+ + ((regnum - VP16_REGNUM) + rrb_pr) % 48;
+ }
+ prN_val = (pr & (1LL << (regnum - VP0_REGNUM))) != 0;
+ store_unsigned_integer (buf, register_size (gdbarch, regnum),
+ byte_order, prN_val);
+ }
else
+ memset (buf, 0, register_size (gdbarch, regnum));
+
+ return REG_VALID;
+}
+
+static void
+ia64_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
+ int regnum, const gdb_byte *buf)
+{
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+
+ if (regnum >= V32_REGNUM && regnum <= V127_REGNUM)
+ {
+ ULONGEST bsp;
+ ULONGEST cfm;
+ regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp);
+ regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm);
+
+ bsp = rse_address_add (bsp, -(cfm & 0x7f));
+
+ if ((cfm & 0x7f) > regnum - V32_REGNUM)
+ {
+ ULONGEST reg_addr = rse_address_add (bsp, (regnum - V32_REGNUM));
+ write_memory (reg_addr, buf, 8);
+ }
+ }
+ else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT31_REGNUM)
+ {
+ ULONGEST unatN_val, unat, unatN_mask;
+ regcache_cooked_read_unsigned (regcache, IA64_UNAT_REGNUM, &unat);
+ unatN_val = extract_unsigned_integer (buf, register_size (gdbarch,
+ regnum),
+ byte_order);
+ unatN_mask = (1LL << (regnum - IA64_NAT0_REGNUM));
+ if (unatN_val == 0)
+ unat &= ~unatN_mask;
+ else if (unatN_val == 1)
+ unat |= unatN_mask;
+ regcache_cooked_write_unsigned (regcache, IA64_UNAT_REGNUM, unat);
+ }
+ else if (IA64_NAT32_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM)
+ {
+ ULONGEST natN_val;
+ ULONGEST bsp;
+ ULONGEST cfm;
+ CORE_ADDR gr_addr = 0;
+ regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp);
+ regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm);
+
+ /* The bsp points at the end of the register frame so we
+ subtract the size of frame from it to get start of register frame. */
+ bsp = rse_address_add (bsp, -(cfm & 0x7f));
+
+ if ((cfm & 0x7f) > regnum - V32_REGNUM)
+ gr_addr = rse_address_add (bsp, (regnum - V32_REGNUM));
+
+ natN_val = extract_unsigned_integer (buf, register_size (gdbarch,
+ regnum),
+ byte_order);
+
+ if (gr_addr != 0 && (natN_val == 0 || natN_val == 1))
+ {
+ /* Compute address of nat collection bits. */
+ CORE_ADDR nat_addr = gr_addr | 0x1f8;
+ CORE_ADDR nat_collection;
+ int natN_bit = (gr_addr >> 3) & 0x3f;
+ ULONGEST natN_mask = (1LL << natN_bit);
+ /* If our nat collection address is bigger than bsp, we have to get
+ the nat collection from rnat. Otherwise, we fetch the nat
+ collection from the computed address. */
+ if (nat_addr >= bsp)
+ {
+ regcache_cooked_read_unsigned (regcache,
+ IA64_RNAT_REGNUM,
+ &nat_collection);
+ if (natN_val)
+ nat_collection |= natN_mask;
+ else
+ nat_collection &= ~natN_mask;
+ regcache_cooked_write_unsigned (regcache, IA64_RNAT_REGNUM,
+ nat_collection);
+ }
+ else
+ {
+ gdb_byte nat_buf[8];
+ nat_collection = read_memory_integer (nat_addr, 8, byte_order);
+ if (natN_val)
+ nat_collection |= natN_mask;
+ else
+ nat_collection &= ~natN_mask;
+ store_unsigned_integer (nat_buf, register_size (gdbarch, regnum),
+ byte_order, nat_collection);
+ write_memory (nat_addr, nat_buf, 8);
+ }
+ }
+ }
+ else if (VP0_REGNUM <= regnum && regnum <= VP63_REGNUM)
{
- DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
+ ULONGEST pr;
+ ULONGEST cfm;
+ ULONGEST prN_val;
+ ULONGEST prN_mask;
+
+ regcache_cooked_read_unsigned (regcache, IA64_PR_REGNUM, &pr);
+ regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm);
+
+ if (VP16_REGNUM <= regnum && regnum <= VP63_REGNUM)
+ {
+ /* Fetch predicate register rename base from current frame
+ marker for this frame. */
+ int rrb_pr = (cfm >> 32) & 0x3f;
- if (get_frame_saved_regs (frame)[IA64_VRAP_REGNUM])
- return read_memory_integer (get_frame_saved_regs (frame)[IA64_VRAP_REGNUM], 8);
- else if (get_next_frame (frame)
- && (get_frame_type (get_next_frame (frame)) == SIGTRAMP_FRAME))
- return read_sigcontext_register (get_next_frame (frame), IA64_BR0_REGNUM);
- else /* either frameless, or not far enough along in the prologue... */
- return ia64_saved_pc_after_call (frame);
+ /* Adjust the register number to account for register rotation. */
+ regnum = VP16_REGNUM
+ + ((regnum - VP16_REGNUM) + rrb_pr) % 48;
+ }
+ prN_val = extract_unsigned_integer (buf, register_size (gdbarch, regnum),
+ byte_order);
+ prN_mask = (1LL << (regnum - VP0_REGNUM));
+ if (prN_val == 0)
+ pr &= ~prN_mask;
+ else if (prN_val == 1)
+ pr |= prN_mask;
+ regcache_cooked_write_unsigned (regcache, IA64_PR_REGNUM, pr);
}
}
+/* The ia64 needs to convert between various ieee floating-point formats
+ and the special ia64 floating point register format. */
+
+static int
+ia64_convert_register_p (struct gdbarch *gdbarch, int regno, struct type *type)
+{
+ return (regno >= IA64_FR0_REGNUM && regno <= IA64_FR127_REGNUM
+ && type->code () == TYPE_CODE_FLT
+ && type != ia64_ext_type (gdbarch));
+}
+
+static int
+ia64_register_to_value (struct frame_info *frame, int regnum,
+ struct type *valtype, gdb_byte *out,
+ int *optimizedp, int *unavailablep)
+{
+ struct gdbarch *gdbarch = get_frame_arch (frame);
+ gdb_byte in[IA64_FP_REGISTER_SIZE];
+
+ /* Convert to TYPE. */
+ if (!get_frame_register_bytes (frame, regnum, 0,
+ register_size (gdbarch, regnum),
+ in, optimizedp, unavailablep))
+ return 0;
+
+ target_float_convert (in, ia64_ext_type (gdbarch), out, valtype);
+ *optimizedp = *unavailablep = 0;
+ return 1;
+}
+
+static void
+ia64_value_to_register (struct frame_info *frame, int regnum,
+ struct type *valtype, const gdb_byte *in)
+{
+ struct gdbarch *gdbarch = get_frame_arch (frame);
+ gdb_byte out[IA64_FP_REGISTER_SIZE];
+ target_float_convert (in, valtype, out, ia64_ext_type (gdbarch));
+ put_frame_register (frame, regnum, out);
+}
+
+
/* Limit the number of skipped non-prologue instructions since examining
of the prologue is expensive. */
static int max_skip_non_prologue_insns = 40;
used with no further scanning in the event that the function is
frameless. */
+/* FIXME: cagney/2004-02-14: This function and logic have largely been
+ superseded by skip_prologue_using_sal. */
+
static CORE_ADDR
refine_prologue_limit (CORE_ADDR pc, CORE_ADDR lim_pc, int *trust_limit)
{
struct symtab_and_line prologue_sal;
CORE_ADDR start_pc = pc;
+ CORE_ADDR end_pc;
+
+ /* The prologue can not possibly go past the function end itself,
+ so we can already adjust LIM_PC accordingly. */
+ if (find_pc_partial_function (pc, NULL, NULL, &end_pc) && end_pc < lim_pc)
+ lim_pc = end_pc;
/* Start off not trusting the limit. */
*trust_limit = 0;
| (((_instr_) & 0x00008000000LL) >> 20) \
| (((_instr_) & 0x00000001fc0LL) >> 6))
+/* Allocate and initialize a frame cache. */
+
+static struct ia64_frame_cache *
+ia64_alloc_frame_cache (void)
+{
+ struct ia64_frame_cache *cache;
+ int i;
+
+ cache = FRAME_OBSTACK_ZALLOC (struct ia64_frame_cache);
+
+ /* Base address. */
+ cache->base = 0;
+ cache->pc = 0;
+ cache->cfm = 0;
+ cache->prev_cfm = 0;
+ cache->sof = 0;
+ cache->sol = 0;
+ cache->sor = 0;
+ cache->bsp = 0;
+ cache->fp_reg = 0;
+ cache->frameless = 1;
+
+ for (i = 0; i < NUM_IA64_RAW_REGS; i++)
+ cache->saved_regs[i] = 0;
+
+ return cache;
+}
+
static CORE_ADDR
-examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, struct frame_info *frame)
+examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc,
+ struct frame_info *this_frame,
+ struct ia64_frame_cache *cache)
{
CORE_ADDR next_pc;
CORE_ADDR last_prologue_pc = pc;
instruction_type it;
long long instr;
- int do_fsr_stuff = 0;
-
int cfm_reg = 0;
int ret_reg = 0;
int fp_reg = 0;
char infpstores[8];
char reg_contents[256];
int trust_limit;
- int frameless = 0;
+ int frameless = 1;
+ int i;
+ CORE_ADDR addr;
+ gdb_byte buf[8];
+ CORE_ADDR bof, sor, sol, sof, cfm, rrb_gr;
memset (instores, 0, sizeof instores);
memset (infpstores, 0, sizeof infpstores);
memset (reg_contents, 0, sizeof reg_contents);
- if (frame && !get_frame_saved_regs (frame))
- {
- frame_saved_regs_zalloc (frame);
- do_fsr_stuff = 1;
- }
-
- if (frame
- && !do_fsr_stuff
- && get_frame_extra_info (frame)->after_prologue != 0
- && get_frame_extra_info (frame)->after_prologue <= lim_pc)
- return get_frame_extra_info (frame)->after_prologue;
+ if (cache->after_prologue != 0
+ && cache->after_prologue <= lim_pc)
+ return cache->after_prologue;
lim_pc = refine_prologue_limit (pc, lim_pc, &trust_limit);
next_pc = fetch_instruction (pc, &it, &instr);
&& it == M && ((instr & 0x1ee0000003fLL) == 0x02c00000000LL))
{
/* alloc - start of a regular function. */
- int sor = (int) ((instr & 0x00078000000LL) >> 27);
- int sol = (int) ((instr & 0x00007f00000LL) >> 20);
- int sof = (int) ((instr & 0x000000fe000LL) >> 13);
- /* Okay, so sor, sol, and sof aren't used right now; but perhaps
- we could compare against the size given to us via the cfm as
- either a sanity check or possibly to see if the frame has been
- changed by a later alloc instruction... */
+ int sol_bits = (int) ((instr & 0x00007f00000LL) >> 20);
+ int sof_bits = (int) ((instr & 0x000000fe000LL) >> 13);
int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
+
+ /* Verify that the current cfm matches what we think is the
+ function start. If we have somehow jumped within a function,
+ we do not want to interpret the prologue and calculate the
+ addresses of various registers such as the return address.
+ We will instead treat the frame as frameless. */
+ if (!this_frame ||
+ (sof_bits == (cache->cfm & 0x7f) &&
+ sol_bits == ((cache->cfm >> 7) & 0x7f)))
+ frameless = 0;
+
cfm_reg = rN;
last_prologue_pc = next_pc;
pc = next_pc;
int qp = (int) (instr & 0x0000000003fLL);
if (qp == 0 && rN == 2 && imm == 0 && rM == 12 && fp_reg == 0)
{
- /* mov r2, r12 - beginning of leaf routine */
+ /* mov r2, r12 - beginning of leaf routine. */
fp_reg = rN;
- frameless = 1;
last_prologue_pc = next_pc;
}
}
}
/* Loop, looking for prologue instructions, keeping track of
- where preserved registers were spilled. */
+ where preserved registers were spilled. */
while (pc < lim_pc)
{
next_pc = fetch_instruction (pc, &it, &instr);
if (next_pc == 0)
break;
- if ((it == B && ((instr & 0x1e1f800003f) != 0x04000000000))
- || ((instr & 0x3fLL) != 0LL))
+ if (it == B && ((instr & 0x1e1f800003fLL) != 0x04000000000LL))
+ {
+ /* Exit loop upon hitting a non-nop branch instruction. */
+ if (trust_limit)
+ lim_pc = pc;
+ break;
+ }
+ else if (((instr & 0x3fLL) != 0LL) &&
+ (frameless || ret_reg != 0))
{
- /* Exit loop upon hitting a non-nop branch instruction
- or a predicated instruction. */
+ /* Exit loop upon hitting a predicated instruction if
+ we already have the return register or if we are frameless. */
if (trust_limit)
lim_pc = pc;
break;
else if (qp == 0 && rN == 2
&& ((rM == fp_reg && fp_reg != 0) || rM == 12))
{
+ CORE_ADDR saved_sp = 0;
/* adds r2, spilloffset, rFramePointer
or
adds r2, spilloffset, r12
Get ready for stf.spill or st8.spill instructions.
- The address to start spilling at is loaded into r2.
+ The address to start spilling at is loaded into r2.
FIXME: Why r2? That's what gcc currently uses; it
could well be different for other compilers. */
- /* Hmm... whether or not this will work will depend on
+ /* Hmm... whether or not this will work will depend on
where the pc is. If it's still early in the prologue
this'll be wrong. FIXME */
- spill_addr = (frame ? get_frame_base (frame) : 0)
+ if (this_frame)
+ saved_sp = get_frame_register_unsigned (this_frame,
+ sp_regnum);
+ spill_addr = saved_sp
+ (rM == 12 ? 0 : mem_stack_frame_size)
+ imm;
spill_reg = rN;
last_prologue_pc = next_pc;
}
- else if (qp == 0 && rM >= 32 && rM < 40 && !instores[rM] &&
+ else if (qp == 0 && rM >= 32 && rM < 40 && !instores[rM-32] &&
rN < 256 && imm == 0)
{
- /* mov rN, rM where rM is an input register */
+ /* mov rN, rM where rM is an input register. */
reg_contents[rN] = rM;
last_prologue_pc = next_pc;
}
if (qp == 0 && rN == spill_reg && spill_addr != 0
&& ((2 <= fM && fM <= 5) || (16 <= fM && fM <= 31)))
{
- if (do_fsr_stuff)
- get_frame_saved_regs (frame)[IA64_FR0_REGNUM + fM] = spill_addr;
+ cache->saved_regs[IA64_FR0_REGNUM + fM] = spill_addr;
- if ((instr & 0x1efc0000000) == 0x0eec0000000)
+ if ((instr & 0x1efc0000000LL) == 0x0eec0000000LL)
spill_addr += imm;
else
- spill_addr = 0; /* last one; must be done */
+ spill_addr = 0; /* last one; must be done. */
last_prologue_pc = next_pc;
}
}
if (qp == 0 && isScratch (rN) && arM == 36 /* ar.unat */)
{
/* We have something like "mov.m r3 = ar.unat". Remember the
- r3 (or whatever) and watch for a store of this register... */
+ r3 (or whatever) and watch for a store of this register... */
unat_save_reg = rN;
last_prologue_pc = next_pc;
}
/* We've found a spill of either the UNAT register or the PR
register. (Well, not exactly; what we've actually found is
a spill of the register that UNAT or PR was moved to).
- Record that fact and move on... */
+ Record that fact and move on... */
if (rM == unat_save_reg)
{
- /* Track UNAT register */
- if (do_fsr_stuff)
- get_frame_saved_regs (frame)[IA64_UNAT_REGNUM] = spill_addr;
+ /* Track UNAT register. */
+ cache->saved_regs[IA64_UNAT_REGNUM] = spill_addr;
unat_save_reg = 0;
}
else
{
- /* Track PR register */
- if (do_fsr_stuff)
- get_frame_saved_regs (frame)[IA64_PR_REGNUM] = spill_addr;
+ /* Track PR register. */
+ cache->saved_regs[IA64_PR_REGNUM] = spill_addr;
pr_save_reg = 0;
}
if ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)
/* st8 [rN] = rM, imm9 */
spill_addr += imm9(instr);
else
- spill_addr = 0; /* must be done spilling */
+ spill_addr = 0; /* Must be done spilling. */
last_prologue_pc = next_pc;
}
else if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32])
{
- /* Allow up to one store of each input register. */
+ /* Allow up to one store of each input register. */
instores[rM-32] = 1;
last_prologue_pc = next_pc;
}
st8 [rN] = rM
Note that the st8 case is handled in the clause above.
- Advance over stores of input registers. One store per input
- register is permitted. */
+ Advance over stores of input registers. One store per input
+ register is permitted. */
int rM = (int) ((instr & 0x000000fe000LL) >> 13);
int qp = (int) (instr & 0x0000000003fLL);
int indirect = rM < 256 ? reg_contents[rM] : 0;
stfd [rN] = fM
Advance over stores of floating point input registers. Again
- one store per register is permitted */
+ one store per register is permitted. */
int fM = (int) ((instr & 0x000000fe000LL) >> 13);
int qp = (int) (instr & 0x0000000003fLL);
if (qp == 0 && 8 <= fM && fM < 16 && !infpstores[fM - 8])
{
/* We've found a spill of one of the preserved general purpose
regs. Record the spill address and advance the spill
- register if appropriate. */
- if (do_fsr_stuff)
- get_frame_saved_regs (frame)[IA64_GR0_REGNUM + rM] = spill_addr;
+ register if appropriate. */
+ cache->saved_regs[IA64_GR0_REGNUM + rM] = spill_addr;
if ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)
/* st8.spill [rN] = rM, imm9 */
spill_addr += imm9(instr);
else
- spill_addr = 0; /* Done spilling */
+ spill_addr = 0; /* Done spilling. */
last_prologue_pc = next_pc;
}
}
pc = next_pc;
}
- if (do_fsr_stuff) {
- int i;
- CORE_ADDR addr;
- int sor, rrb_gr;
-
- /* Extract the size of the rotating portion of the stack
- frame and the register rename base from the current
- frame marker. */
- sor = ((get_frame_extra_info (frame)->cfm >> 14) & 0xf) * 8;
- rrb_gr = (get_frame_extra_info (frame)->cfm >> 18) & 0x7f;
-
- for (i = 0, addr = get_frame_extra_info (frame)->bsp;
- i < get_frame_extra_info (frame)->sof;
- i++, addr += 8)
- {
- if (IS_NaT_COLLECTION_ADDR (addr))
- {
- addr += 8;
- }
- if (i < sor)
- get_frame_saved_regs (frame)[IA64_GR32_REGNUM + ((i + (sor - rrb_gr)) % sor)]
- = addr;
- else
- get_frame_saved_regs (frame)[IA64_GR32_REGNUM + i] = addr;
-
- if (i+32 == cfm_reg)
- get_frame_saved_regs (frame)[IA64_CFM_REGNUM] = addr;
- if (i+32 == ret_reg)
- get_frame_saved_regs (frame)[IA64_VRAP_REGNUM] = addr;
- if (i+32 == fp_reg)
- get_frame_saved_regs (frame)[IA64_VFP_REGNUM] = addr;
- }
- }
+ /* If not frameless and we aren't called by skip_prologue, then we need
+ to calculate registers for the previous frame which will be needed
+ later. */
- if (frame && get_frame_extra_info (frame))
+ if (!frameless && this_frame)
{
- get_frame_extra_info (frame)->after_prologue = last_prologue_pc;
- get_frame_extra_info (frame)->mem_stack_frame_size = mem_stack_frame_size;
- get_frame_extra_info (frame)->fp_reg = fp_reg;
- }
+ struct gdbarch *gdbarch = get_frame_arch (this_frame);
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+
+ /* Extract the size of the rotating portion of the stack
+ frame and the register rename base from the current
+ frame marker. */
+ cfm = cache->cfm;
+ sor = cache->sor;
+ sof = cache->sof;
+ sol = cache->sol;
+ rrb_gr = (cfm >> 18) & 0x7f;
+
+ /* Find the bof (beginning of frame). */
+ bof = rse_address_add (cache->bsp, -sof);
+
+ for (i = 0, addr = bof;
+ i < sof;
+ i++, addr += 8)
+ {
+ if (IS_NaT_COLLECTION_ADDR (addr))
+ {
+ addr += 8;
+ }
+ if (i+32 == cfm_reg)
+ cache->saved_regs[IA64_CFM_REGNUM] = addr;
+ if (i+32 == ret_reg)
+ cache->saved_regs[IA64_VRAP_REGNUM] = addr;
+ if (i+32 == fp_reg)
+ cache->saved_regs[IA64_VFP_REGNUM] = addr;
+ }
+ /* For the previous argument registers we require the previous bof.
+ If we can't find the previous cfm, then we can do nothing. */
+ cfm = 0;
+ if (cache->saved_regs[IA64_CFM_REGNUM] != 0)
+ {
+ cfm = read_memory_integer (cache->saved_regs[IA64_CFM_REGNUM],
+ 8, byte_order);
+ }
+ else if (cfm_reg != 0)
+ {
+ get_frame_register (this_frame, cfm_reg, buf);
+ cfm = extract_unsigned_integer (buf, 8, byte_order);
+ }
+ cache->prev_cfm = cfm;
+
+ if (cfm != 0)
+ {
+ sor = ((cfm >> 14) & 0xf) * 8;
+ sof = (cfm & 0x7f);
+ sol = (cfm >> 7) & 0x7f;
+ rrb_gr = (cfm >> 18) & 0x7f;
+
+ /* The previous bof only requires subtraction of the sol (size of
+ locals) due to the overlap between output and input of
+ subsequent frames. */
+ bof = rse_address_add (bof, -sol);
+
+ for (i = 0, addr = bof;
+ i < sof;
+ i++, addr += 8)
+ {
+ if (IS_NaT_COLLECTION_ADDR (addr))
+ {
+ addr += 8;
+ }
+ if (i < sor)
+ cache->saved_regs[IA64_GR32_REGNUM
+ + ((i + (sor - rrb_gr)) % sor)]
+ = addr;
+ else
+ cache->saved_regs[IA64_GR32_REGNUM + i] = addr;
+ }
+
+ }
+ }
+
/* Try and trust the lim_pc value whenever possible. */
if (trust_limit && lim_pc >= last_prologue_pc)
- return lim_pc;
+ last_prologue_pc = lim_pc;
+
+ cache->frameless = frameless;
+ cache->after_prologue = last_prologue_pc;
+ cache->mem_stack_frame_size = mem_stack_frame_size;
+ cache->fp_reg = fp_reg;
return last_prologue_pc;
}
CORE_ADDR
-ia64_skip_prologue (CORE_ADDR pc)
+ia64_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
{
- return examine_prologue (pc, pc+1024, 0);
+ struct ia64_frame_cache cache;
+ cache.base = 0;
+ cache.after_prologue = 0;
+ cache.cfm = 0;
+ cache.bsp = 0;
+
+ /* Call examine_prologue with - as third argument since we don't
+ have a next frame pointer to send. */
+ return examine_prologue (pc, pc+1024, 0, &cache);
}
-static void
-ia64_frame_init_saved_regs (struct frame_info *frame)
+
+/* Normal frames. */
+
+static struct ia64_frame_cache *
+ia64_frame_cache (struct frame_info *this_frame, void **this_cache)
{
- if (get_frame_saved_regs (frame))
- return;
+ struct gdbarch *gdbarch = get_frame_arch (this_frame);
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+ struct ia64_frame_cache *cache;
+ gdb_byte buf[8];
+ CORE_ADDR cfm;
+
+ if (*this_cache)
+ return (struct ia64_frame_cache *) *this_cache;
+
+ cache = ia64_alloc_frame_cache ();
+ *this_cache = cache;
+
+ get_frame_register (this_frame, sp_regnum, buf);
+ cache->saved_sp = extract_unsigned_integer (buf, 8, byte_order);
+
+ /* We always want the bsp to point to the end of frame.
+ This way, we can always get the beginning of frame (bof)
+ by subtracting frame size. */
+ get_frame_register (this_frame, IA64_BSP_REGNUM, buf);
+ cache->bsp = extract_unsigned_integer (buf, 8, byte_order);
+
+ get_frame_register (this_frame, IA64_PSR_REGNUM, buf);
- if ((get_frame_type (frame) == SIGTRAMP_FRAME) && SIGCONTEXT_REGISTER_ADDRESS)
- {
- int regno;
+ get_frame_register (this_frame, IA64_CFM_REGNUM, buf);
+ cfm = extract_unsigned_integer (buf, 8, byte_order);
- frame_saved_regs_zalloc (frame);
-
- get_frame_saved_regs (frame)[IA64_VRAP_REGNUM] =
- SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_IP_REGNUM);
- get_frame_saved_regs (frame)[IA64_CFM_REGNUM] =
- SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_CFM_REGNUM);
- get_frame_saved_regs (frame)[IA64_PSR_REGNUM] =
- SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_PSR_REGNUM);
-#if 0
- get_frame_saved_regs (frame)[IA64_BSP_REGNUM] =
- SIGCONTEXT_REGISTER_ADDRESS (frame->frame, IA64_BSP_REGNUM);
-#endif
- get_frame_saved_regs (frame)[IA64_RNAT_REGNUM] =
- SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_RNAT_REGNUM);
- get_frame_saved_regs (frame)[IA64_CCV_REGNUM] =
- SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_CCV_REGNUM);
- get_frame_saved_regs (frame)[IA64_UNAT_REGNUM] =
- SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_UNAT_REGNUM);
- get_frame_saved_regs (frame)[IA64_FPSR_REGNUM] =
- SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_FPSR_REGNUM);
- get_frame_saved_regs (frame)[IA64_PFS_REGNUM] =
- SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_PFS_REGNUM);
- get_frame_saved_regs (frame)[IA64_LC_REGNUM] =
- SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), IA64_LC_REGNUM);
- for (regno = IA64_GR1_REGNUM; regno <= IA64_GR31_REGNUM; regno++)
- if (regno != sp_regnum)
- get_frame_saved_regs (frame)[regno] =
- SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), regno);
- for (regno = IA64_BR0_REGNUM; regno <= IA64_BR7_REGNUM; regno++)
- get_frame_saved_regs (frame)[regno] =
- SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), regno);
- for (regno = IA64_FR2_REGNUM; regno <= IA64_BR7_REGNUM; regno++)
- get_frame_saved_regs (frame)[regno] =
- SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame), regno);
- }
- else
- {
- CORE_ADDR func_start;
+ cache->sof = (cfm & 0x7f);
+ cache->sol = (cfm >> 7) & 0x7f;
+ cache->sor = ((cfm >> 14) & 0xf) * 8;
- func_start = get_frame_func (frame);
- examine_prologue (func_start, get_frame_pc (frame), frame);
- }
+ cache->cfm = cfm;
+
+ cache->pc = get_frame_func (this_frame);
+
+ if (cache->pc != 0)
+ examine_prologue (cache->pc, get_frame_pc (this_frame), this_frame, cache);
+
+ cache->base = cache->saved_sp + cache->mem_stack_frame_size;
+
+ return cache;
}
static void
-ia64_get_saved_register (char *raw_buffer,
- int *optimized,
- CORE_ADDR *addrp,
- struct frame_info *frame,
- int regnum,
- enum lval_type *lval)
+ia64_frame_this_id (struct frame_info *this_frame, void **this_cache,
+ struct frame_id *this_id)
{
- int is_dummy_frame;
-
- if (!target_has_registers)
- error ("No registers.");
+ struct gdbarch *gdbarch = get_frame_arch (this_frame);
+ struct ia64_frame_cache *cache =
+ ia64_frame_cache (this_frame, this_cache);
+
+ /* If outermost frame, mark with null frame id. */
+ if (cache->base != 0)
+ (*this_id) = frame_id_build_special (cache->base, cache->pc, cache->bsp);
+ if (gdbarch_debug >= 1)
+ fprintf_unfiltered (gdb_stdlog,
+ "regular frame id: code %s, stack %s, "
+ "special %s, this_frame %s\n",
+ paddress (gdbarch, this_id->code_addr),
+ paddress (gdbarch, this_id->stack_addr),
+ paddress (gdbarch, cache->bsp),
+ host_address_to_string (this_frame));
+}
- if (optimized != NULL)
- *optimized = 0;
+static struct value *
+ia64_frame_prev_register (struct frame_info *this_frame, void **this_cache,
+ int regnum)
+{
+ struct gdbarch *gdbarch = get_frame_arch (this_frame);
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+ struct ia64_frame_cache *cache = ia64_frame_cache (this_frame, this_cache);
+ gdb_byte buf[8];
- if (addrp != NULL)
- *addrp = 0;
+ gdb_assert (regnum >= 0);
- if (lval != NULL)
- *lval = not_lval;
+ if (!target_has_registers)
+ error (_("No registers."));
- is_dummy_frame = DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
- get_frame_base (frame),
- get_frame_base (frame));
+ if (regnum == gdbarch_sp_regnum (gdbarch))
+ return frame_unwind_got_constant (this_frame, regnum, cache->base);
- if (regnum == SP_REGNUM && get_next_frame (frame))
+ else if (regnum == IA64_BSP_REGNUM)
{
- /* Handle SP values for all frames but the topmost. */
- store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum),
- get_frame_base (frame));
+ struct value *val;
+ CORE_ADDR prev_cfm, bsp, prev_bsp;
+
+ /* We want to calculate the previous bsp as the end of the previous
+ register stack frame. This corresponds to what the hardware bsp
+ register will be if we pop the frame back which is why we might
+ have been called. We know the beginning of the current frame is
+ cache->bsp - cache->sof. This value in the previous frame points
+ to the start of the output registers. We can calculate the end of
+ that frame by adding the size of output:
+ (sof (size of frame) - sol (size of locals)). */
+ val = ia64_frame_prev_register (this_frame, this_cache, IA64_CFM_REGNUM);
+ prev_cfm = extract_unsigned_integer (value_contents_all (val),
+ 8, byte_order);
+ bsp = rse_address_add (cache->bsp, -(cache->sof));
+ prev_bsp =
+ rse_address_add (bsp, (prev_cfm & 0x7f) - ((prev_cfm >> 7) & 0x7f));
+
+ return frame_unwind_got_constant (this_frame, regnum, prev_bsp);
}
- else if (regnum == IA64_BSP_REGNUM)
+
+ else if (regnum == IA64_CFM_REGNUM)
{
- store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum),
- get_frame_extra_info (frame)->bsp);
+ CORE_ADDR addr = cache->saved_regs[IA64_CFM_REGNUM];
+
+ if (addr != 0)
+ return frame_unwind_got_memory (this_frame, regnum, addr);
+
+ if (cache->prev_cfm)
+ return frame_unwind_got_constant (this_frame, regnum, cache->prev_cfm);
+
+ if (cache->frameless)
+ return frame_unwind_got_register (this_frame, IA64_PFS_REGNUM,
+ IA64_PFS_REGNUM);
+ return frame_unwind_got_register (this_frame, regnum, 0);
}
+
else if (regnum == IA64_VFP_REGNUM)
{
/* If the function in question uses an automatic register (r32-r127)
for the frame pointer, it'll be found by ia64_find_saved_register()
above. If the function lacks one of these frame pointers, we can
- still provide a value since we know the size of the frame */
- CORE_ADDR vfp = (get_frame_base (frame)
- + get_frame_extra_info (frame)->mem_stack_frame_size);
- store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (IA64_VFP_REGNUM), vfp);
- }
- else if (IA64_PR0_REGNUM <= regnum && regnum <= IA64_PR63_REGNUM)
- {
- char pr_raw_buffer[MAX_REGISTER_SIZE];
- int pr_optim;
- enum lval_type pr_lval;
- CORE_ADDR pr_addr;
- int prN_val;
- ia64_get_saved_register (pr_raw_buffer, &pr_optim, &pr_addr,
- frame, IA64_PR_REGNUM, &pr_lval);
- if (IA64_PR16_REGNUM <= regnum && regnum <= IA64_PR63_REGNUM)
+ still provide a value since we know the size of the frame. */
+ return frame_unwind_got_constant (this_frame, regnum, cache->base);
+ }
+
+ else if (VP0_REGNUM <= regnum && regnum <= VP63_REGNUM)
+ {
+ struct value *pr_val;
+ ULONGEST prN;
+
+ pr_val = ia64_frame_prev_register (this_frame, this_cache,
+ IA64_PR_REGNUM);
+ if (VP16_REGNUM <= regnum && regnum <= VP63_REGNUM)
{
/* Fetch predicate register rename base from current frame
- marker for this frame. */
- int rrb_pr = (get_frame_extra_info (frame)->cfm >> 32) & 0x3f;
+ marker for this frame. */
+ int rrb_pr = (cache->cfm >> 32) & 0x3f;
- /* Adjust the register number to account for register rotation. */
- regnum = IA64_PR16_REGNUM
- + ((regnum - IA64_PR16_REGNUM) + rrb_pr) % 48;
+ /* Adjust the register number to account for register rotation. */
+ regnum = VP16_REGNUM + ((regnum - VP16_REGNUM) + rrb_pr) % 48;
}
- prN_val = extract_bit_field ((unsigned char *) pr_raw_buffer,
- regnum - IA64_PR0_REGNUM, 1);
- store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum), prN_val);
+ prN = extract_bit_field (value_contents_all (pr_val),
+ regnum - VP0_REGNUM, 1);
+ return frame_unwind_got_constant (this_frame, regnum, prN);
}
+
else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT31_REGNUM)
{
- char unat_raw_buffer[MAX_REGISTER_SIZE];
- int unat_optim;
- enum lval_type unat_lval;
- CORE_ADDR unat_addr;
- int unatN_val;
- ia64_get_saved_register (unat_raw_buffer, &unat_optim, &unat_addr,
- frame, IA64_UNAT_REGNUM, &unat_lval);
- unatN_val = extract_bit_field ((unsigned char *) unat_raw_buffer,
- regnum - IA64_NAT0_REGNUM, 1);
- store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum),
- unatN_val);
+ struct value *unat_val;
+ ULONGEST unatN;
+ unat_val = ia64_frame_prev_register (this_frame, this_cache,
+ IA64_UNAT_REGNUM);
+ unatN = extract_bit_field (value_contents_all (unat_val),
+ regnum - IA64_NAT0_REGNUM, 1);
+ return frame_unwind_got_constant (this_frame, regnum, unatN);
}
+
else if (IA64_NAT32_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM)
{
int natval = 0;
/* Find address of general register corresponding to nat bit we're
- interested in. */
- CORE_ADDR gr_addr = 0;
+ interested in. */
+ CORE_ADDR gr_addr;
- if (!is_dummy_frame)
- {
- DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
- gr_addr = get_frame_saved_regs (frame)[ regnum - IA64_NAT0_REGNUM
- + IA64_GR0_REGNUM];
- }
- if (gr_addr)
+ gr_addr = cache->saved_regs[regnum - IA64_NAT0_REGNUM + IA64_GR0_REGNUM];
+
+ if (gr_addr != 0)
{
- /* Compute address of nat collection bits */
+ /* Compute address of nat collection bits. */
CORE_ADDR nat_addr = gr_addr | 0x1f8;
- CORE_ADDR bsp = read_register (IA64_BSP_REGNUM);
+ CORE_ADDR bsp;
CORE_ADDR nat_collection;
int nat_bit;
+
/* If our nat collection address is bigger than bsp, we have to get
the nat collection from rnat. Otherwise, we fetch the nat
- collection from the computed address. */
+ collection from the computed address. */
+ get_frame_register (this_frame, IA64_BSP_REGNUM, buf);
+ bsp = extract_unsigned_integer (buf, 8, byte_order);
if (nat_addr >= bsp)
- nat_collection = read_register (IA64_RNAT_REGNUM);
+ {
+ get_frame_register (this_frame, IA64_RNAT_REGNUM, buf);
+ nat_collection = extract_unsigned_integer (buf, 8, byte_order);
+ }
else
- nat_collection = read_memory_integer (nat_addr, 8);
+ nat_collection = read_memory_integer (nat_addr, 8, byte_order);
nat_bit = (gr_addr >> 3) & 0x3f;
natval = (nat_collection >> nat_bit) & 1;
}
- store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (regnum), natval);
+
+ return frame_unwind_got_constant (this_frame, regnum, natval);
}
+
else if (regnum == IA64_IP_REGNUM)
{
- CORE_ADDR pc;
- if (get_next_frame (frame))
+ CORE_ADDR pc = 0;
+ CORE_ADDR addr = cache->saved_regs[IA64_VRAP_REGNUM];
+
+ if (addr != 0)
{
- /* FIXME: Set *addrp, *lval when possible. */
- pc = ia64_frame_saved_pc (get_next_frame (frame));
+ read_memory (addr, buf, register_size (gdbarch, IA64_IP_REGNUM));
+ pc = extract_unsigned_integer (buf, 8, byte_order);
}
- else
+ else if (cache->frameless)
+ {
+ get_frame_register (this_frame, IA64_BR0_REGNUM, buf);
+ pc = extract_unsigned_integer (buf, 8, byte_order);
+ }
+ pc &= ~0xf;
+ return frame_unwind_got_constant (this_frame, regnum, pc);
+ }
+
+ else if (regnum == IA64_PSR_REGNUM)
+ {
+ /* We don't know how to get the complete previous PSR, but we need it
+ for the slot information when we unwind the pc (pc is formed of IP
+ register plus slot information from PSR). To get the previous
+ slot information, we mask it off the return address. */
+ ULONGEST slot_num = 0;
+ CORE_ADDR pc = 0;
+ CORE_ADDR psr = 0;
+ CORE_ADDR addr = cache->saved_regs[IA64_VRAP_REGNUM];
+
+ get_frame_register (this_frame, IA64_PSR_REGNUM, buf);
+ psr = extract_unsigned_integer (buf, 8, byte_order);
+
+ if (addr != 0)
+ {
+ read_memory (addr, buf, register_size (gdbarch, IA64_IP_REGNUM));
+ pc = extract_unsigned_integer (buf, 8, byte_order);
+ }
+ else if (cache->frameless)
+ {
+ get_frame_register (this_frame, IA64_BR0_REGNUM, buf);
+ pc = extract_unsigned_integer (buf, 8, byte_order);
+ }
+ psr &= ~(3LL << 41);
+ slot_num = pc & 0x3LL;
+ psr |= (CORE_ADDR)slot_num << 41;
+ return frame_unwind_got_constant (this_frame, regnum, psr);
+ }
+
+ else if (regnum == IA64_BR0_REGNUM)
+ {
+ CORE_ADDR addr = cache->saved_regs[IA64_BR0_REGNUM];
+
+ if (addr != 0)
+ return frame_unwind_got_memory (this_frame, regnum, addr);
+
+ return frame_unwind_got_constant (this_frame, regnum, 0);
+ }
+
+ else if ((regnum >= IA64_GR32_REGNUM && regnum <= IA64_GR127_REGNUM)
+ || (regnum >= V32_REGNUM && regnum <= V127_REGNUM))
+ {
+ CORE_ADDR addr = 0;
+
+ if (regnum >= V32_REGNUM)
+ regnum = IA64_GR32_REGNUM + (regnum - V32_REGNUM);
+ addr = cache->saved_regs[regnum];
+ if (addr != 0)
+ return frame_unwind_got_memory (this_frame, regnum, addr);
+
+ if (cache->frameless)
{
- pc = read_pc ();
+ struct value *reg_val;
+ CORE_ADDR prev_cfm, prev_bsp, prev_bof;
+
+ /* FIXME: brobecker/2008-05-01: Doesn't this seem redundant
+ with the same code above? */
+ if (regnum >= V32_REGNUM)
+ regnum = IA64_GR32_REGNUM + (regnum - V32_REGNUM);
+ reg_val = ia64_frame_prev_register (this_frame, this_cache,
+ IA64_CFM_REGNUM);
+ prev_cfm = extract_unsigned_integer (value_contents_all (reg_val),
+ 8, byte_order);
+ reg_val = ia64_frame_prev_register (this_frame, this_cache,
+ IA64_BSP_REGNUM);
+ prev_bsp = extract_unsigned_integer (value_contents_all (reg_val),
+ 8, byte_order);
+ prev_bof = rse_address_add (prev_bsp, -(prev_cfm & 0x7f));
+
+ addr = rse_address_add (prev_bof, (regnum - IA64_GR32_REGNUM));
+ return frame_unwind_got_memory (this_frame, regnum, addr);
+ }
+
+ return frame_unwind_got_constant (this_frame, regnum, 0);
+ }
+
+ else /* All other registers. */
+ {
+ CORE_ADDR addr = 0;
+
+ if (IA64_FR32_REGNUM <= regnum && regnum <= IA64_FR127_REGNUM)
+ {
+ /* Fetch floating point register rename base from current
+ frame marker for this frame. */
+ int rrb_fr = (cache->cfm >> 25) & 0x7f;
+
+ /* Adjust the floating point register number to account for
+ register rotation. */
+ regnum = IA64_FR32_REGNUM
+ + ((regnum - IA64_FR32_REGNUM) + rrb_fr) % 96;
}
- store_unsigned_integer (raw_buffer, REGISTER_RAW_SIZE (IA64_IP_REGNUM), pc);
+
+ /* If we have stored a memory address, access the register. */
+ addr = cache->saved_regs[regnum];
+ if (addr != 0)
+ return frame_unwind_got_memory (this_frame, regnum, addr);
+ /* Otherwise, punt and get the current value of the register. */
+ else
+ return frame_unwind_got_register (this_frame, regnum, regnum);
}
- else if (IA64_GR32_REGNUM <= regnum && regnum <= IA64_GR127_REGNUM)
+}
+
+static const struct frame_unwind ia64_frame_unwind =
+{
+ NORMAL_FRAME,
+ default_frame_unwind_stop_reason,
+ &ia64_frame_this_id,
+ &ia64_frame_prev_register,
+ NULL,
+ default_frame_sniffer
+};
+
+/* Signal trampolines. */
+
+static void
+ia64_sigtramp_frame_init_saved_regs (struct frame_info *this_frame,
+ struct ia64_frame_cache *cache)
+{
+ struct gdbarch *gdbarch = get_frame_arch (this_frame);
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
+ if (tdep->sigcontext_register_address)
+ {
+ int regno;
+
+ cache->saved_regs[IA64_VRAP_REGNUM]
+ = tdep->sigcontext_register_address (gdbarch, cache->base,
+ IA64_IP_REGNUM);
+ cache->saved_regs[IA64_CFM_REGNUM]
+ = tdep->sigcontext_register_address (gdbarch, cache->base,
+ IA64_CFM_REGNUM);
+ cache->saved_regs[IA64_PSR_REGNUM]
+ = tdep->sigcontext_register_address (gdbarch, cache->base,
+ IA64_PSR_REGNUM);
+ cache->saved_regs[IA64_BSP_REGNUM]
+ = tdep->sigcontext_register_address (gdbarch, cache->base,
+ IA64_BSP_REGNUM);
+ cache->saved_regs[IA64_RNAT_REGNUM]
+ = tdep->sigcontext_register_address (gdbarch, cache->base,
+ IA64_RNAT_REGNUM);
+ cache->saved_regs[IA64_CCV_REGNUM]
+ = tdep->sigcontext_register_address (gdbarch, cache->base,
+ IA64_CCV_REGNUM);
+ cache->saved_regs[IA64_UNAT_REGNUM]
+ = tdep->sigcontext_register_address (gdbarch, cache->base,
+ IA64_UNAT_REGNUM);
+ cache->saved_regs[IA64_FPSR_REGNUM]
+ = tdep->sigcontext_register_address (gdbarch, cache->base,
+ IA64_FPSR_REGNUM);
+ cache->saved_regs[IA64_PFS_REGNUM]
+ = tdep->sigcontext_register_address (gdbarch, cache->base,
+ IA64_PFS_REGNUM);
+ cache->saved_regs[IA64_LC_REGNUM]
+ = tdep->sigcontext_register_address (gdbarch, cache->base,
+ IA64_LC_REGNUM);
+
+ for (regno = IA64_GR1_REGNUM; regno <= IA64_GR31_REGNUM; regno++)
+ cache->saved_regs[regno] =
+ tdep->sigcontext_register_address (gdbarch, cache->base, regno);
+ for (regno = IA64_BR0_REGNUM; regno <= IA64_BR7_REGNUM; regno++)
+ cache->saved_regs[regno] =
+ tdep->sigcontext_register_address (gdbarch, cache->base, regno);
+ for (regno = IA64_FR2_REGNUM; regno <= IA64_FR31_REGNUM; regno++)
+ cache->saved_regs[regno] =
+ tdep->sigcontext_register_address (gdbarch, cache->base, regno);
+ }
+}
+
+static struct ia64_frame_cache *
+ia64_sigtramp_frame_cache (struct frame_info *this_frame, void **this_cache)
+{
+ struct gdbarch *gdbarch = get_frame_arch (this_frame);
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+ struct ia64_frame_cache *cache;
+ gdb_byte buf[8];
+
+ if (*this_cache)
+ return (struct ia64_frame_cache *) *this_cache;
+
+ cache = ia64_alloc_frame_cache ();
+
+ get_frame_register (this_frame, sp_regnum, buf);
+ /* Note that frame size is hard-coded below. We cannot calculate it
+ via prologue examination. */
+ cache->base = extract_unsigned_integer (buf, 8, byte_order) + 16;
+
+ get_frame_register (this_frame, IA64_BSP_REGNUM, buf);
+ cache->bsp = extract_unsigned_integer (buf, 8, byte_order);
+
+ get_frame_register (this_frame, IA64_CFM_REGNUM, buf);
+ cache->cfm = extract_unsigned_integer (buf, 8, byte_order);
+ cache->sof = cache->cfm & 0x7f;
+
+ ia64_sigtramp_frame_init_saved_regs (this_frame, cache);
+
+ *this_cache = cache;
+ return cache;
+}
+
+static void
+ia64_sigtramp_frame_this_id (struct frame_info *this_frame,
+ void **this_cache, struct frame_id *this_id)
+{
+ struct gdbarch *gdbarch = get_frame_arch (this_frame);
+ struct ia64_frame_cache *cache =
+ ia64_sigtramp_frame_cache (this_frame, this_cache);
+
+ (*this_id) = frame_id_build_special (cache->base,
+ get_frame_pc (this_frame),
+ cache->bsp);
+ if (gdbarch_debug >= 1)
+ fprintf_unfiltered (gdb_stdlog,
+ "sigtramp frame id: code %s, stack %s, "
+ "special %s, this_frame %s\n",
+ paddress (gdbarch, this_id->code_addr),
+ paddress (gdbarch, this_id->stack_addr),
+ paddress (gdbarch, cache->bsp),
+ host_address_to_string (this_frame));
+}
+
+static struct value *
+ia64_sigtramp_frame_prev_register (struct frame_info *this_frame,
+ void **this_cache, int regnum)
+{
+ struct ia64_frame_cache *cache =
+ ia64_sigtramp_frame_cache (this_frame, this_cache);
+
+ gdb_assert (regnum >= 0);
+
+ if (!target_has_registers)
+ error (_("No registers."));
+
+ if (regnum == IA64_IP_REGNUM)
+ {
+ CORE_ADDR pc = 0;
+ CORE_ADDR addr = cache->saved_regs[IA64_VRAP_REGNUM];
+
+ if (addr != 0)
+ {
+ struct gdbarch *gdbarch = get_frame_arch (this_frame);
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+ pc = read_memory_unsigned_integer (addr, 8, byte_order);
+ }
+ pc &= ~0xf;
+ return frame_unwind_got_constant (this_frame, regnum, pc);
+ }
+
+ else if ((regnum >= IA64_GR32_REGNUM && regnum <= IA64_GR127_REGNUM)
+ || (regnum >= V32_REGNUM && regnum <= V127_REGNUM))
{
CORE_ADDR addr = 0;
- if (!is_dummy_frame)
+
+ if (regnum >= V32_REGNUM)
+ regnum = IA64_GR32_REGNUM + (regnum - V32_REGNUM);
+ addr = cache->saved_regs[regnum];
+ if (addr != 0)
+ return frame_unwind_got_memory (this_frame, regnum, addr);
+
+ return frame_unwind_got_constant (this_frame, regnum, 0);
+ }
+
+ else /* All other registers not listed above. */
+ {
+ CORE_ADDR addr = cache->saved_regs[regnum];
+
+ if (addr != 0)
+ return frame_unwind_got_memory (this_frame, regnum, addr);
+
+ return frame_unwind_got_constant (this_frame, regnum, 0);
+ }
+}
+
+static int
+ia64_sigtramp_frame_sniffer (const struct frame_unwind *self,
+ struct frame_info *this_frame,
+ void **this_cache)
+{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (this_frame));
+ if (tdep->pc_in_sigtramp)
+ {
+ CORE_ADDR pc = get_frame_pc (this_frame);
+
+ if (tdep->pc_in_sigtramp (pc))
+ return 1;
+ }
+
+ return 0;
+}
+
+static const struct frame_unwind ia64_sigtramp_frame_unwind =
+{
+ SIGTRAMP_FRAME,
+ default_frame_unwind_stop_reason,
+ ia64_sigtramp_frame_this_id,
+ ia64_sigtramp_frame_prev_register,
+ NULL,
+ ia64_sigtramp_frame_sniffer
+};
+
+\f
+
+static CORE_ADDR
+ia64_frame_base_address (struct frame_info *this_frame, void **this_cache)
+{
+ struct ia64_frame_cache *cache = ia64_frame_cache (this_frame, this_cache);
+
+ return cache->base;
+}
+
+static const struct frame_base ia64_frame_base =
+{
+ &ia64_frame_unwind,
+ ia64_frame_base_address,
+ ia64_frame_base_address,
+ ia64_frame_base_address
+};
+
+#ifdef HAVE_LIBUNWIND_IA64_H
+
+struct ia64_unwind_table_entry
+ {
+ unw_word_t start_offset;
+ unw_word_t end_offset;
+ unw_word_t info_offset;
+ };
+
+static __inline__ uint64_t
+ia64_rse_slot_num (uint64_t addr)
+{
+ return (addr >> 3) & 0x3f;
+}
+
+/* Skip over a designated number of registers in the backing
+ store, remembering every 64th position is for NAT. */
+static __inline__ uint64_t
+ia64_rse_skip_regs (uint64_t addr, long num_regs)
+{
+ long delta = ia64_rse_slot_num(addr) + num_regs;
+
+ if (num_regs < 0)
+ delta -= 0x3e;
+ return addr + ((num_regs + delta/0x3f) << 3);
+}
+
+/* Gdb ia64-libunwind-tdep callback function to convert from an ia64 gdb
+ register number to a libunwind register number. */
+static int
+ia64_gdb2uw_regnum (int regnum)
+{
+ if (regnum == sp_regnum)
+ return UNW_IA64_SP;
+ else if (regnum == IA64_BSP_REGNUM)
+ return UNW_IA64_BSP;
+ else if ((unsigned) (regnum - IA64_GR0_REGNUM) < 128)
+ return UNW_IA64_GR + (regnum - IA64_GR0_REGNUM);
+ else if ((unsigned) (regnum - V32_REGNUM) < 95)
+ return UNW_IA64_GR + 32 + (regnum - V32_REGNUM);
+ else if ((unsigned) (regnum - IA64_FR0_REGNUM) < 128)
+ return UNW_IA64_FR + (regnum - IA64_FR0_REGNUM);
+ else if ((unsigned) (regnum - IA64_PR0_REGNUM) < 64)
+ return -1;
+ else if ((unsigned) (regnum - IA64_BR0_REGNUM) < 8)
+ return UNW_IA64_BR + (regnum - IA64_BR0_REGNUM);
+ else if (regnum == IA64_PR_REGNUM)
+ return UNW_IA64_PR;
+ else if (regnum == IA64_IP_REGNUM)
+ return UNW_REG_IP;
+ else if (regnum == IA64_CFM_REGNUM)
+ return UNW_IA64_CFM;
+ else if ((unsigned) (regnum - IA64_AR0_REGNUM) < 128)
+ return UNW_IA64_AR + (regnum - IA64_AR0_REGNUM);
+ else if ((unsigned) (regnum - IA64_NAT0_REGNUM) < 128)
+ return UNW_IA64_NAT + (regnum - IA64_NAT0_REGNUM);
+ else
+ return -1;
+}
+
+/* Gdb ia64-libunwind-tdep callback function to convert from a libunwind
+ register number to a ia64 gdb register number. */
+static int
+ia64_uw2gdb_regnum (int uw_regnum)
+{
+ if (uw_regnum == UNW_IA64_SP)
+ return sp_regnum;
+ else if (uw_regnum == UNW_IA64_BSP)
+ return IA64_BSP_REGNUM;
+ else if ((unsigned) (uw_regnum - UNW_IA64_GR) < 32)
+ return IA64_GR0_REGNUM + (uw_regnum - UNW_IA64_GR);
+ else if ((unsigned) (uw_regnum - UNW_IA64_GR) < 128)
+ return V32_REGNUM + (uw_regnum - (IA64_GR0_REGNUM + 32));
+ else if ((unsigned) (uw_regnum - UNW_IA64_FR) < 128)
+ return IA64_FR0_REGNUM + (uw_regnum - UNW_IA64_FR);
+ else if ((unsigned) (uw_regnum - UNW_IA64_BR) < 8)
+ return IA64_BR0_REGNUM + (uw_regnum - UNW_IA64_BR);
+ else if (uw_regnum == UNW_IA64_PR)
+ return IA64_PR_REGNUM;
+ else if (uw_regnum == UNW_REG_IP)
+ return IA64_IP_REGNUM;
+ else if (uw_regnum == UNW_IA64_CFM)
+ return IA64_CFM_REGNUM;
+ else if ((unsigned) (uw_regnum - UNW_IA64_AR) < 128)
+ return IA64_AR0_REGNUM + (uw_regnum - UNW_IA64_AR);
+ else if ((unsigned) (uw_regnum - UNW_IA64_NAT) < 128)
+ return IA64_NAT0_REGNUM + (uw_regnum - UNW_IA64_NAT);
+ else
+ return -1;
+}
+
+/* Gdb ia64-libunwind-tdep callback function to reveal if register is
+ a float register or not. */
+static int
+ia64_is_fpreg (int uw_regnum)
+{
+ return unw_is_fpreg (uw_regnum);
+}
+
+/* Libunwind callback accessor function for general registers. */
+static int
+ia64_access_reg (unw_addr_space_t as, unw_regnum_t uw_regnum, unw_word_t *val,
+ int write, void *arg)
+{
+ int regnum = ia64_uw2gdb_regnum (uw_regnum);
+ unw_word_t bsp, sof, cfm, psr, ip;
+ struct frame_info *this_frame = (struct frame_info *) arg;
+ struct gdbarch *gdbarch = get_frame_arch (this_frame);
+
+ /* We never call any libunwind routines that need to write registers. */
+ gdb_assert (!write);
+
+ switch (uw_regnum)
+ {
+ case UNW_REG_IP:
+ /* Libunwind expects to see the pc value which means the slot number
+ from the psr must be merged with the ip word address. */
+ ip = get_frame_register_unsigned (this_frame, IA64_IP_REGNUM);
+ psr = get_frame_register_unsigned (this_frame, IA64_PSR_REGNUM);
+ *val = ip | ((psr >> 41) & 0x3);
+ break;
+
+ case UNW_IA64_AR_BSP:
+ /* Libunwind expects to see the beginning of the current
+ register frame so we must account for the fact that
+ ptrace() will return a value for bsp that points *after*
+ the current register frame. */
+ bsp = get_frame_register_unsigned (this_frame, IA64_BSP_REGNUM);
+ cfm = get_frame_register_unsigned (this_frame, IA64_CFM_REGNUM);
+ sof = gdbarch_tdep (gdbarch)->size_of_register_frame (this_frame, cfm);
+ *val = ia64_rse_skip_regs (bsp, -sof);
+ break;
+
+ case UNW_IA64_AR_BSPSTORE:
+ /* Libunwind wants bspstore to be after the current register frame.
+ This is what ptrace() and gdb treats as the regular bsp value. */
+ *val = get_frame_register_unsigned (this_frame, IA64_BSP_REGNUM);
+ break;
+
+ default:
+ /* For all other registers, just unwind the value directly. */
+ *val = get_frame_register_unsigned (this_frame, regnum);
+ break;
+ }
+
+ if (gdbarch_debug >= 1)
+ fprintf_unfiltered (gdb_stdlog,
+ " access_reg: from cache: %4s=%s\n",
+ (((unsigned) regnum <= IA64_NAT127_REGNUM)
+ ? ia64_register_names[regnum] : "r??"),
+ paddress (gdbarch, *val));
+ return 0;
+}
+
+/* Libunwind callback accessor function for floating-point registers. */
+static int
+ia64_access_fpreg (unw_addr_space_t as, unw_regnum_t uw_regnum,
+ unw_fpreg_t *val, int write, void *arg)
+{
+ int regnum = ia64_uw2gdb_regnum (uw_regnum);
+ struct frame_info *this_frame = (struct frame_info *) arg;
+
+ /* We never call any libunwind routines that need to write registers. */
+ gdb_assert (!write);
+
+ get_frame_register (this_frame, regnum, (gdb_byte *) val);
+
+ return 0;
+}
+
+/* Libunwind callback accessor function for top-level rse registers. */
+static int
+ia64_access_rse_reg (unw_addr_space_t as, unw_regnum_t uw_regnum,
+ unw_word_t *val, int write, void *arg)
+{
+ int regnum = ia64_uw2gdb_regnum (uw_regnum);
+ unw_word_t bsp, sof, cfm, psr, ip;
+ struct regcache *regcache = (struct regcache *) arg;
+ struct gdbarch *gdbarch = regcache->arch ();
+
+ /* We never call any libunwind routines that need to write registers. */
+ gdb_assert (!write);
+
+ switch (uw_regnum)
+ {
+ case UNW_REG_IP:
+ /* Libunwind expects to see the pc value which means the slot number
+ from the psr must be merged with the ip word address. */
+ regcache_cooked_read_unsigned (regcache, IA64_IP_REGNUM, &ip);
+ regcache_cooked_read_unsigned (regcache, IA64_PSR_REGNUM, &psr);
+ *val = ip | ((psr >> 41) & 0x3);
+ break;
+
+ case UNW_IA64_AR_BSP:
+ /* Libunwind expects to see the beginning of the current
+ register frame so we must account for the fact that
+ ptrace() will return a value for bsp that points *after*
+ the current register frame. */
+ regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp);
+ regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm);
+ sof = (cfm & 0x7f);
+ *val = ia64_rse_skip_regs (bsp, -sof);
+ break;
+
+ case UNW_IA64_AR_BSPSTORE:
+ /* Libunwind wants bspstore to be after the current register frame.
+ This is what ptrace() and gdb treats as the regular bsp value. */
+ regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, val);
+ break;
+
+ default:
+ /* For all other registers, just unwind the value directly. */
+ regcache_cooked_read_unsigned (regcache, regnum, val);
+ break;
+ }
+
+ if (gdbarch_debug >= 1)
+ fprintf_unfiltered (gdb_stdlog,
+ " access_rse_reg: from cache: %4s=%s\n",
+ (((unsigned) regnum <= IA64_NAT127_REGNUM)
+ ? ia64_register_names[regnum] : "r??"),
+ paddress (gdbarch, *val));
+
+ return 0;
+}
+
+/* Libunwind callback accessor function for top-level fp registers. */
+static int
+ia64_access_rse_fpreg (unw_addr_space_t as, unw_regnum_t uw_regnum,
+ unw_fpreg_t *val, int write, void *arg)
+{
+ int regnum = ia64_uw2gdb_regnum (uw_regnum);
+ struct regcache *regcache = (struct regcache *) arg;
+
+ /* We never call any libunwind routines that need to write registers. */
+ gdb_assert (!write);
+
+ regcache->cooked_read (regnum, (gdb_byte *) val);
+
+ return 0;
+}
+
+/* Libunwind callback accessor function for accessing memory. */
+static int
+ia64_access_mem (unw_addr_space_t as,
+ unw_word_t addr, unw_word_t *val,
+ int write, void *arg)
+{
+ if (addr - KERNEL_START < ktab_size)
+ {
+ unw_word_t *laddr = (unw_word_t*) ((char *) ktab
+ + (addr - KERNEL_START));
+
+ if (write)
+ *laddr = *val;
+ else
+ *val = *laddr;
+ return 0;
+ }
+
+ /* XXX do we need to normalize byte-order here? */
+ if (write)
+ return target_write_memory (addr, (gdb_byte *) val, sizeof (unw_word_t));
+ else
+ return target_read_memory (addr, (gdb_byte *) val, sizeof (unw_word_t));
+}
+
+/* Call low-level function to access the kernel unwind table. */
+static gdb::optional<gdb::byte_vector>
+getunwind_table ()
+{
+ /* FIXME drow/2005-09-10: This code used to call
+ ia64_linux_xfer_unwind_table directly to fetch the unwind table
+ for the currently running ia64-linux kernel. That data should
+ come from the core file and be accessed via the auxv vector; if
+ we want to preserve fall back to the running kernel's table, then
+ we should find a way to override the corefile layer's
+ xfer_partial method. */
+
+ return target_read_alloc (current_top_target (), TARGET_OBJECT_UNWIND_TABLE,
+ NULL);
+}
+
+/* Get the kernel unwind table. */
+static int
+get_kernel_table (unw_word_t ip, unw_dyn_info_t *di)
+{
+ static struct ia64_table_entry *etab;
+
+ if (!ktab)
+ {
+ ktab_buf = getunwind_table ();
+ if (!ktab_buf)
+ return -UNW_ENOINFO;
+
+ ktab = (struct ia64_table_entry *) ktab_buf->data ();
+ ktab_size = ktab_buf->size ();
+
+ for (etab = ktab; etab->start_offset; ++etab)
+ etab->info_offset += KERNEL_START;
+ }
+
+ if (ip < ktab[0].start_offset || ip >= etab[-1].end_offset)
+ return -UNW_ENOINFO;
+
+ di->format = UNW_INFO_FORMAT_TABLE;
+ di->gp = 0;
+ di->start_ip = ktab[0].start_offset;
+ di->end_ip = etab[-1].end_offset;
+ di->u.ti.name_ptr = (unw_word_t) "<kernel>";
+ di->u.ti.segbase = 0;
+ di->u.ti.table_len = ((char *) etab - (char *) ktab) / sizeof (unw_word_t);
+ di->u.ti.table_data = (unw_word_t *) ktab;
+
+ if (gdbarch_debug >= 1)
+ fprintf_unfiltered (gdb_stdlog, "get_kernel_table: found table `%s': "
+ "segbase=%s, length=%s, gp=%s\n",
+ (char *) di->u.ti.name_ptr,
+ hex_string (di->u.ti.segbase),
+ pulongest (di->u.ti.table_len),
+ hex_string (di->gp));
+ return 0;
+}
+
+/* Find the unwind table entry for a specified address. */
+static int
+ia64_find_unwind_table (struct objfile *objfile, unw_word_t ip,
+ unw_dyn_info_t *dip, void **buf)
+{
+ Elf_Internal_Phdr *phdr, *p_text = NULL, *p_unwind = NULL;
+ Elf_Internal_Ehdr *ehdr;
+ unw_word_t segbase = 0;
+ CORE_ADDR load_base;
+ bfd *bfd;
+ int i;
+
+ bfd = objfile->obfd;
+
+ ehdr = elf_tdata (bfd)->elf_header;
+ phdr = elf_tdata (bfd)->phdr;
+
+ load_base = objfile->text_section_offset ();
+
+ for (i = 0; i < ehdr->e_phnum; ++i)
+ {
+ switch (phdr[i].p_type)
{
- DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
- addr = get_frame_saved_regs (frame)[regnum];
+ case PT_LOAD:
+ if ((unw_word_t) (ip - load_base - phdr[i].p_vaddr)
+ < phdr[i].p_memsz)
+ p_text = phdr + i;
+ break;
+
+ case PT_IA_64_UNWIND:
+ p_unwind = phdr + i;
+ break;
+
+ default:
+ break;
}
+ }
+
+ if (!p_text || !p_unwind)
+ return -UNW_ENOINFO;
+
+ /* Verify that the segment that contains the IP also contains
+ the static unwind table. If not, we may be in the Linux kernel's
+ DSO gate page in which case the unwind table is another segment.
+ Otherwise, we are dealing with runtime-generated code, for which we
+ have no info here. */
+ segbase = p_text->p_vaddr + load_base;
+
+ if ((p_unwind->p_vaddr - p_text->p_vaddr) >= p_text->p_memsz)
+ {
+ int ok = 0;
+ for (i = 0; i < ehdr->e_phnum; ++i)
+ {
+ if (phdr[i].p_type == PT_LOAD
+ && (p_unwind->p_vaddr - phdr[i].p_vaddr) < phdr[i].p_memsz)
+ {
+ ok = 1;
+ /* Get the segbase from the section containing the
+ libunwind table. */
+ segbase = phdr[i].p_vaddr + load_base;
+ }
+ }
+ if (!ok)
+ return -UNW_ENOINFO;
+ }
+
+ dip->start_ip = p_text->p_vaddr + load_base;
+ dip->end_ip = dip->start_ip + p_text->p_memsz;
+ dip->gp = ia64_find_global_pointer (objfile->arch (), ip);
+ dip->format = UNW_INFO_FORMAT_REMOTE_TABLE;
+ dip->u.rti.name_ptr = (unw_word_t) bfd_get_filename (bfd);
+ dip->u.rti.segbase = segbase;
+ dip->u.rti.table_len = p_unwind->p_memsz / sizeof (unw_word_t);
+ dip->u.rti.table_data = p_unwind->p_vaddr + load_base;
+
+ return 0;
+}
+
+/* Libunwind callback accessor function to acquire procedure unwind-info. */
+static int
+ia64_find_proc_info_x (unw_addr_space_t as, unw_word_t ip, unw_proc_info_t *pi,
+ int need_unwind_info, void *arg)
+{
+ struct obj_section *sec = find_pc_section (ip);
+ unw_dyn_info_t di;
+ int ret;
+ void *buf = NULL;
+
+ if (!sec)
+ {
+ /* XXX This only works if the host and the target architecture are
+ both ia64 and if the have (more or less) the same kernel
+ version. */
+ if (get_kernel_table (ip, &di) < 0)
+ return -UNW_ENOINFO;
+
+ if (gdbarch_debug >= 1)
+ fprintf_unfiltered (gdb_stdlog, "ia64_find_proc_info_x: %s -> "
+ "(name=`%s',segbase=%s,start=%s,end=%s,gp=%s,"
+ "length=%s,data=%s)\n",
+ hex_string (ip), (char *)di.u.ti.name_ptr,
+ hex_string (di.u.ti.segbase),
+ hex_string (di.start_ip), hex_string (di.end_ip),
+ hex_string (di.gp),
+ pulongest (di.u.ti.table_len),
+ hex_string ((CORE_ADDR)di.u.ti.table_data));
+ }
+ else
+ {
+ ret = ia64_find_unwind_table (sec->objfile, ip, &di, &buf);
+ if (ret < 0)
+ return ret;
+
+ if (gdbarch_debug >= 1)
+ fprintf_unfiltered (gdb_stdlog, "ia64_find_proc_info_x: %s -> "
+ "(name=`%s',segbase=%s,start=%s,end=%s,gp=%s,"
+ "length=%s,data=%s)\n",
+ hex_string (ip), (char *)di.u.rti.name_ptr,
+ hex_string (di.u.rti.segbase),
+ hex_string (di.start_ip), hex_string (di.end_ip),
+ hex_string (di.gp),
+ pulongest (di.u.rti.table_len),
+ hex_string (di.u.rti.table_data));
+ }
+
+ ret = libunwind_search_unwind_table (&as, ip, &di, pi, need_unwind_info,
+ arg);
+
+ /* We no longer need the dyn info storage so free it. */
+ xfree (buf);
+
+ return ret;
+}
+
+/* Libunwind callback accessor function for cleanup. */
+static void
+ia64_put_unwind_info (unw_addr_space_t as,
+ unw_proc_info_t *pip, void *arg)
+{
+ /* Nothing required for now. */
+}
+
+/* Libunwind callback accessor function to get head of the dynamic
+ unwind-info registration list. */
+static int
+ia64_get_dyn_info_list (unw_addr_space_t as,
+ unw_word_t *dilap, void *arg)
+{
+ struct obj_section *text_sec;
+ unw_word_t ip, addr;
+ unw_dyn_info_t di;
+ int ret;
+
+ if (!libunwind_is_initialized ())
+ return -UNW_ENOINFO;
+
+ for (objfile *objfile : current_program_space->objfiles ())
+ {
+ void *buf = NULL;
+
+ text_sec = objfile->sections + SECT_OFF_TEXT (objfile);
+ ip = obj_section_addr (text_sec);
+ ret = ia64_find_unwind_table (objfile, ip, &di, &buf);
+ if (ret >= 0)
+ {
+ addr = libunwind_find_dyn_list (as, &di, arg);
+ /* We no longer need the dyn info storage so free it. */
+ xfree (buf);
+
+ if (addr)
+ {
+ if (gdbarch_debug >= 1)
+ fprintf_unfiltered (gdb_stdlog,
+ "dynamic unwind table in objfile %s "
+ "at %s (gp=%s)\n",
+ bfd_get_filename (objfile->obfd),
+ hex_string (addr), hex_string (di.gp));
+ *dilap = addr;
+ return 0;
+ }
+ }
+ }
+ return -UNW_ENOINFO;
+}
+
+
+/* Frame interface functions for libunwind. */
+
+static void
+ia64_libunwind_frame_this_id (struct frame_info *this_frame, void **this_cache,
+ struct frame_id *this_id)
+{
+ struct gdbarch *gdbarch = get_frame_arch (this_frame);
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+ struct frame_id id = outer_frame_id;
+ gdb_byte buf[8];
+ CORE_ADDR bsp;
+
+ libunwind_frame_this_id (this_frame, this_cache, &id);
+ if (frame_id_eq (id, outer_frame_id))
+ {
+ (*this_id) = outer_frame_id;
+ return;
+ }
+
+ /* We must add the bsp as the special address for frame comparison
+ purposes. */
+ get_frame_register (this_frame, IA64_BSP_REGNUM, buf);
+ bsp = extract_unsigned_integer (buf, 8, byte_order);
+
+ (*this_id) = frame_id_build_special (id.stack_addr, id.code_addr, bsp);
+
+ if (gdbarch_debug >= 1)
+ fprintf_unfiltered (gdb_stdlog,
+ "libunwind frame id: code %s, stack %s, "
+ "special %s, this_frame %s\n",
+ paddress (gdbarch, id.code_addr),
+ paddress (gdbarch, id.stack_addr),
+ paddress (gdbarch, bsp),
+ host_address_to_string (this_frame));
+}
+
+static struct value *
+ia64_libunwind_frame_prev_register (struct frame_info *this_frame,
+ void **this_cache, int regnum)
+{
+ int reg = regnum;
+ struct gdbarch *gdbarch = get_frame_arch (this_frame);
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+ struct value *val;
+
+ if (VP0_REGNUM <= regnum && regnum <= VP63_REGNUM)
+ reg = IA64_PR_REGNUM;
+ else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM)
+ reg = IA64_UNAT_REGNUM;
+
+ /* Let libunwind do most of the work. */
+ val = libunwind_frame_prev_register (this_frame, this_cache, reg);
+
+ if (VP0_REGNUM <= regnum && regnum <= VP63_REGNUM)
+ {
+ ULONGEST prN_val;
+
+ if (VP16_REGNUM <= regnum && regnum <= VP63_REGNUM)
+ {
+ int rrb_pr = 0;
+ ULONGEST cfm;
+
+ /* Fetch predicate register rename base from current frame
+ marker for this frame. */
+ cfm = get_frame_register_unsigned (this_frame, IA64_CFM_REGNUM);
+ rrb_pr = (cfm >> 32) & 0x3f;
+
+ /* Adjust the register number to account for register rotation. */
+ regnum = VP16_REGNUM + ((regnum - VP16_REGNUM) + rrb_pr) % 48;
+ }
+ prN_val = extract_bit_field (value_contents_all (val),
+ regnum - VP0_REGNUM, 1);
+ return frame_unwind_got_constant (this_frame, regnum, prN_val);
+ }
+
+ else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM)
+ {
+ ULONGEST unatN_val;
+
+ unatN_val = extract_bit_field (value_contents_all (val),
+ regnum - IA64_NAT0_REGNUM, 1);
+ return frame_unwind_got_constant (this_frame, regnum, unatN_val);
+ }
- if (addr != 0)
- {
- if (lval != NULL)
- *lval = lval_memory;
- if (addrp != NULL)
- *addrp = addr;
- read_memory (addr, raw_buffer, REGISTER_RAW_SIZE (regnum));
- }
- else
- {
- /* r32 - r127 must be fetchable via memory. If they aren't,
- then the register is unavailable */
- memset (raw_buffer, 0, REGISTER_RAW_SIZE (regnum));
- }
+ else if (regnum == IA64_BSP_REGNUM)
+ {
+ struct value *cfm_val;
+ CORE_ADDR prev_bsp, prev_cfm;
+
+ /* We want to calculate the previous bsp as the end of the previous
+ register stack frame. This corresponds to what the hardware bsp
+ register will be if we pop the frame back which is why we might
+ have been called. We know that libunwind will pass us back the
+ beginning of the current frame so we should just add sof to it. */
+ prev_bsp = extract_unsigned_integer (value_contents_all (val),
+ 8, byte_order);
+ cfm_val = libunwind_frame_prev_register (this_frame, this_cache,
+ IA64_CFM_REGNUM);
+ prev_cfm = extract_unsigned_integer (value_contents_all (cfm_val),
+ 8, byte_order);
+ prev_bsp = rse_address_add (prev_bsp, (prev_cfm & 0x7f));
+
+ return frame_unwind_got_constant (this_frame, regnum, prev_bsp);
}
else
+ return val;
+}
+
+static int
+ia64_libunwind_frame_sniffer (const struct frame_unwind *self,
+ struct frame_info *this_frame,
+ void **this_cache)
+{
+ if (libunwind_is_initialized ()
+ && libunwind_frame_sniffer (self, this_frame, this_cache))
+ return 1;
+
+ return 0;
+}
+
+static const struct frame_unwind ia64_libunwind_frame_unwind =
+{
+ NORMAL_FRAME,
+ default_frame_unwind_stop_reason,
+ ia64_libunwind_frame_this_id,
+ ia64_libunwind_frame_prev_register,
+ NULL,
+ ia64_libunwind_frame_sniffer,
+ libunwind_frame_dealloc_cache
+};
+
+static void
+ia64_libunwind_sigtramp_frame_this_id (struct frame_info *this_frame,
+ void **this_cache,
+ struct frame_id *this_id)
+{
+ struct gdbarch *gdbarch = get_frame_arch (this_frame);
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+ gdb_byte buf[8];
+ CORE_ADDR bsp;
+ struct frame_id id = outer_frame_id;
+
+ libunwind_frame_this_id (this_frame, this_cache, &id);
+ if (frame_id_eq (id, outer_frame_id))
{
- if (IA64_FR32_REGNUM <= regnum && regnum <= IA64_FR127_REGNUM)
- {
- /* Fetch floating point register rename base from current
- frame marker for this frame. */
- int rrb_fr = (get_frame_extra_info (frame)->cfm >> 25) & 0x7f;
+ (*this_id) = outer_frame_id;
+ return;
+ }
- /* Adjust the floating point register number to account for
- register rotation. */
- regnum = IA64_FR32_REGNUM
- + ((regnum - IA64_FR32_REGNUM) + rrb_fr) % 96;
- }
+ /* We must add the bsp as the special address for frame comparison
+ purposes. */
+ get_frame_register (this_frame, IA64_BSP_REGNUM, buf);
+ bsp = extract_unsigned_integer (buf, 8, byte_order);
+
+ /* For a sigtramp frame, we don't make the check for previous ip being 0. */
+ (*this_id) = frame_id_build_special (id.stack_addr, id.code_addr, bsp);
+
+ if (gdbarch_debug >= 1)
+ fprintf_unfiltered (gdb_stdlog,
+ "libunwind sigtramp frame id: code %s, "
+ "stack %s, special %s, this_frame %s\n",
+ paddress (gdbarch, id.code_addr),
+ paddress (gdbarch, id.stack_addr),
+ paddress (gdbarch, bsp),
+ host_address_to_string (this_frame));
+}
+
+static struct value *
+ia64_libunwind_sigtramp_frame_prev_register (struct frame_info *this_frame,
+ void **this_cache, int regnum)
+{
+ struct gdbarch *gdbarch = get_frame_arch (this_frame);
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+ struct value *prev_ip_val;
+ CORE_ADDR prev_ip;
+
+ /* If the previous frame pc value is 0, then we want to use the SIGCONTEXT
+ method of getting previous registers. */
+ prev_ip_val = libunwind_frame_prev_register (this_frame, this_cache,
+ IA64_IP_REGNUM);
+ prev_ip = extract_unsigned_integer (value_contents_all (prev_ip_val),
+ 8, byte_order);
+
+ if (prev_ip == 0)
+ {
+ void *tmp_cache = NULL;
+ return ia64_sigtramp_frame_prev_register (this_frame, &tmp_cache,
+ regnum);
+ }
+ else
+ return ia64_libunwind_frame_prev_register (this_frame, this_cache, regnum);
+}
- deprecated_generic_get_saved_register (raw_buffer, optimized, addrp,
- frame, regnum, lval);
+static int
+ia64_libunwind_sigtramp_frame_sniffer (const struct frame_unwind *self,
+ struct frame_info *this_frame,
+ void **this_cache)
+{
+ if (libunwind_is_initialized ())
+ {
+ if (libunwind_sigtramp_frame_sniffer (self, this_frame, this_cache))
+ return 1;
+ return 0;
}
+ else
+ return ia64_sigtramp_frame_sniffer (self, this_frame, this_cache);
}
-/* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
- EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
- and TYPE is the type (which is known to be struct, union or array). */
-int
-ia64_use_struct_convention (int gcc_p, struct type *type)
+static const struct frame_unwind ia64_libunwind_sigtramp_frame_unwind =
+{
+ SIGTRAMP_FRAME,
+ default_frame_unwind_stop_reason,
+ ia64_libunwind_sigtramp_frame_this_id,
+ ia64_libunwind_sigtramp_frame_prev_register,
+ NULL,
+ ia64_libunwind_sigtramp_frame_sniffer
+};
+
+/* Set of libunwind callback acccessor functions. */
+unw_accessors_t ia64_unw_accessors =
+{
+ ia64_find_proc_info_x,
+ ia64_put_unwind_info,
+ ia64_get_dyn_info_list,
+ ia64_access_mem,
+ ia64_access_reg,
+ ia64_access_fpreg,
+ /* resume */
+ /* get_proc_name */
+};
+
+/* Set of special libunwind callback acccessor functions specific for accessing
+ the rse registers. At the top of the stack, we want libunwind to figure out
+ how to read r32 - r127. Though usually they are found sequentially in
+ memory starting from $bof, this is not always true. */
+unw_accessors_t ia64_unw_rse_accessors =
+{
+ ia64_find_proc_info_x,
+ ia64_put_unwind_info,
+ ia64_get_dyn_info_list,
+ ia64_access_mem,
+ ia64_access_rse_reg,
+ ia64_access_rse_fpreg,
+ /* resume */
+ /* get_proc_name */
+};
+
+/* Set of ia64-libunwind-tdep gdb callbacks and data for generic
+ ia64-libunwind-tdep code to use. */
+struct libunwind_descr ia64_libunwind_descr =
+{
+ ia64_gdb2uw_regnum,
+ ia64_uw2gdb_regnum,
+ ia64_is_fpreg,
+ &ia64_unw_accessors,
+ &ia64_unw_rse_accessors,
+};
+
+#endif /* HAVE_LIBUNWIND_IA64_H */
+
+static int
+ia64_use_struct_convention (struct type *type)
{
struct type *float_elt_type;
+ /* Don't use the struct convention for anything but structure,
+ union, or array types. */
+ if (!(type->code () == TYPE_CODE_STRUCT
+ || type->code () == TYPE_CODE_UNION
+ || type->code () == TYPE_CODE_ARRAY))
+ return 0;
+
/* HFAs are structures (or arrays) consisting entirely of floating
point values of the same length. Up to 8 of these are returned
in registers. Don't use the struct convention when this is the
- case. */
+ case. */
float_elt_type = is_float_or_hfa_type (type);
if (float_elt_type != NULL
&& TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type) <= 8)
return 0;
/* Other structs of length 32 or less are returned in r8-r11.
- Don't use the struct convention for those either. */
+ Don't use the struct convention for those either. */
return TYPE_LENGTH (type) > 32;
}
-void
-ia64_extract_return_value (struct type *type, char *regbuf, char *valbuf)
+/* Return non-zero if TYPE is a structure or union type. */
+
+static int
+ia64_struct_type_p (const struct type *type)
+{
+ return (type->code () == TYPE_CODE_STRUCT
+ || type->code () == TYPE_CODE_UNION);
+}
+
+static void
+ia64_extract_return_value (struct type *type, struct regcache *regcache,
+ gdb_byte *valbuf)
{
+ struct gdbarch *gdbarch = regcache->arch ();
struct type *float_elt_type;
float_elt_type = is_float_or_hfa_type (type);
if (float_elt_type != NULL)
{
+ gdb_byte from[IA64_FP_REGISTER_SIZE];
int offset = 0;
int regnum = IA64_FR8_REGNUM;
int n = TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type);
while (n-- > 0)
{
- ia64_register_convert_to_virtual (regnum, float_elt_type,
- ®buf[REGISTER_BYTE (regnum)], valbuf + offset);
+ regcache->cooked_read (regnum, from);
+ target_float_convert (from, ia64_ext_type (gdbarch),
+ valbuf + offset, float_elt_type);
offset += TYPE_LENGTH (float_elt_type);
regnum++;
}
}
+ else if (!ia64_struct_type_p (type) && TYPE_LENGTH (type) < 8)
+ {
+ /* This is an integral value, and its size is less than 8 bytes.
+ These values are LSB-aligned, so extract the relevant bytes,
+ and copy them into VALBUF. */
+ /* brobecker/2005-12-30: Actually, all integral values are LSB aligned,
+ so I suppose we should also add handling here for integral values
+ whose size is greater than 8. But I wasn't able to create such
+ a type, neither in C nor in Ada, so not worrying about these yet. */
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+ ULONGEST val;
+
+ regcache_cooked_read_unsigned (regcache, IA64_GR8_REGNUM, &val);
+ store_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order, val);
+ }
else
- memcpy (valbuf, ®buf[REGISTER_BYTE (IA64_GR8_REGNUM)],
- TYPE_LENGTH (type));
-}
+ {
+ ULONGEST val;
+ int offset = 0;
+ int regnum = IA64_GR8_REGNUM;
+ int reglen = TYPE_LENGTH (register_type (gdbarch, IA64_GR8_REGNUM));
+ int n = TYPE_LENGTH (type) / reglen;
+ int m = TYPE_LENGTH (type) % reglen;
-/* FIXME: Turn this into a stack of some sort. Unfortunately, something
- like this is necessary though since the IA-64 calling conventions specify
- that r8 is not preserved. */
-static CORE_ADDR struct_return_address;
+ while (n-- > 0)
+ {
+ ULONGEST regval;
+ regcache_cooked_read_unsigned (regcache, regnum, ®val);
+ memcpy ((char *)valbuf + offset, ®val, reglen);
+ offset += reglen;
+ regnum++;
+ }
-CORE_ADDR
-ia64_extract_struct_value_address (char *regbuf)
-{
- /* FIXME: See above. */
- return struct_return_address;
+ if (m)
+ {
+ regcache_cooked_read_unsigned (regcache, regnum, &val);
+ memcpy ((char *)valbuf + offset, &val, m);
+ }
+ }
}
static void
-ia64_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
+ia64_store_return_value (struct type *type, struct regcache *regcache,
+ const gdb_byte *valbuf)
{
- /* FIXME: See above. */
- /* Note that most of the work was done in ia64_push_arguments() */
- struct_return_address = addr;
-}
+ struct gdbarch *gdbarch = regcache->arch ();
+ struct type *float_elt_type;
-int
-ia64_frameless_function_invocation (struct frame_info *frame)
-{
- DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
- return (get_frame_extra_info (frame)->mem_stack_frame_size == 0);
-}
+ float_elt_type = is_float_or_hfa_type (type);
+ if (float_elt_type != NULL)
+ {
+ gdb_byte to[IA64_FP_REGISTER_SIZE];
+ int offset = 0;
+ int regnum = IA64_FR8_REGNUM;
+ int n = TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type);
-CORE_ADDR
-ia64_saved_pc_after_call (struct frame_info *frame)
-{
- return read_register (IA64_BR0_REGNUM);
-}
+ while (n-- > 0)
+ {
+ target_float_convert (valbuf + offset, float_elt_type,
+ to, ia64_ext_type (gdbarch));
+ regcache->cooked_write (regnum, to);
+ offset += TYPE_LENGTH (float_elt_type);
+ regnum++;
+ }
+ }
+ else
+ {
+ int offset = 0;
+ int regnum = IA64_GR8_REGNUM;
+ int reglen = TYPE_LENGTH (register_type (gdbarch, IA64_GR8_REGNUM));
+ int n = TYPE_LENGTH (type) / reglen;
+ int m = TYPE_LENGTH (type) % reglen;
-static CORE_ADDR
-ia64_frame_args_address (struct frame_info *frame)
-{
- /* frame->frame points at the SP for this frame; But we want the start
- of the frame, not the end. Calling frame chain will get his for us. */
- return ia64_frame_chain (frame);
-}
+ while (n-- > 0)
+ {
+ ULONGEST val;
+ memcpy (&val, (char *)valbuf + offset, reglen);
+ regcache_cooked_write_unsigned (regcache, regnum, val);
+ offset += reglen;
+ regnum++;
+ }
-static CORE_ADDR
-ia64_frame_locals_address (struct frame_info *frame)
-{
- /* frame->frame points at the SP for this frame; But we want the start
- of the frame, not the end. Calling frame chain will get his for us. */
- return ia64_frame_chain (frame);
+ if (m)
+ {
+ ULONGEST val;
+ memcpy (&val, (char *)valbuf + offset, m);
+ regcache_cooked_write_unsigned (regcache, regnum, val);
+ }
+ }
}
-
-static void
-ia64_init_extra_frame_info (int fromleaf, struct frame_info *frame)
+
+static enum return_value_convention
+ia64_return_value (struct gdbarch *gdbarch, struct value *function,
+ struct type *valtype, struct regcache *regcache,
+ gdb_byte *readbuf, const gdb_byte *writebuf)
{
- CORE_ADDR bsp, cfm;
- int next_frame_is_call_dummy = ((get_next_frame (frame) != NULL)
- && DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (get_next_frame (frame)),
- get_frame_base (get_next_frame (frame)),
- get_frame_base (get_next_frame (frame))));
-
- frame_extra_info_zalloc (frame, sizeof (struct frame_extra_info));
+ int struct_return = ia64_use_struct_convention (valtype);
- if (get_next_frame (frame) == 0)
+ if (writebuf != NULL)
{
- bsp = read_register (IA64_BSP_REGNUM);
- cfm = read_register (IA64_CFM_REGNUM);
-
- }
- else if ((get_frame_type (get_next_frame (frame)) == SIGTRAMP_FRAME))
- {
- bsp = read_sigcontext_register (get_next_frame (frame), IA64_BSP_REGNUM);
- cfm = read_sigcontext_register (get_next_frame (frame), IA64_CFM_REGNUM);
+ gdb_assert (!struct_return);
+ ia64_store_return_value (valtype, regcache, writebuf);
}
- else if (next_frame_is_call_dummy)
+
+ if (readbuf != NULL)
{
- bsp = deprecated_read_register_dummy (get_frame_pc (get_next_frame (frame)),
- get_frame_base (get_next_frame (frame)),
- IA64_BSP_REGNUM);
- cfm = deprecated_read_register_dummy (get_frame_pc (get_next_frame (frame)),
- get_frame_base (get_next_frame (frame)),
- IA64_CFM_REGNUM);
+ gdb_assert (!struct_return);
+ ia64_extract_return_value (valtype, regcache, readbuf);
}
- else
- {
- struct frame_info *frn = get_next_frame (frame);
-
- DEPRECATED_FRAME_INIT_SAVED_REGS (frn);
-
- if (get_frame_saved_regs (frn)[IA64_CFM_REGNUM] != 0)
- cfm = read_memory_integer (get_frame_saved_regs (frn)[IA64_CFM_REGNUM], 8);
- else if (get_next_frame (frn) && (get_frame_type (get_next_frame (frn)) == SIGTRAMP_FRAME))
- cfm = read_sigcontext_register (get_next_frame (frn), IA64_PFS_REGNUM);
- else if (get_next_frame (frn)
- && DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (get_next_frame (frn)),
- get_frame_base (get_next_frame (frn)),
- get_frame_base (get_next_frame (frn))))
- cfm = deprecated_read_register_dummy (get_frame_pc (get_next_frame (frn)),
- get_frame_base (get_next_frame (frn)),
- IA64_PFS_REGNUM);
- else
- cfm = read_register (IA64_PFS_REGNUM);
-
- bsp = get_frame_extra_info (frn)->bsp;
- }
- get_frame_extra_info (frame)->cfm = cfm;
- get_frame_extra_info (frame)->sof = cfm & 0x7f;
- get_frame_extra_info (frame)->sol = (cfm >> 7) & 0x7f;
- if (get_next_frame (frame) == 0
- || (get_frame_type (get_next_frame (frame)) == SIGTRAMP_FRAME)
- || next_frame_is_call_dummy)
- get_frame_extra_info (frame)->bsp =
- rse_address_add (bsp, -get_frame_extra_info (frame)->sof);
- else
- get_frame_extra_info (frame)->bsp =
- rse_address_add (bsp, -get_frame_extra_info (frame)->sol);
- get_frame_extra_info (frame)->after_prologue = 0;
- get_frame_extra_info (frame)->mem_stack_frame_size = -1; /* Not yet determined */
- get_frame_extra_info (frame)->fp_reg = 0;
+ if (struct_return)
+ return RETURN_VALUE_STRUCT_CONVENTION;
+ else
+ return RETURN_VALUE_REGISTER_CONVENTION;
}
static int
is_float_or_hfa_type_recurse (struct type *t, struct type **etp)
{
- switch (TYPE_CODE (t))
+ switch (t->code ())
{
case TYPE_CODE_FLT:
if (*etp)
{
int i;
- for (i = 0; i < TYPE_NFIELDS (t); i++)
+ for (i = 0; i < t->num_fields (); i++)
if (!is_float_or_hfa_type_recurse
(check_typedef (TYPE_FIELD_TYPE (t, i)), etp))
return 0;
/* Determine if the given type is one of the floating point types or
and HFA (which is a struct, array, or combination thereof whose
- bottom-most elements are all of the same floating point type.) */
+ bottom-most elements are all of the same floating point type). */
static struct type *
is_float_or_hfa_type (struct type *t)
/* Return 1 if the alignment of T is such that the next even slot
should be used. Return 0, if the next available slot should
be used. (See section 8.5.1 of the IA-64 Software Conventions
- and Runtime manual.) */
+ and Runtime manual). */
static int
slot_alignment_is_next_even (struct type *t)
{
- switch (TYPE_CODE (t))
+ switch (t->code ())
{
case TYPE_CODE_INT:
case TYPE_CODE_FLT:
{
int i;
- for (i = 0; i < TYPE_NFIELDS (t); i++)
+ for (i = 0; i < t->num_fields (); i++)
if (slot_alignment_is_next_even
(check_typedef (TYPE_FIELD_TYPE (t, i))))
return 1;
d_un.d_ptr value is the global pointer. */
static CORE_ADDR
-generic_elf_find_global_pointer (CORE_ADDR faddr)
+ia64_find_global_pointer_from_dynamic_section (struct gdbarch *gdbarch,
+ CORE_ADDR faddr)
{
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
struct obj_section *faddr_sect;
faddr_sect = find_pc_section (faddr);
if (osect < faddr_sect->objfile->sections_end)
{
- CORE_ADDR addr;
+ CORE_ADDR addr, endaddr;
- addr = osect->addr;
- while (addr < osect->endaddr)
+ addr = obj_section_addr (osect);
+ endaddr = obj_section_endaddr (osect);
+
+ while (addr < endaddr)
{
int status;
LONGEST tag;
- char buf[8];
+ gdb_byte buf[8];
status = target_read_memory (addr, buf, sizeof (buf));
if (status != 0)
break;
- tag = extract_signed_integer (buf, sizeof (buf));
+ tag = extract_signed_integer (buf, sizeof (buf), byte_order);
if (tag == DT_PLTGOT)
{
status = target_read_memory (addr + 8, buf, sizeof (buf));
if (status != 0)
break;
- global_pointer = extract_unsigned_integer (buf, sizeof (buf));
+ global_pointer = extract_unsigned_integer (buf, sizeof (buf),
+ byte_order);
- /* The payoff... */
+ /* The payoff... */
return global_pointer;
}
return 0;
}
+/* Attempt to find (and return) the global pointer for the given
+ function. We first try the find_global_pointer_from_solib routine
+ from the gdbarch tdep vector, if provided. And if that does not
+ work, then we try ia64_find_global_pointer_from_dynamic_section. */
+
+static CORE_ADDR
+ia64_find_global_pointer (struct gdbarch *gdbarch, CORE_ADDR faddr)
+{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ CORE_ADDR addr = 0;
+
+ if (tdep->find_global_pointer_from_solib)
+ addr = tdep->find_global_pointer_from_solib (gdbarch, faddr);
+ if (addr == 0)
+ addr = ia64_find_global_pointer_from_dynamic_section (gdbarch, faddr);
+ return addr;
+}
+
/* Given a function's address, attempt to find (and return) the
corresponding (canonical) function descriptor. Return 0 if
- not found. */
+ not found. */
static CORE_ADDR
-find_extant_func_descr (CORE_ADDR faddr)
+find_extant_func_descr (struct gdbarch *gdbarch, CORE_ADDR faddr)
{
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
struct obj_section *faddr_sect;
- /* Return early if faddr is already a function descriptor */
+ /* Return early if faddr is already a function descriptor. */
faddr_sect = find_pc_section (faddr);
if (faddr_sect && strcmp (faddr_sect->the_bfd_section->name, ".opd") == 0)
return faddr;
if (osect < faddr_sect->objfile->sections_end)
{
- CORE_ADDR addr;
+ CORE_ADDR addr, endaddr;
+
+ addr = obj_section_addr (osect);
+ endaddr = obj_section_endaddr (osect);
- addr = osect->addr;
- while (addr < osect->endaddr)
+ while (addr < endaddr)
{
int status;
LONGEST faddr2;
- char buf[8];
+ gdb_byte buf[8];
status = target_read_memory (addr, buf, sizeof (buf));
if (status != 0)
break;
- faddr2 = extract_signed_integer (buf, sizeof (buf));
+ faddr2 = extract_signed_integer (buf, sizeof (buf), byte_order);
if (faddr == faddr2)
return addr;
/* Attempt to find a function descriptor corresponding to the
given address. If none is found, construct one on the
- stack using the address at fdaptr */
+ stack using the address at fdaptr. */
static CORE_ADDR
-find_func_descr (CORE_ADDR faddr, CORE_ADDR *fdaptr)
+find_func_descr (struct regcache *regcache, CORE_ADDR faddr, CORE_ADDR *fdaptr)
{
+ struct gdbarch *gdbarch = regcache->arch ();
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
CORE_ADDR fdesc;
- fdesc = find_extant_func_descr (faddr);
+ fdesc = find_extant_func_descr (gdbarch, faddr);
if (fdesc == 0)
{
- CORE_ADDR global_pointer;
- char buf[16];
+ ULONGEST global_pointer;
+ gdb_byte buf[16];
fdesc = *fdaptr;
*fdaptr += 16;
- global_pointer = FIND_GLOBAL_POINTER (faddr);
+ global_pointer = ia64_find_global_pointer (gdbarch, faddr);
if (global_pointer == 0)
- global_pointer = read_register (IA64_GR1_REGNUM);
+ regcache_cooked_read_unsigned (regcache,
+ IA64_GR1_REGNUM, &global_pointer);
- store_unsigned_integer (buf, 8, faddr);
- store_unsigned_integer (buf + 8, 8, global_pointer);
+ store_unsigned_integer (buf, 8, byte_order, faddr);
+ store_unsigned_integer (buf + 8, 8, byte_order, global_pointer);
write_memory (fdesc, buf, 16);
}
return fdesc;
}
+/* Use the following routine when printing out function pointers
+ so the user can see the function address rather than just the
+ function descriptor. */
+static CORE_ADDR
+ia64_convert_from_func_ptr_addr (struct gdbarch *gdbarch, CORE_ADDR addr,
+ struct target_ops *targ)
+{
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+ struct obj_section *s;
+ gdb_byte buf[8];
+
+ s = find_pc_section (addr);
+
+ /* check if ADDR points to a function descriptor. */
+ if (s && strcmp (s->the_bfd_section->name, ".opd") == 0)
+ return read_memory_unsigned_integer (addr, 8, byte_order);
+
+ /* Normally, functions live inside a section that is executable.
+ So, if ADDR points to a non-executable section, then treat it
+ as a function descriptor and return the target address iff
+ the target address itself points to a section that is executable.
+ Check first the memory of the whole length of 8 bytes is readable. */
+ if (s && (s->the_bfd_section->flags & SEC_CODE) == 0
+ && target_read_memory (addr, buf, 8) == 0)
+ {
+ CORE_ADDR pc = extract_unsigned_integer (buf, 8, byte_order);
+ struct obj_section *pc_section = find_pc_section (pc);
+
+ if (pc_section && (pc_section->the_bfd_section->flags & SEC_CODE))
+ return pc;
+ }
+
+ /* There are also descriptors embedded in vtables. */
+ if (s)
+ {
+ struct bound_minimal_symbol minsym;
+
+ minsym = lookup_minimal_symbol_by_pc (addr);
+
+ if (minsym.minsym
+ && is_vtable_name (minsym.minsym->linkage_name ()))
+ return read_memory_unsigned_integer (addr, 8, byte_order);
+ }
+
+ return addr;
+}
+
+static CORE_ADDR
+ia64_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp)
+{
+ return sp & ~0xfLL;
+}
+
+/* The default "allocate_new_rse_frame" ia64_infcall_ops routine for ia64. */
+
+static void
+ia64_allocate_new_rse_frame (struct regcache *regcache, ULONGEST bsp, int sof)
+{
+ ULONGEST cfm, pfs, new_bsp;
+
+ regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm);
+
+ new_bsp = rse_address_add (bsp, sof);
+ regcache_cooked_write_unsigned (regcache, IA64_BSP_REGNUM, new_bsp);
+
+ regcache_cooked_read_unsigned (regcache, IA64_PFS_REGNUM, &pfs);
+ pfs &= 0xc000000000000000LL;
+ pfs |= (cfm & 0xffffffffffffLL);
+ regcache_cooked_write_unsigned (regcache, IA64_PFS_REGNUM, pfs);
+
+ cfm &= 0xc000000000000000LL;
+ cfm |= sof;
+ regcache_cooked_write_unsigned (regcache, IA64_CFM_REGNUM, cfm);
+}
+
+/* The default "store_argument_in_slot" ia64_infcall_ops routine for
+ ia64. */
+
+static void
+ia64_store_argument_in_slot (struct regcache *regcache, CORE_ADDR bsp,
+ int slotnum, gdb_byte *buf)
+{
+ write_memory (rse_address_add (bsp, slotnum), buf, 8);
+}
+
+/* The default "set_function_addr" ia64_infcall_ops routine for ia64. */
+
+static void
+ia64_set_function_addr (struct regcache *regcache, CORE_ADDR func_addr)
+{
+ /* Nothing needed. */
+}
+
static CORE_ADDR
-ia64_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
- int struct_return, CORE_ADDR struct_addr)
+ia64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
+ struct regcache *regcache, CORE_ADDR bp_addr,
+ int nargs, struct value **args, CORE_ADDR sp,
+ function_call_return_method return_method,
+ CORE_ADDR struct_addr)
{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
int argno;
struct value *arg;
struct type *type;
int len, argoffset;
int nslots, rseslots, memslots, slotnum, nfuncargs;
int floatreg;
- CORE_ADDR bsp, cfm, pfs, new_bsp, funcdescaddr;
+ ULONGEST bsp;
+ CORE_ADDR funcdescaddr, global_pointer;
+ CORE_ADDR func_addr = find_function_addr (function, NULL);
nslots = 0;
nfuncargs = 0;
- /* Count the number of slots needed for the arguments */
+ /* Count the number of slots needed for the arguments. */
for (argno = 0; argno < nargs; argno++)
{
arg = args[argno];
- type = check_typedef (VALUE_TYPE (arg));
+ type = check_typedef (value_type (arg));
len = TYPE_LENGTH (type);
if ((nslots & 1) && slot_alignment_is_next_even (type))
nslots++;
- if (TYPE_CODE (type) == TYPE_CODE_FUNC)
+ if (type->code () == TYPE_CODE_FUNC)
nfuncargs++;
nslots += (len + 7) / 8;
}
- /* Divvy up the slots between the RSE and the memory stack */
+ /* Divvy up the slots between the RSE and the memory stack. */
rseslots = (nslots > 8) ? 8 : nslots;
memslots = nslots - rseslots;
- /* Allocate a new RSE frame */
- cfm = read_register (IA64_CFM_REGNUM);
-
- bsp = read_register (IA64_BSP_REGNUM);
- bsp = rse_address_add (bsp, cfm & 0x7f);
- new_bsp = rse_address_add (bsp, rseslots);
- write_register (IA64_BSP_REGNUM, new_bsp);
-
- pfs = read_register (IA64_PFS_REGNUM);
- pfs &= 0xc000000000000000LL;
- pfs |= (cfm & 0xffffffffffffLL);
- write_register (IA64_PFS_REGNUM, pfs);
-
- cfm &= 0xc000000000000000LL;
- cfm |= rseslots;
- write_register (IA64_CFM_REGNUM, cfm);
+ /* Allocate a new RSE frame. */
+ regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp);
+ tdep->infcall_ops.allocate_new_rse_frame (regcache, bsp, rseslots);
/* We will attempt to find function descriptors in the .opd segment,
but if we can't we'll construct them ourselves. That being the
- case, we'll need to reserve space on the stack for them. */
+ case, we'll need to reserve space on the stack for them. */
funcdescaddr = sp - nfuncargs * 16;
funcdescaddr &= ~0xfLL;
/* Adjust the stack pointer to it's new value. The calling conventions
require us to have 16 bytes of scratch, plus whatever space is
- necessary for the memory slots and our function descriptors */
+ necessary for the memory slots and our function descriptors. */
sp = sp - 16 - (memslots + nfuncargs) * 8;
- sp &= ~0xfLL; /* Maintain 16 byte alignment */
+ sp &= ~0xfLL; /* Maintain 16 byte alignment. */
/* Place the arguments where they belong. The arguments will be
either placed in the RSE backing store or on the memory stack.
In addition, floating point arguments or HFAs are placed in
- floating point registers. */
+ floating point registers. */
slotnum = 0;
floatreg = IA64_FR8_REGNUM;
for (argno = 0; argno < nargs; argno++)
struct type *float_elt_type;
arg = args[argno];
- type = check_typedef (VALUE_TYPE (arg));
+ type = check_typedef (value_type (arg));
len = TYPE_LENGTH (type);
- /* Special handling for function parameters */
- if (len == 8
- && TYPE_CODE (type) == TYPE_CODE_PTR
- && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)
+ /* Special handling for function parameters. */
+ if (len == 8
+ && type->code () == TYPE_CODE_PTR
+ && TYPE_TARGET_TYPE (type)->code () == TYPE_CODE_FUNC)
{
- char val_buf[8];
-
- store_unsigned_integer (val_buf, 8,
- find_func_descr (extract_unsigned_integer (VALUE_CONTENTS (arg), 8),
+ gdb_byte val_buf[8];
+ ULONGEST faddr = extract_unsigned_integer (value_contents (arg),
+ 8, byte_order);
+ store_unsigned_integer (val_buf, 8, byte_order,
+ find_func_descr (regcache, faddr,
&funcdescaddr));
if (slotnum < rseslots)
- write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
+ tdep->infcall_ops.store_argument_in_slot (regcache, bsp,
+ slotnum, val_buf);
else
write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
slotnum++;
continue;
}
- /* Normal slots */
+ /* Normal slots. */
/* Skip odd slot if necessary... */
if ((slotnum & 1) && slot_alignment_is_next_even (type))
argoffset = 0;
while (len > 0)
{
- char val_buf[8];
+ gdb_byte val_buf[8];
memset (val_buf, 0, 8);
- memcpy (val_buf, VALUE_CONTENTS (arg) + argoffset, (len > 8) ? 8 : len);
+ if (!ia64_struct_type_p (type) && len < 8)
+ {
+ /* Integral types are LSB-aligned, so we have to be careful
+ to insert the argument on the correct side of the buffer.
+ This is why we use store_unsigned_integer. */
+ store_unsigned_integer
+ (val_buf, 8, byte_order,
+ extract_unsigned_integer (value_contents (arg), len,
+ byte_order));
+ }
+ else
+ {
+ /* This is either an 8bit integral type, or an aggregate.
+ For 8bit integral type, there is no problem, we just
+ copy the value over.
+
+ For aggregates, the only potentially tricky portion
+ is to write the last one if it is less than 8 bytes.
+ In this case, the data is Byte0-aligned. Happy news,
+ this means that we don't need to differentiate the
+ handling of 8byte blocks and less-than-8bytes blocks. */
+ memcpy (val_buf, value_contents (arg) + argoffset,
+ (len > 8) ? 8 : len);
+ }
if (slotnum < rseslots)
- write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
+ tdep->infcall_ops.store_argument_in_slot (regcache, bsp,
+ slotnum, val_buf);
else
write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
slotnum++;
}
- /* Handle floating point types (including HFAs) */
+ /* Handle floating point types (including HFAs). */
float_elt_type = is_float_or_hfa_type (type);
if (float_elt_type != NULL)
{
len = TYPE_LENGTH (type);
while (len > 0 && floatreg < IA64_FR16_REGNUM)
{
- ia64_register_convert_to_raw (
- float_elt_type,
- floatreg,
- VALUE_CONTENTS (arg) + argoffset,
- &deprecated_registers[REGISTER_BYTE (floatreg)]);
+ gdb_byte to[IA64_FP_REGISTER_SIZE];
+ target_float_convert (value_contents (arg) + argoffset,
+ float_elt_type, to,
+ ia64_ext_type (gdbarch));
+ regcache->cooked_write (floatreg, to);
floatreg++;
argoffset += TYPE_LENGTH (float_elt_type);
len -= TYPE_LENGTH (float_elt_type);
}
}
- /* Store the struct return value in r8 if necessary. */
- if (struct_return)
- {
- store_unsigned_integer (&deprecated_registers[REGISTER_BYTE (IA64_GR8_REGNUM)],
- REGISTER_RAW_SIZE (IA64_GR8_REGNUM),
- struct_addr);
- }
-
- /* Sync gdb's idea of what the registers are with the target. */
- target_store_registers (-1);
-
- /* FIXME: This doesn't belong here! Instead, SAVE_DUMMY_FRAME_TOS needs
- to be defined to call generic_save_dummy_frame_tos(). But at the
- time of this writing, SAVE_DUMMY_FRAME_TOS wasn't gdbarch'd, so
- I chose to put this call here instead of using the old mechanisms.
- Once SAVE_DUMMY_FRAME_TOS is gdbarch'd, all we need to do is add the
- line
+ /* Store the struct return value in r8 if necessary. */
+ if (return_method == return_method_struct)
+ regcache_cooked_write_unsigned (regcache, IA64_GR8_REGNUM,
+ (ULONGEST) struct_addr);
- set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos);
+ global_pointer = ia64_find_global_pointer (gdbarch, func_addr);
- to ia64_gdbarch_init() and remove the line below. */
- generic_save_dummy_frame_tos (sp);
+ if (global_pointer != 0)
+ regcache_cooked_write_unsigned (regcache, IA64_GR1_REGNUM, global_pointer);
- return sp;
-}
+ /* The following is not necessary on HP-UX, because we're using
+ a dummy code sequence pushed on the stack to make the call, and
+ this sequence doesn't need b0 to be set in order for our dummy
+ breakpoint to be hit. Nonetheless, this doesn't interfere, and
+ it's needed for other OSes, so we do this unconditionaly. */
+ regcache_cooked_write_unsigned (regcache, IA64_BR0_REGNUM, bp_addr);
-static CORE_ADDR
-ia64_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
-{
- CORE_ADDR global_pointer = FIND_GLOBAL_POINTER (pc);
+ regcache_cooked_write_unsigned (regcache, sp_regnum, sp);
- if (global_pointer != 0)
- write_register (IA64_GR1_REGNUM, global_pointer);
+ tdep->infcall_ops.set_function_addr (regcache, func_addr);
- write_register (IA64_BR0_REGNUM, CALL_DUMMY_ADDRESS ());
return sp;
}
-static void
-ia64_store_return_value (struct type *type, char *valbuf)
-{
- if (TYPE_CODE (type) == TYPE_CODE_FLT)
- {
- ia64_register_convert_to_raw (type, IA64_FR8_REGNUM, valbuf,
- &deprecated_registers[REGISTER_BYTE (IA64_FR8_REGNUM)]);
- target_store_registers (IA64_FR8_REGNUM);
- }
- else
- deprecated_write_register_bytes (REGISTER_BYTE (IA64_GR8_REGNUM),
- valbuf, TYPE_LENGTH (type));
-}
-
-static void
-ia64_pop_frame (void)
+static const struct ia64_infcall_ops ia64_infcall_ops =
{
- generic_pop_current_frame (ia64_pop_frame_regular);
-}
+ ia64_allocate_new_rse_frame,
+ ia64_store_argument_in_slot,
+ ia64_set_function_addr
+};
-static void
-ia64_pop_frame_regular (struct frame_info *frame)
+static struct frame_id
+ia64_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
{
- int regno;
- CORE_ADDR bsp, cfm, pfs;
-
- DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
-
- for (regno = 0; regno < ia64_num_regs; regno++)
- {
- if (get_frame_saved_regs (frame)[regno]
- && (!(IA64_GR32_REGNUM <= regno && regno <= IA64_GR127_REGNUM))
- && regno != pc_regnum
- && regno != sp_regnum
- && regno != IA64_PFS_REGNUM
- && regno != IA64_CFM_REGNUM
- && regno != IA64_BSP_REGNUM
- && regno != IA64_BSPSTORE_REGNUM)
- {
- write_register (regno,
- read_memory_integer (get_frame_saved_regs (frame)[regno],
- REGISTER_RAW_SIZE (regno)));
- }
- }
-
- write_register (sp_regnum, DEPRECATED_FRAME_CHAIN (frame));
- write_pc (DEPRECATED_FRAME_SAVED_PC (frame));
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+ gdb_byte buf[8];
+ CORE_ADDR sp, bsp;
- cfm = read_register (IA64_CFM_REGNUM);
-
- if (get_frame_saved_regs (frame)[IA64_PFS_REGNUM])
- {
- pfs = read_memory_integer (get_frame_saved_regs (frame)[IA64_PFS_REGNUM],
- REGISTER_RAW_SIZE (IA64_PFS_REGNUM));
- }
- else
- pfs = read_register (IA64_PFS_REGNUM);
+ get_frame_register (this_frame, sp_regnum, buf);
+ sp = extract_unsigned_integer (buf, 8, byte_order);
- /* Compute the new bsp by *adding* the difference between the
- size of the frame and the size of the locals (both wrt the
- frame that we're going back to). This seems kind of strange,
- especially since it seems like we ought to be subtracting the
- size of the locals... and we should; but the Linux kernel
- wants bsp to be set at the end of all used registers. It's
- likely that this code will need to be revised to accomodate
- other operating systems. */
- bsp = rse_address_add (get_frame_extra_info (frame)->bsp,
- (pfs & 0x7f) - ((pfs >> 7) & 0x7f));
- write_register (IA64_BSP_REGNUM, bsp);
+ get_frame_register (this_frame, IA64_BSP_REGNUM, buf);
+ bsp = extract_unsigned_integer (buf, 8, byte_order);
- /* FIXME: What becomes of the epilog count in the PFS? */
- cfm = (cfm & ~0xffffffffffffLL) | (pfs & 0xffffffffffffLL);
- write_register (IA64_CFM_REGNUM, cfm);
+ if (gdbarch_debug >= 1)
+ fprintf_unfiltered (gdb_stdlog,
+ "dummy frame id: code %s, stack %s, special %s\n",
+ paddress (gdbarch, get_frame_pc (this_frame)),
+ paddress (gdbarch, sp), paddress (gdbarch, bsp));
- flush_cached_frames ();
+ return frame_id_build_special (sp, get_frame_pc (this_frame), bsp);
}
-static void
-ia64_remote_translate_xfer_address (struct gdbarch *gdbarch,
- struct regcache *regcache,
- CORE_ADDR memaddr, int nr_bytes,
- CORE_ADDR *targ_addr, int *targ_len)
+static CORE_ADDR
+ia64_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
{
- *targ_addr = memaddr;
- *targ_len = nr_bytes;
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+ gdb_byte buf[8];
+ CORE_ADDR ip, psr, pc;
+
+ frame_unwind_register (next_frame, IA64_IP_REGNUM, buf);
+ ip = extract_unsigned_integer (buf, 8, byte_order);
+ frame_unwind_register (next_frame, IA64_PSR_REGNUM, buf);
+ psr = extract_unsigned_integer (buf, 8, byte_order);
+
+ pc = (ip & ~0xf) | ((psr >> 41) & 3);
+ return pc;
}
-static void
-process_note_abi_tag_sections (bfd *abfd, asection *sect, void *obj)
+static int
+ia64_print_insn (bfd_vma memaddr, struct disassemble_info *info)
{
- int *os_ident_ptr = obj;
- const char *name;
- unsigned int sectsize;
-
- name = bfd_get_section_name (abfd, sect);
- sectsize = bfd_section_size (abfd, sect);
- if (strcmp (name, ".note.ABI-tag") == 0 && sectsize > 0)
- {
- unsigned int name_length, data_length, note_type;
- char *note = alloca (sectsize);
-
- bfd_get_section_contents (abfd, sect, note,
- (file_ptr) 0, (bfd_size_type) sectsize);
-
- name_length = bfd_h_get_32 (abfd, note);
- data_length = bfd_h_get_32 (abfd, note + 4);
- note_type = bfd_h_get_32 (abfd, note + 8);
+ info->bytes_per_line = SLOT_MULTIPLIER;
+ return default_print_insn (memaddr, info);
+}
- if (name_length == 4 && data_length == 16 && note_type == 1
- && strcmp (note + 12, "GNU") == 0)
- {
- int os_number = bfd_h_get_32 (abfd, note + 16);
+/* The default "size_of_register_frame" gdbarch_tdep routine for ia64. */
- /* The case numbers are from abi-tags in glibc */
- switch (os_number)
- {
- case 0 :
- *os_ident_ptr = ELFOSABI_LINUX;
- break;
- case 1 :
- *os_ident_ptr = ELFOSABI_HURD;
- break;
- case 2 :
- *os_ident_ptr = ELFOSABI_SOLARIS;
- break;
- default :
- internal_error (__FILE__, __LINE__,
- "process_note_abi_sections: unknown OS number %d", os_number);
- break;
- }
- }
- }
+static int
+ia64_size_of_register_frame (struct frame_info *this_frame, ULONGEST cfm)
+{
+ return (cfm & 0x7f);
}
static struct gdbarch *
{
struct gdbarch *gdbarch;
struct gdbarch_tdep *tdep;
- int os_ident;
- if (info.abfd != NULL
- && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
- {
- os_ident = elf_elfheader (info.abfd)->e_ident[EI_OSABI];
+ /* If there is already a candidate, use it. */
+ arches = gdbarch_list_lookup_by_info (arches, &info);
+ if (arches != NULL)
+ return arches->gdbarch;
- /* If os_ident is 0, it is not necessarily the case that we're
- on a SYSV system. (ELFOSABI_NONE is defined to be 0.)
- GNU/Linux uses a note section to record OS/ABI info, but
- leaves e_ident[EI_OSABI] zero. So we have to check for note
- sections too. */
- if (os_ident == 0)
- {
- bfd_map_over_sections (info.abfd,
- process_note_abi_tag_sections,
- &os_ident);
- }
- }
- else
- os_ident = -1;
+ tdep = XCNEW (struct gdbarch_tdep);
+ gdbarch = gdbarch_alloc (&info, tdep);
- for (arches = gdbarch_list_lookup_by_info (arches, &info);
- arches != NULL;
- arches = gdbarch_list_lookup_by_info (arches->next, &info))
- {
- tdep = gdbarch_tdep (arches->gdbarch);
- if (tdep &&tdep->os_ident == os_ident)
- return arches->gdbarch;
- }
+ tdep->size_of_register_frame = ia64_size_of_register_frame;
- tdep = xmalloc (sizeof (struct gdbarch_tdep));
- gdbarch = gdbarch_alloc (&info, tdep);
- tdep->os_ident = os_ident;
-
- /* NOTE: cagney/2002-12-06: This can be deleted when this arch is
- ready to unwind the PC first (see frame.c:get_prev_frame()). */
- set_gdbarch_deprecated_init_frame_pc (gdbarch, init_frame_pc_default);
-
- /* Set the method of obtaining the sigcontext addresses at which
- registers are saved. The method of checking to see if
- native_find_global_pointer is nonzero to indicate that we're
- on AIX is kind of hokey, but I can't think of a better way
- to do it. */
- if (os_ident == ELFOSABI_LINUX)
- tdep->sigcontext_register_address = ia64_linux_sigcontext_register_address;
- else if (native_find_global_pointer != 0)
- tdep->sigcontext_register_address = ia64_aix_sigcontext_register_address;
- else
- tdep->sigcontext_register_address = 0;
-
- /* We know that GNU/Linux won't have to resort to the
- native_find_global_pointer hackery. But that's the only one we
- know about so far, so if native_find_global_pointer is set to
- something non-zero, then use it. Otherwise fall back to using
- generic_elf_find_global_pointer. This arrangement should (in
- theory) allow us to cross debug GNU/Linux binaries from an AIX
- machine. */
- if (os_ident == ELFOSABI_LINUX)
- tdep->find_global_pointer = generic_elf_find_global_pointer;
- else if (native_find_global_pointer != 0)
- tdep->find_global_pointer = native_find_global_pointer;
- else
- tdep->find_global_pointer = generic_elf_find_global_pointer;
+ /* According to the ia64 specs, instructions that store long double
+ floats in memory use a long-double format different than that
+ used in the floating registers. The memory format matches the
+ x86 extended float format which is 80 bits. An OS may choose to
+ use this format (e.g. GNU/Linux) or choose to use a different
+ format for storing long doubles (e.g. HPUX). In the latter case,
+ the setting of the format may be moved/overridden in an
+ OS-specific tdep file. */
+ set_gdbarch_long_double_format (gdbarch, floatformats_i387_ext);
set_gdbarch_short_bit (gdbarch, 16);
set_gdbarch_int_bit (gdbarch, 32);
set_gdbarch_long_double_bit (gdbarch, 128);
set_gdbarch_ptr_bit (gdbarch, 64);
- set_gdbarch_num_regs (gdbarch, ia64_num_regs);
+ set_gdbarch_num_regs (gdbarch, NUM_IA64_RAW_REGS);
+ set_gdbarch_num_pseudo_regs (gdbarch,
+ LAST_PSEUDO_REGNUM - FIRST_PSEUDO_REGNUM);
set_gdbarch_sp_regnum (gdbarch, sp_regnum);
- set_gdbarch_deprecated_fp_regnum (gdbarch, fp_regnum);
- set_gdbarch_pc_regnum (gdbarch, pc_regnum);
set_gdbarch_fp0_regnum (gdbarch, IA64_FR0_REGNUM);
set_gdbarch_register_name (gdbarch, ia64_register_name);
- set_gdbarch_deprecated_register_size (gdbarch, 8);
- set_gdbarch_deprecated_register_bytes (gdbarch, ia64_num_regs * 8 + 128*8);
- set_gdbarch_deprecated_register_byte (gdbarch, ia64_register_byte);
- set_gdbarch_deprecated_register_raw_size (gdbarch, ia64_register_raw_size);
- set_gdbarch_deprecated_max_register_raw_size (gdbarch, 16);
- set_gdbarch_deprecated_register_virtual_size (gdbarch, ia64_register_virtual_size);
- set_gdbarch_deprecated_max_register_virtual_size (gdbarch, 16);
- set_gdbarch_deprecated_register_virtual_type (gdbarch, ia64_register_virtual_type);
-
- set_gdbarch_skip_prologue (gdbarch, ia64_skip_prologue);
+ set_gdbarch_register_type (gdbarch, ia64_register_type);
- set_gdbarch_frameless_function_invocation (gdbarch, ia64_frameless_function_invocation);
+ set_gdbarch_pseudo_register_read (gdbarch, ia64_pseudo_register_read);
+ set_gdbarch_pseudo_register_write (gdbarch, ia64_pseudo_register_write);
+ set_gdbarch_dwarf2_reg_to_regnum (gdbarch, ia64_dwarf_reg_to_regnum);
+ set_gdbarch_register_reggroup_p (gdbarch, ia64_register_reggroup_p);
+ set_gdbarch_convert_register_p (gdbarch, ia64_convert_register_p);
+ set_gdbarch_register_to_value (gdbarch, ia64_register_to_value);
+ set_gdbarch_value_to_register (gdbarch, ia64_value_to_register);
- set_gdbarch_deprecated_saved_pc_after_call (gdbarch, ia64_saved_pc_after_call);
-
- set_gdbarch_deprecated_frame_chain (gdbarch, ia64_frame_chain);
- set_gdbarch_deprecated_frame_saved_pc (gdbarch, ia64_frame_saved_pc);
-
- set_gdbarch_deprecated_frame_init_saved_regs (gdbarch, ia64_frame_init_saved_regs);
- set_gdbarch_deprecated_get_saved_register (gdbarch, ia64_get_saved_register);
-
- set_gdbarch_deprecated_register_convertible (gdbarch, ia64_register_convertible);
- set_gdbarch_deprecated_register_convert_to_virtual (gdbarch, ia64_register_convert_to_virtual);
- set_gdbarch_deprecated_register_convert_to_raw (gdbarch, ia64_register_convert_to_raw);
-
- set_gdbarch_use_struct_convention (gdbarch, ia64_use_struct_convention);
- set_gdbarch_deprecated_extract_return_value (gdbarch, ia64_extract_return_value);
+ set_gdbarch_skip_prologue (gdbarch, ia64_skip_prologue);
- set_gdbarch_deprecated_store_struct_return (gdbarch, ia64_store_struct_return);
- set_gdbarch_deprecated_store_return_value (gdbarch, ia64_store_return_value);
- set_gdbarch_deprecated_extract_struct_value_address (gdbarch, ia64_extract_struct_value_address);
+ set_gdbarch_return_value (gdbarch, ia64_return_value);
- set_gdbarch_memory_insert_breakpoint (gdbarch, ia64_memory_insert_breakpoint);
- set_gdbarch_memory_remove_breakpoint (gdbarch, ia64_memory_remove_breakpoint);
+ set_gdbarch_memory_insert_breakpoint (gdbarch,
+ ia64_memory_insert_breakpoint);
+ set_gdbarch_memory_remove_breakpoint (gdbarch,
+ ia64_memory_remove_breakpoint);
set_gdbarch_breakpoint_from_pc (gdbarch, ia64_breakpoint_from_pc);
+ set_gdbarch_breakpoint_kind_from_pc (gdbarch, ia64_breakpoint_kind_from_pc);
set_gdbarch_read_pc (gdbarch, ia64_read_pc);
set_gdbarch_write_pc (gdbarch, ia64_write_pc);
/* Settings for calling functions in the inferior. */
- set_gdbarch_deprecated_push_arguments (gdbarch, ia64_push_arguments);
- set_gdbarch_deprecated_push_return_address (gdbarch, ia64_push_return_address);
- set_gdbarch_deprecated_pop_frame (gdbarch, ia64_pop_frame);
-
- set_gdbarch_deprecated_call_dummy_words (gdbarch, ia64_call_dummy_words);
- set_gdbarch_deprecated_sizeof_call_dummy_words (gdbarch, sizeof (ia64_call_dummy_words));
- set_gdbarch_deprecated_init_extra_frame_info (gdbarch, ia64_init_extra_frame_info);
- set_gdbarch_frame_args_address (gdbarch, ia64_frame_args_address);
- set_gdbarch_frame_locals_address (gdbarch, ia64_frame_locals_address);
-
- /* We won't necessarily have a frame pointer and even if we do, it
- winds up being extraordinarly messy when attempting to find the
- frame chain. So for the purposes of creating frames (which is
- all deprecated_read_fp() is used for), simply use the stack
- pointer value instead. */
- set_gdbarch_deprecated_target_read_fp (gdbarch, ia64_read_fp);
+ set_gdbarch_push_dummy_call (gdbarch, ia64_push_dummy_call);
+ tdep->infcall_ops = ia64_infcall_ops;
+ set_gdbarch_frame_align (gdbarch, ia64_frame_align);
+ set_gdbarch_dummy_id (gdbarch, ia64_dummy_id);
+
+ set_gdbarch_unwind_pc (gdbarch, ia64_unwind_pc);
+#ifdef HAVE_LIBUNWIND_IA64_H
+ frame_unwind_append_unwinder (gdbarch,
+ &ia64_libunwind_sigtramp_frame_unwind);
+ frame_unwind_append_unwinder (gdbarch, &ia64_libunwind_frame_unwind);
+ frame_unwind_append_unwinder (gdbarch, &ia64_sigtramp_frame_unwind);
+ libunwind_frame_set_descr (gdbarch, &ia64_libunwind_descr);
+#else
+ frame_unwind_append_unwinder (gdbarch, &ia64_sigtramp_frame_unwind);
+#endif
+ frame_unwind_append_unwinder (gdbarch, &ia64_frame_unwind);
+ frame_base_set_default (gdbarch, &ia64_frame_base);
/* Settings that should be unnecessary. */
set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
- set_gdbarch_deprecated_dummy_write_sp (gdbarch, deprecated_write_sp);
+ set_gdbarch_print_insn (gdbarch, ia64_print_insn);
+ set_gdbarch_convert_from_func_ptr_addr (gdbarch,
+ ia64_convert_from_func_ptr_addr);
- set_gdbarch_decr_pc_after_break (gdbarch, 0);
- set_gdbarch_function_start_offset (gdbarch, 0);
- set_gdbarch_frame_args_skip (gdbarch, 0);
+ /* The virtual table contains 16-byte descriptors, not pointers to
+ descriptors. */
+ set_gdbarch_vtable_function_descriptors (gdbarch, 1);
- set_gdbarch_remote_translate_xfer_address (
- gdbarch, ia64_remote_translate_xfer_address);
+ /* Hook in ABI-specific overrides, if they have been registered. */
+ gdbarch_init_osabi (info, gdbarch);
return gdbarch;
}
-extern initialize_file_ftype _initialize_ia64_tdep; /* -Wmissing-prototypes */
-
+void _initialize_ia64_tdep ();
void
-_initialize_ia64_tdep (void)
+_initialize_ia64_tdep ()
{
- register_gdbarch_init (bfd_arch_ia64, ia64_gdbarch_init);
-
- deprecated_tm_print_insn = print_insn_ia64;
- deprecated_tm_print_insn_info.bytes_per_line = SLOT_MULTIPLIER;
+ gdbarch_register (bfd_arch_ia64, ia64_gdbarch_init, NULL);
}
projects / deliverable / binutils-gdb.git / blobdiff