-/* Target-dependent code for Motorola 68HC11
- Copyright (C) 1999, 2000 Free Software Foundation, Inc.
- Contributed by Stephane Carrez, stcarrez@worldnet.fr
+/* Target-dependent code for Motorola 68HC11 & 68HC12
+ Copyright 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
+ Contributed by Stephane Carrez, stcarrez@nerim.fr
This file is part of GDB.
#include "defs.h"
#include "frame.h"
-#include "obstack.h"
#include "symtab.h"
#include "gdbtypes.h"
#include "gdbcmd.h"
#include "symfile.h"
#include "objfiles.h"
#include "arch-utils.h"
+#include "regcache.h"
#include "target.h"
#include "opcode/m68hc11.h"
+#include "elf/m68hc11.h"
+#include "elf-bfd.h"
+
+/* Macros for setting and testing a bit in a minimal symbol.
+ For 68HC11/68HC12 we have two flags that tell which return
+ type the function is using. This is used for prologue and frame
+ analysis to compute correct stack frame layout.
+
+ The MSB of the minimal symbol's "info" field is used for this purpose.
+ This field is already being used to store the symbol size, so the
+ assumption is that the symbol size cannot exceed 2^30.
+
+ MSYMBOL_SET_RTC Actually sets the "RTC" bit.
+ MSYMBOL_SET_RTI Actually sets the "RTI" bit.
+ MSYMBOL_IS_RTC Tests the "RTC" bit in a minimal symbol.
+ MSYMBOL_IS_RTI Tests the "RTC" bit in a minimal symbol.
+ MSYMBOL_SIZE Returns the size of the minimal symbol,
+ i.e. the "info" field with the "special" bit
+ masked out. */
+
+#define MSYMBOL_SET_RTC(msym) \
+ MSYMBOL_INFO (msym) = (char *) (((long) MSYMBOL_INFO (msym)) \
+ | 0x80000000)
+
+#define MSYMBOL_SET_RTI(msym) \
+ MSYMBOL_INFO (msym) = (char *) (((long) MSYMBOL_INFO (msym)) \
+ | 0x40000000)
+
+#define MSYMBOL_IS_RTC(msym) \
+ (((long) MSYMBOL_INFO (msym) & 0x80000000) != 0)
+
+#define MSYMBOL_IS_RTI(msym) \
+ (((long) MSYMBOL_INFO (msym) & 0x40000000) != 0)
+
+#define MSYMBOL_SIZE(msym) \
+ ((long) MSYMBOL_INFO (msym) & 0x3fffffff)
+
+enum insn_return_kind {
+ RETURN_RTS,
+ RETURN_RTC,
+ RETURN_RTI
+};
+
/* Register numbers of various important registers.
Note that some of these values are "real" register numbers,
and correspond to the general registers of the machine,
#define HARD_A_REGNUM 5
#define HARD_B_REGNUM 6
#define HARD_CCR_REGNUM 7
-#define M68HC11_LAST_HARD_REG (HARD_CCR_REGNUM)
+
+/* 68HC12 page number register.
+ Note: to keep a compatibility with gcc register naming, we must
+ not have to rename FP and other soft registers. The page register
+ is a real hard register and must therefore be counted by NUM_REGS.
+ For this it has the same number as Z register (which is not used). */
+#define HARD_PAGE_REGNUM 8
+#define M68HC11_LAST_HARD_REG (HARD_PAGE_REGNUM)
/* Z is replaced by X or Y by gcc during machine reorg.
??? There is no way to get it and even know whether
#define SOFT_TMP_REGNUM 10
#define SOFT_ZS_REGNUM 11
#define SOFT_XY_REGNUM 12
-#define SOFT_D1_REGNUM 13
+#define SOFT_UNUSED_REGNUM 13
+#define SOFT_D1_REGNUM 14
#define SOFT_D32_REGNUM (SOFT_D1_REGNUM+31)
#define M68HC11_MAX_SOFT_REGS 32
#define M68HC11_REG_SIZE (2)
+#define M68HC12_NUM_REGS (9)
+#define M68HC12_NUM_PSEUDO_REGS ((M68HC11_MAX_SOFT_REGS+5)+1-1)
+#define M68HC12_HARD_PC_REGNUM (SOFT_D32_REGNUM+1)
+
+struct insn_sequence;
struct gdbarch_tdep
{
- /* from the elf header */
+ /* Stack pointer correction value. For 68hc11, the stack pointer points
+ to the next push location. An offset of 1 must be applied to obtain
+ the address where the last value is saved. For 68hc12, the stack
+ pointer points to the last value pushed. No offset is necessary. */
+ int stack_correction;
+
+ /* Description of instructions in the prologue. */
+ struct insn_sequence *prologue;
+
+ /* True if the page memory bank register is available
+ and must be used. */
+ int use_page_register;
+
+ /* ELF flags for ABI. */
int elf_flags;
};
+#define M6811_TDEP gdbarch_tdep (current_gdbarch)
+#define STACK_CORRECTION (M6811_TDEP->stack_correction)
+#define USE_PAGE_REGISTER (M6811_TDEP->use_page_register)
+
struct frame_extra_info
{
- int frame_reg;
CORE_ADDR return_pc;
- CORE_ADDR dummy;
int frameless;
int size;
+ enum insn_return_kind return_kind;
};
/* Table of registers for 68HC11. This includes the hard registers
m68hc11_register_names[] =
{
"x", "d", "y", "sp", "pc", "a", "b",
- "ccr", "z", "frame","tmp", "zs", "xy",
+ "ccr", "page", "frame","tmp", "zs", "xy", 0,
"d1", "d2", "d3", "d4", "d5", "d6", "d7",
"d8", "d9", "d10", "d11", "d12", "d13", "d14",
"d15", "d16", "d17", "d18", "d19", "d20", "d21",
/* Fetch a pseudo register. The 68hc11 soft registers are treated like
pseudo registers. They are located in memory. Translate the register
fetch into a memory read. */
-void
-m68hc11_fetch_pseudo_register (int regno)
+static void
+m68hc11_pseudo_register_read (struct gdbarch *gdbarch,
+ struct regcache *regcache,
+ int regno, void *buf)
{
- char buf[MAX_REGISTER_RAW_SIZE];
+ /* The PC is a pseudo reg only for 68HC12 with the memory bank
+ addressing mode. */
+ if (regno == M68HC12_HARD_PC_REGNUM)
+ {
+ const int regsize = TYPE_LENGTH (builtin_type_uint32);
+ CORE_ADDR pc = read_register (HARD_PC_REGNUM);
+ int page = read_register (HARD_PAGE_REGNUM);
+
+ if (pc >= 0x8000 && pc < 0xc000)
+ {
+ pc -= 0x8000;
+ pc += (page << 14);
+ pc += 0x1000000;
+ }
+ store_unsigned_integer (buf, regsize, pc);
+ return;
+ }
m68hc11_initialize_register_info ();
{
memset (buf, 0, 2);
}
- supply_register (regno, buf);
}
/* Store a pseudo register. Translate the register store
into a memory write. */
static void
-m68hc11_store_pseudo_register (int regno)
+m68hc11_pseudo_register_write (struct gdbarch *gdbarch,
+ struct regcache *regcache,
+ int regno, const void *buf)
{
+ /* The PC is a pseudo reg only for 68HC12 with the memory bank
+ addressing mode. */
+ if (regno == M68HC12_HARD_PC_REGNUM)
+ {
+ const int regsize = TYPE_LENGTH (builtin_type_uint32);
+ char *tmp = alloca (regsize);
+ CORE_ADDR pc;
+
+ memcpy (tmp, buf, regsize);
+ pc = extract_unsigned_integer (tmp, regsize);
+ if (pc >= 0x1000000)
+ {
+ pc -= 0x1000000;
+ write_register (HARD_PAGE_REGNUM, (pc >> 14) & 0x0ff);
+ pc &= 0x03fff;
+ write_register (HARD_PC_REGNUM, pc + 0x8000);
+ }
+ else
+ write_register (HARD_PC_REGNUM, pc);
+ return;
+ }
+
m68hc11_initialize_register_info ();
/* Store a soft register: translate into a memory write. */
if (soft_regs[regno].name)
{
- char buf[MAX_REGISTER_RAW_SIZE];
-
- read_register_gen (regno, buf);
- target_write_memory (soft_regs[regno].addr, buf, 2);
+ const int regsize = 2;
+ char *tmp = alloca (regsize);
+ memcpy (tmp, buf, regsize);
+ target_write_memory (soft_regs[regno].addr, tmp, regsize);
}
}
-static char *
+static const char *
m68hc11_register_name (int reg_nr)
{
+ if (reg_nr == M68HC12_HARD_PC_REGNUM && USE_PAGE_REGISTER)
+ return "pc";
+ if (reg_nr == HARD_PC_REGNUM && USE_PAGE_REGISTER)
+ return "ppc";
+
if (reg_nr < 0)
return NULL;
if (reg_nr >= M68HC11_ALL_REGS)
return m68hc11_register_names[reg_nr];
}
-static unsigned char *
+static const unsigned char *
m68hc11_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
{
static unsigned char breakpoint[] = {0x0};
{
CORE_ADDR addr;
- addr = read_register (HARD_SP_REGNUM) + 1;
+ addr = read_register (HARD_SP_REGNUM) + STACK_CORRECTION;
addr &= 0x0ffff;
return read_memory_integer (addr, 2) & 0x0FFFF;
}
static CORE_ADDR
m68hc11_frame_args_address (struct frame_info *frame)
{
- return frame->frame;
+ CORE_ADDR addr;
+
+ addr = frame->frame + frame->extra_info->size + STACK_CORRECTION + 2;
+ if (frame->extra_info->return_kind == RETURN_RTC)
+ addr += 1;
+ else if (frame->extra_info->return_kind == RETURN_RTI)
+ addr += 7;
+
+ return addr;
}
static CORE_ADDR
read_memory_integer (frame->saved_regs[regnum], 2));
write_register (HARD_PC_REGNUM, frame->extra_info->return_pc);
- sp = fp + frame->extra_info->size;
+ sp = (fp + frame->extra_info->size + 2) & 0x0ffff;
write_register (HARD_SP_REGNUM, sp);
}
flush_cached_frames ();
}
+\f
+/* 68HC11 & 68HC12 prologue analysis.
+
+ */
+#define MAX_CODES 12
+
+/* 68HC11 opcodes. */
+#undef M6811_OP_PAGE2
+#define M6811_OP_PAGE2 (0x18)
+#define M6811_OP_LDX (0xde)
+#define M6811_OP_PSHX (0x3c)
+#define M6811_OP_STS (0x9f)
+#define M6811_OP_TSX (0x30)
+#define M6811_OP_XGDX (0x8f)
+#define M6811_OP_ADDD (0xc3)
+#define M6811_OP_TXS (0x35)
+#define M6811_OP_DES (0x34)
+
+/* 68HC12 opcodes. */
+#define M6812_OP_PAGE2 (0x18)
+#define M6812_OP_MOVW (0x01)
+#define M6812_PB_PSHW (0xae)
+#define M6812_OP_STS (0x7f)
+#define M6812_OP_LEAS (0x1b)
+#define M6812_OP_PSHX (0x34)
+#define M6812_OP_PSHY (0x35)
+
+/* Operand extraction. */
+#define OP_DIRECT (0x100) /* 8-byte direct addressing. */
+#define OP_IMM_LOW (0x200) /* Low part of 16-bit constant/address. */
+#define OP_IMM_HIGH (0x300) /* High part of 16-bit constant/address. */
+#define OP_PBYTE (0x400) /* 68HC12 indexed operand. */
+
+/* Identification of the sequence. */
+enum m6811_seq_type
+{
+ P_LAST = 0,
+ P_SAVE_REG, /* Save a register on the stack. */
+ P_SET_FRAME, /* Setup the frame pointer. */
+ P_LOCAL_1, /* Allocate 1 byte for locals. */
+ P_LOCAL_2, /* Allocate 2 bytes for locals. */
+ P_LOCAL_N /* Allocate N bytes for locals. */
+};
+
+struct insn_sequence {
+ enum m6811_seq_type type;
+ unsigned length;
+ unsigned short code[MAX_CODES];
+};
+
+/* Sequence of instructions in the 68HC11 function prologue. */
+static struct insn_sequence m6811_prologue[] = {
+ /* Sequences to save a soft-register. */
+ { P_SAVE_REG, 3, { M6811_OP_LDX, OP_DIRECT,
+ M6811_OP_PSHX } },
+ { P_SAVE_REG, 5, { M6811_OP_PAGE2, M6811_OP_LDX, OP_DIRECT,
+ M6811_OP_PAGE2, M6811_OP_PSHX } },
+
+ /* Sequences to allocate local variables. */
+ { P_LOCAL_N, 7, { M6811_OP_TSX,
+ M6811_OP_XGDX,
+ M6811_OP_ADDD, OP_IMM_HIGH, OP_IMM_LOW,
+ M6811_OP_XGDX,
+ M6811_OP_TXS } },
+ { P_LOCAL_N, 11, { M6811_OP_PAGE2, M6811_OP_TSX,
+ M6811_OP_PAGE2, M6811_OP_XGDX,
+ M6811_OP_ADDD, OP_IMM_HIGH, OP_IMM_LOW,
+ M6811_OP_PAGE2, M6811_OP_XGDX,
+ M6811_OP_PAGE2, M6811_OP_TXS } },
+ { P_LOCAL_1, 1, { M6811_OP_DES } },
+ { P_LOCAL_2, 1, { M6811_OP_PSHX } },
+ { P_LOCAL_2, 2, { M6811_OP_PAGE2, M6811_OP_PSHX } },
+
+ /* Initialize the frame pointer. */
+ { P_SET_FRAME, 2, { M6811_OP_STS, OP_DIRECT } },
+ { P_LAST, 0, { 0 } }
+};
+
+
+/* Sequence of instructions in the 68HC12 function prologue. */
+static struct insn_sequence m6812_prologue[] = {
+ { P_SAVE_REG, 5, { M6812_OP_PAGE2, M6812_OP_MOVW, M6812_PB_PSHW,
+ OP_IMM_HIGH, OP_IMM_LOW } },
+ { P_SET_FRAME, 3, { M6812_OP_STS, OP_IMM_HIGH, OP_IMM_LOW } },
+ { P_LOCAL_N, 2, { M6812_OP_LEAS, OP_PBYTE } },
+ { P_LOCAL_2, 1, { M6812_OP_PSHX } },
+ { P_LOCAL_2, 1, { M6812_OP_PSHY } },
+ { P_LAST, 0 }
+};
+
+
+/* Analyze the sequence of instructions starting at the given address.
+ Returns a pointer to the sequence when it is recognized and
+ the optional value (constant/address) associated with it.
+ Advance the pc for the next sequence. */
+static struct insn_sequence *
+m68hc11_analyze_instruction (struct insn_sequence *seq, CORE_ADDR *pc,
+ CORE_ADDR *val)
+{
+ unsigned char buffer[MAX_CODES];
+ unsigned bufsize;
+ unsigned j;
+ CORE_ADDR cur_val;
+ short v = 0;
+
+ bufsize = 0;
+ for (; seq->type != P_LAST; seq++)
+ {
+ cur_val = 0;
+ for (j = 0; j < seq->length; j++)
+ {
+ if (bufsize < j + 1)
+ {
+ buffer[bufsize] = read_memory_unsigned_integer (*pc + bufsize,
+ 1);
+ bufsize++;
+ }
+ /* Continue while we match the opcode. */
+ if (seq->code[j] == buffer[j])
+ continue;
+
+ if ((seq->code[j] & 0xf00) == 0)
+ break;
+
+ /* Extract a sequence parameter (address or constant). */
+ switch (seq->code[j])
+ {
+ case OP_DIRECT:
+ cur_val = (CORE_ADDR) buffer[j];
+ break;
+
+ case OP_IMM_HIGH:
+ cur_val = cur_val & 0x0ff;
+ cur_val |= (buffer[j] << 8);
+ break;
+
+ case OP_IMM_LOW:
+ cur_val &= 0x0ff00;
+ cur_val |= buffer[j];
+ break;
+
+ case OP_PBYTE:
+ if ((buffer[j] & 0xE0) == 0x80)
+ {
+ v = buffer[j] & 0x1f;
+ if (v & 0x10)
+ v |= 0xfff0;
+ }
+ else if ((buffer[j] & 0xfe) == 0xf0)
+ {
+ v = read_memory_unsigned_integer (*pc + j + 1, 1);
+ if (buffer[j] & 1)
+ v |= 0xff00;
+ *pc = *pc + 1;
+ }
+ else if (buffer[j] == 0xf2)
+ {
+ v = read_memory_unsigned_integer (*pc + j + 1, 2);
+ *pc = *pc + 2;
+ }
+ cur_val = v;
+ break;
+ }
+ }
+
+ /* We have a full match. */
+ if (j == seq->length)
+ {
+ *val = cur_val;
+ *pc = *pc + j;
+ return seq;
+ }
+ }
+ return 0;
+}
+
+/* Return the instruction that the function at the PC is using. */
+static enum insn_return_kind
+m68hc11_get_return_insn (CORE_ADDR pc)
+{
+ struct minimal_symbol *sym;
+
+ /* A flag indicating that this is a STO_M68HC12_FAR or STO_M68HC12_INTERRUPT
+ function is stored by elfread.c in the high bit of the info field.
+ Use this to decide which instruction the function uses to return. */
+ sym = lookup_minimal_symbol_by_pc (pc);
+ if (sym == 0)
+ return RETURN_RTS;
+
+ if (MSYMBOL_IS_RTC (sym))
+ return RETURN_RTC;
+ else if (MSYMBOL_IS_RTI (sym))
+ return RETURN_RTI;
+ else
+ return RETURN_RTS;
+}
+
+
/* Analyze the function prologue to find some information
about the function:
- the PC of the first line (for m68hc11_skip_prologue)
{
CORE_ADDR save_addr;
CORE_ADDR func_end;
- unsigned char op0, op1, op2;
- int add_sp_mode;
- int sp_adjust = 0;
int size;
int found_frame_point;
int saved_reg;
CORE_ADDR first_pc;
+ int done = 0;
+ struct insn_sequence *seq_table;
first_pc = get_pc_function_start (pc);
size = 0;
return;
}
-#define OP_PAGE2 (0x18)
-#define OP_LDX (0xde)
-#define OP_LDY (0xde)
-#define OP_PSHX (0x3c)
-#define OP_PSHY (0x3c)
-#define OP_STS (0x9f)
-#define OP_TSX (0x30)
-#define OP_TSY (0x30)
-#define OP_XGDX (0x8f)
-#define OP_XGDY (0x8f)
-#define OP_ADDD (0xc3)
-#define OP_TXS (0x35)
-#define OP_TYS (0x35)
-
+ seq_table = gdbarch_tdep (current_gdbarch)->prologue;
+
/* The 68hc11 stack is as follows:
*/
pc = first_pc;
func_end = pc + 128;
- add_sp_mode = 0;
found_frame_point = 0;
- while (pc + 2 < func_end)
+ *frame_offset = 0;
+ save_addr = fp + STACK_CORRECTION;
+ while (!done && pc + 2 < func_end)
{
- op0 = read_memory_unsigned_integer (pc, 1);
- op1 = read_memory_unsigned_integer (pc + 1, 1);
- op2 = read_memory_unsigned_integer (pc + 2, 1);
+ struct insn_sequence *seq;
+ CORE_ADDR val;
- /* ldx *frame */
- if (op0 == OP_LDX && op1 == M68HC11_FP_ADDR)
- {
- pc += 2;
- }
-
- /* ldy *frame */
- else if (op0 == OP_PAGE2 && op1 == OP_LDY
- && op2 == M68HC11_FP_ADDR)
- {
- pc += 3;
- }
+ seq = m68hc11_analyze_instruction (seq_table, &pc, &val);
+ if (seq == 0)
+ break;
- /* pshx */
- else if (op0 == OP_PSHX)
+ if (seq->type == P_SAVE_REG)
{
- pc += 1;
- size += 2;
- }
+ if (found_frame_point)
+ {
+ saved_reg = m68hc11_which_soft_register (val);
+ if (saved_reg < 0)
+ break;
- /* pshy */
- else if (op0 == OP_PAGE2 && op1 == OP_PSHX)
- {
- pc += 2;
- size += 2;
+ save_addr -= 2;
+ if (pushed_regs)
+ pushed_regs[saved_reg] = save_addr;
+ }
+ else
+ {
+ size += 2;
+ }
}
-
- /* sts *frame */
- else if (op0 == OP_STS && op1 == M68HC11_FP_ADDR)
+ else if (seq->type == P_SET_FRAME)
{
found_frame_point = 1;
- pc += 2;
- break;
- }
- else if (op0 == OP_TSX && op1 == OP_XGDX)
- {
- add_sp_mode = 1;
- pc += 2;
- }
- else if (op0 == OP_PAGE2 && op1 == OP_TSY && op2 == OP_PAGE2)
- {
- op0 = read_memory_unsigned_integer (pc + 3, 1);
- if (op0 != OP_XGDY)
- break;
-
- add_sp_mode = 2;
- pc += 4;
- }
- else if (add_sp_mode && op0 == OP_ADDD)
- {
- sp_adjust = read_memory_unsigned_integer (pc + 1, 2);
- if (sp_adjust & 0x8000)
- sp_adjust |= 0xffff0000L;
-
- sp_adjust = -sp_adjust;
- add_sp_mode |= 4;
- pc += 3;
- }
- else if (add_sp_mode == (1 | 4) && op0 == OP_XGDX
- && op1 == OP_TXS)
- {
- size += sp_adjust;
- pc += 2;
- add_sp_mode = 0;
+ *frame_offset = size;
}
- else if (add_sp_mode == (2 | 4) && op0 == OP_PAGE2
- && op1 == OP_XGDY && op2 == OP_PAGE2)
+ else if (seq->type == P_LOCAL_1)
{
- op0 = read_memory_unsigned_integer (pc + 3, 1);
- if (op0 != OP_TYS)
- break;
-
- size += sp_adjust;
- pc += 4;
- add_sp_mode = 0;
+ size += 1;
}
- else
+ else if (seq->type == P_LOCAL_2)
{
- break;
- }
- }
-
- if (found_frame_point == 0)
- {
- *frame_offset = 0;
- }
- else
- {
- *frame_offset = size;
- }
-
- /* Now, look forward to see how many registers are pushed on the stack.
- We look only for soft registers so there must be a first LDX *REG
- before a PSHX. */
- saved_reg = -1;
- save_addr = fp;
- while (pc + 2 < func_end)
- {
- op0 = read_memory_unsigned_integer (pc, 1);
- op1 = read_memory_unsigned_integer (pc + 1, 1);
- op2 = read_memory_unsigned_integer (pc + 2, 1);
- if (op0 == OP_LDX)
- {
- saved_reg = m68hc11_which_soft_register (op1);
- if (saved_reg < 0 || saved_reg == SOFT_FP_REGNUM)
- break;
-
- pc += 2;
- }
- else if (op0 == OP_PAGE2 && op1 == OP_LDY)
- {
- saved_reg = m68hc11_which_soft_register (op2);
- if (saved_reg < 0 || saved_reg == SOFT_FP_REGNUM)
- break;
-
- pc += 3;
- }
- else if (op0 == OP_PSHX)
- {
- /* If there was no load, this is a push for a function call. */
- if (saved_reg < 0 || saved_reg >= M68HC11_ALL_REGS)
- break;
-
- /* Keep track of the address where that register is saved
- on the stack. */
- save_addr -= 2;
- if (pushed_regs)
- pushed_regs[saved_reg] = save_addr;
-
- pc += 1;
- saved_reg = -1;
+ size += 2;
}
- else if (op0 == OP_PAGE2 && op1 == OP_PSHY)
+ else if (seq->type == P_LOCAL_N)
{
- if (saved_reg < 0 || saved_reg >= M68HC11_ALL_REGS)
- break;
-
- /* Keep track of the address where that register is saved
- on the stack. */
- save_addr -= 2;
- if (pushed_regs)
- pushed_regs[saved_reg] = save_addr;
-
- pc += 2;
- saved_reg = -1;
- }
- else
- {
- break;
+ /* Stack pointer is decremented for the allocation. */
+ if (val & 0x8000)
+ size -= (int) (val) | 0xffff0000;
+ else
+ size -= val;
}
}
*first_line = pc;
{
CORE_ADDR addr;
+ if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
+ return frame->frame; /* dummy frame same as caller's frame */
+
if (frame->extra_info->return_pc == 0
|| inside_entry_file (frame->extra_info->return_pc))
return (CORE_ADDR) 0;
return (CORE_ADDR) 0;
}
- addr = frame->frame + frame->extra_info->size + 1 - 2;
+ addr = frame->frame + frame->extra_info->size + STACK_CORRECTION - 2;
addr = read_memory_unsigned_integer (addr, 2) & 0x0FFFF;
- if (addr == 0)
- {
- return (CORE_ADDR) 0;
- }
-
return addr;
}
m68hc11_frame_init_saved_regs (struct frame_info *fi)
{
CORE_ADDR pc;
+ CORE_ADDR addr;
if (fi->saved_regs == NULL)
frame_saved_regs_zalloc (fi);
memset (fi->saved_regs, 0, sizeof (fi->saved_regs));
pc = fi->pc;
+ fi->extra_info->return_kind = m68hc11_get_return_insn (pc);
m68hc11_guess_from_prologue (pc, fi->frame, &pc, &fi->extra_info->size,
fi->saved_regs);
- fi->saved_regs[SOFT_FP_REGNUM] = fi->frame + fi->extra_info->size + 1 - 2;
- fi->saved_regs[HARD_SP_REGNUM] = fi->frame + fi->extra_info->size + 1;
+ addr = fi->frame + fi->extra_info->size + STACK_CORRECTION;
+ if (soft_regs[SOFT_FP_REGNUM].name)
+ fi->saved_regs[SOFT_FP_REGNUM] = addr - 2;
+
+ /* Take into account how the function was called/returns. */
+ if (fi->extra_info->return_kind == RETURN_RTC)
+ {
+ fi->saved_regs[HARD_PAGE_REGNUM] = addr;
+ addr++;
+ }
+ else if (fi->extra_info->return_kind == RETURN_RTI)
+ {
+ fi->saved_regs[HARD_CCR_REGNUM] = addr;
+ fi->saved_regs[HARD_D_REGNUM] = addr + 1;
+ fi->saved_regs[HARD_X_REGNUM] = addr + 3;
+ fi->saved_regs[HARD_Y_REGNUM] = addr + 5;
+ addr += 7;
+ }
+ fi->saved_regs[HARD_SP_REGNUM] = addr;
fi->saved_regs[HARD_PC_REGNUM] = fi->saved_regs[HARD_SP_REGNUM];
}
if (fromleaf)
{
+ fi->extra_info->return_kind = m68hc11_get_return_insn (fi->pc);
fi->extra_info->return_pc = m68hc11_saved_pc_after_call (fi);
}
else
{
- addr = fi->frame + fi->extra_info->size + 1;
+ addr = fi->saved_regs[HARD_PC_REGNUM];
addr = read_memory_unsigned_integer (addr, 2) & 0x0ffff;
+
+ /* Take into account the 68HC12 specific call (PC + page). */
+ if (fi->extra_info->return_kind == RETURN_RTC
+ && addr >= 0x08000 && addr < 0x0c000
+ && USE_PAGE_REGISTER)
+ {
+ CORE_ADDR page_addr = fi->saved_regs[HARD_PAGE_REGNUM];
+
+ unsigned page = read_memory_unsigned_integer (page_addr, 1);
+ addr -= 0x08000;
+ addr += ((page & 0x0ff) << 14);
+ addr += 0x1000000;
+ }
fi->extra_info->return_pc = addr;
-#if 0
- printf ("Pc@0x%04x, FR 0x%04x, size %d, read ret @0x%04x -> 0x%04x\n",
- fi->pc,
- fi->frame, fi->size,
- addr & 0x0ffff,
- fi->return_pc);
-#endif
}
}
ccr & M6811_V_BIT ? 'V' : '-',
ccr & M6811_C_BIT ? 'C' : '-');
- printf_filtered ("D=%04x IX=%04x IY=%04x\n",
+ printf_filtered ("D=%04x IX=%04x IY=%04x",
(int) read_register (HARD_D_REGNUM),
(int) read_register (HARD_X_REGNUM),
(int) read_register (HARD_Y_REGNUM));
+ if (USE_PAGE_REGISTER)
+ {
+ printf_filtered (" Page=%02x",
+ (int) read_register (HARD_PAGE_REGNUM));
+ }
+ printf_filtered ("\n");
+
nr = 0;
for (i = SOFT_D1_REGNUM; i < M68HC11_ALL_REGS; i++)
{
printf_filtered ("\n");
}
+static CORE_ADDR
+m68hc11_stack_align (CORE_ADDR addr)
+{
+ return ((addr + 1) & -2);
+}
+
static CORE_ADDR
m68hc11_push_arguments (int nargs,
- value_ptr *args,
+ struct value **args,
CORE_ADDR sp,
int struct_return,
CORE_ADDR struct_addr)
first_stack_argnum = 0;
if (struct_return)
{
- write_register (HARD_D_REGNUM, struct_addr);
+ /* The struct is allocated on the stack and gdb used the stack
+ pointer for the address of that struct. We must apply the
+ stack offset on the address. */
+ write_register (HARD_D_REGNUM, struct_addr + STACK_CORRECTION);
}
else if (nargs > 0)
{
for (argnum = first_stack_argnum; argnum < nargs; argnum++)
{
type = VALUE_TYPE (args[argnum]);
- stack_alloc += (TYPE_LENGTH (type) + 1) & ~2;
+ stack_alloc += (TYPE_LENGTH (type) + 1) & -2;
}
sp -= stack_alloc;
- stack_offset = 1;
+ stack_offset = STACK_CORRECTION;
for (argnum = first_stack_argnum; argnum < nargs; argnum++)
{
type = VALUE_TYPE (args[argnum]);
val = (char*) VALUE_CONTENTS (args[argnum]);
write_memory (sp + stack_offset, val, len);
stack_offset += len;
+ if (len & 1)
+ {
+ static char zero = 0;
+
+ write_memory (sp + stack_offset, &zero, 1);
+ stack_offset++;
+ }
}
return sp;
}
CORE_ADDR
m68hc11_call_dummy_address (void)
{
- return (CORE_ADDR) read_register (HARD_PC_REGNUM);
+ return entry_point_address ();
}
static struct type *
m68hc11_register_virtual_type (int reg_nr)
{
- return builtin_type_uint16;
+ switch (reg_nr)
+ {
+ case HARD_PAGE_REGNUM:
+ case HARD_A_REGNUM:
+ case HARD_B_REGNUM:
+ case HARD_CCR_REGNUM:
+ return builtin_type_uint8;
+
+ case M68HC12_HARD_PC_REGNUM:
+ return builtin_type_uint32;
+
+ default:
+ return builtin_type_uint16;
+ }
}
static void
m68hc11_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
{
- write_register (HARD_D_REGNUM, addr);
+ /* The struct address computed by gdb is on the stack.
+ It uses the stack pointer so we must apply the stack
+ correction offset. */
+ write_register (HARD_D_REGNUM, addr + STACK_CORRECTION);
}
static void
m68hc11_store_return_value (struct type *type, char *valbuf)
{
- write_register_bytes (REGISTER_BYTE (HARD_D_REGNUM),
- valbuf, TYPE_LENGTH (type));
+ int len;
+
+ len = TYPE_LENGTH (type);
+
+ /* First argument is passed in D and X registers. */
+ if (len <= 4)
+ {
+ LONGEST v = extract_unsigned_integer (valbuf, len);
+
+ write_register (HARD_D_REGNUM, v);
+ if (len > 2)
+ {
+ v >>= 16;
+ write_register (HARD_X_REGNUM, v);
+ }
+ }
+ else
+ error ("return of value > 4 is not supported.");
}
{
int len = TYPE_LENGTH (type);
- if (len <= 2)
- {
- memcpy (valbuf, ®buf[2], len);
- }
- else if (len <= 4)
- {
- memcpy (valbuf, regbuf, len);
- }
- else
+ switch (len)
{
+ case 1:
+ memcpy (valbuf, ®buf[HARD_D_REGNUM * 2 + 1], len);
+ break;
+
+ case 2:
+ memcpy (valbuf, ®buf[HARD_D_REGNUM * 2], len);
+ break;
+
+ case 3:
+ memcpy (&valbuf[0], ®buf[HARD_X_REGNUM * 2 + 1], 1);
+ memcpy (&valbuf[1], ®buf[HARD_D_REGNUM * 2], 2);
+ break;
+
+ case 4:
+ memcpy (&valbuf[0], ®buf[HARD_X_REGNUM * 2], 2);
+ memcpy (&valbuf[2], ®buf[HARD_D_REGNUM * 2], 2);
+ break;
+
+ default:
error ("bad size for return value");
}
}
static int
m68hc11_use_struct_convention (int gcc_p, struct type *type)
{
- return (TYPE_LENGTH (type) > 4);
+ return (TYPE_CODE (type) == TYPE_CODE_STRUCT
+ || TYPE_CODE (type) == TYPE_CODE_UNION
+ || TYPE_LENGTH (type) > 4);
}
static int
m68hc11_return_value_on_stack (struct type *type)
{
- return m68hc11_use_struct_convention (1, type);
+ return TYPE_LENGTH (type) > 4;
}
/* Extract from an array REGBUF containing the (raw) register state
{
char valbuf[2];
- pc = read_register (HARD_PC_REGNUM);
+ pc = CALL_DUMMY_ADDRESS ();
sp -= 2;
store_unsigned_integer (valbuf, 2, pc);
- write_memory (sp + 1, valbuf, 2);
-#if 0
- write_register (HARD_PC_REGNUM, CALL_DUMMY_ADDRESS ());
-#endif
+ write_memory (sp + STACK_CORRECTION, valbuf, 2);
return sp;
}
static int
m68hc11_register_raw_size (int reg_nr)
{
- return M68HC11_REG_SIZE;
+ switch (reg_nr)
+ {
+ case HARD_PAGE_REGNUM:
+ case HARD_A_REGNUM:
+ case HARD_B_REGNUM:
+ case HARD_CCR_REGNUM:
+ return 1;
+
+ case M68HC12_HARD_PC_REGNUM:
+ return 4;
+
+ default:
+ return M68HC11_REG_SIZE;
+ }
+}
+
+/* Test whether the ELF symbol corresponds to a function using rtc or
+ rti to return. */
+
+static void
+m68hc11_elf_make_msymbol_special (asymbol *sym, struct minimal_symbol *msym)
+{
+ unsigned char flags;
+
+ flags = ((elf_symbol_type *)sym)->internal_elf_sym.st_other;
+ if (flags & STO_M68HC12_FAR)
+ MSYMBOL_SET_RTC (msym);
+ if (flags & STO_M68HC12_INTERRUPT)
+ MSYMBOL_SET_RTI (msym);
+}
+
+static int
+gdb_print_insn_m68hc11 (bfd_vma memaddr, disassemble_info *info)
+{
+ if (TARGET_ARCHITECTURE->arch == bfd_arch_m68hc11)
+ return print_insn_m68hc11 (memaddr, info);
+ else
+ return print_insn_m68hc12 (memaddr, info);
}
static struct gdbarch *
struct gdbarch_tdep *tdep;
int elf_flags;
- /* Extract the elf_flags if available */
- elf_flags = 0;
-
soft_reg_initialized = 0;
-
+
+ /* Extract the elf_flags if available. */
+ if (info.abfd != NULL
+ && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
+ elf_flags = elf_elfheader (info.abfd)->e_flags;
+ else
+ elf_flags = 0;
+
/* try to find a pre-existing architecture */
for (arches = gdbarch_list_lookup_by_info (arches, &info);
arches != NULL;
arches = gdbarch_list_lookup_by_info (arches->next, &info))
{
- /* MIPS needs to be pedantic about which ABI the object is
- using. */
- if (gdbarch_tdep (current_gdbarch)->elf_flags != elf_flags)
+ if (gdbarch_tdep (arches->gdbarch)->elf_flags != elf_flags)
continue;
+
return arches->gdbarch;
}
gdbarch = gdbarch_alloc (&info, tdep);
tdep->elf_flags = elf_flags;
- /* Initially set everything according to the ABI. */
+ switch (info.bfd_arch_info->arch)
+ {
+ case bfd_arch_m68hc11:
+ tdep->stack_correction = 1;
+ tdep->use_page_register = 0;
+ tdep->prologue = m6811_prologue;
+ set_gdbarch_addr_bit (gdbarch, 16);
+ set_gdbarch_num_pseudo_regs (gdbarch, M68HC11_NUM_PSEUDO_REGS);
+ set_gdbarch_pc_regnum (gdbarch, HARD_PC_REGNUM);
+ set_gdbarch_num_regs (gdbarch, M68HC11_NUM_REGS);
+ break;
+
+ case bfd_arch_m68hc12:
+ tdep->stack_correction = 0;
+ tdep->use_page_register = elf_flags & E_M68HC12_BANKS;
+ tdep->prologue = m6812_prologue;
+ set_gdbarch_addr_bit (gdbarch, elf_flags & E_M68HC12_BANKS ? 32 : 16);
+ set_gdbarch_num_pseudo_regs (gdbarch,
+ elf_flags & E_M68HC12_BANKS
+ ? M68HC12_NUM_PSEUDO_REGS
+ : M68HC11_NUM_PSEUDO_REGS);
+ set_gdbarch_pc_regnum (gdbarch, elf_flags & E_M68HC12_BANKS
+ ? M68HC12_HARD_PC_REGNUM : HARD_PC_REGNUM);
+ set_gdbarch_num_regs (gdbarch, elf_flags & E_M68HC12_BANKS
+ ? M68HC12_NUM_REGS : M68HC11_NUM_REGS);
+ break;
+
+ default:
+ break;
+ }
+
+ /* Initially set everything according to the ABI.
+ Use 16-bit integers since it will be the case for most
+ programs. The size of these types should normally be set
+ according to the dwarf2 debug information. */
set_gdbarch_short_bit (gdbarch, 16);
- set_gdbarch_int_bit (gdbarch, 32);
+ set_gdbarch_int_bit (gdbarch, elf_flags & E_M68HC11_I32 ? 32 : 16);
set_gdbarch_float_bit (gdbarch, 32);
- set_gdbarch_double_bit (gdbarch, 64);
- set_gdbarch_long_double_bit (gdbarch, 64);
+ set_gdbarch_double_bit (gdbarch, elf_flags & E_M68HC11_F64 ? 64 : 32);
+ set_gdbarch_long_double_bit (gdbarch, elf_flags & E_M68HC11_F64 ? 64 : 32);
set_gdbarch_long_bit (gdbarch, 32);
set_gdbarch_ptr_bit (gdbarch, 16);
set_gdbarch_long_long_bit (gdbarch, 64);
set_gdbarch_read_pc (gdbarch, generic_target_read_pc);
set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
set_gdbarch_read_fp (gdbarch, generic_target_read_fp);
- set_gdbarch_write_fp (gdbarch, generic_target_write_fp);
set_gdbarch_read_sp (gdbarch, generic_target_read_sp);
set_gdbarch_write_sp (gdbarch, generic_target_write_sp);
- set_gdbarch_num_regs (gdbarch, M68HC11_NUM_REGS);
- set_gdbarch_num_pseudo_regs (gdbarch, M68HC11_NUM_PSEUDO_REGS);
set_gdbarch_sp_regnum (gdbarch, HARD_SP_REGNUM);
set_gdbarch_fp_regnum (gdbarch, SOFT_FP_REGNUM);
- set_gdbarch_pc_regnum (gdbarch, HARD_PC_REGNUM);
set_gdbarch_register_name (gdbarch, m68hc11_register_name);
set_gdbarch_register_size (gdbarch, 2);
set_gdbarch_register_bytes (gdbarch, M68HC11_ALL_REGS * 2);
set_gdbarch_register_virtual_type (gdbarch, m68hc11_register_virtual_type);
- set_gdbarch_fetch_pseudo_register (gdbarch, m68hc11_fetch_pseudo_register);
- set_gdbarch_store_pseudo_register (gdbarch, m68hc11_store_pseudo_register);
+ set_gdbarch_pseudo_register_read (gdbarch, m68hc11_pseudo_register_read);
+ set_gdbarch_pseudo_register_write (gdbarch, m68hc11_pseudo_register_write);
set_gdbarch_use_generic_dummy_frames (gdbarch, 1);
set_gdbarch_call_dummy_length (gdbarch, 0);
set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
set_gdbarch_get_saved_register (gdbarch, generic_get_saved_register);
set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
- set_gdbarch_extract_return_value (gdbarch, m68hc11_extract_return_value);
+ set_gdbarch_deprecated_extract_return_value (gdbarch, m68hc11_extract_return_value);
set_gdbarch_push_arguments (gdbarch, m68hc11_push_arguments);
set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
set_gdbarch_push_return_address (gdbarch, m68hc11_push_return_address);
set_gdbarch_store_struct_return (gdbarch, m68hc11_store_struct_return);
set_gdbarch_store_return_value (gdbarch, m68hc11_store_return_value);
- set_gdbarch_extract_struct_value_address (gdbarch,
- m68hc11_extract_struct_value_address);
+ set_gdbarch_deprecated_extract_struct_value_address (gdbarch, m68hc11_extract_struct_value_address);
set_gdbarch_register_convertible (gdbarch, generic_register_convertible_not);
set_gdbarch_store_struct_return (gdbarch, m68hc11_store_struct_return);
set_gdbarch_store_return_value (gdbarch, m68hc11_store_return_value);
- set_gdbarch_extract_struct_value_address
+ set_gdbarch_deprecated_extract_struct_value_address
(gdbarch, m68hc11_extract_struct_value_address);
set_gdbarch_use_struct_convention (gdbarch, m68hc11_use_struct_convention);
set_gdbarch_init_extra_frame_info (gdbarch, m68hc11_init_extra_frame_info);
set_gdbarch_decr_pc_after_break (gdbarch, 0);
set_gdbarch_function_start_offset (gdbarch, 0);
set_gdbarch_breakpoint_from_pc (gdbarch, m68hc11_breakpoint_from_pc);
+ set_gdbarch_stack_align (gdbarch, m68hc11_stack_align);
+ set_gdbarch_print_insn (gdbarch, gdb_print_insn_m68hc11);
+
+ /* Minsymbol frobbing. */
+ set_gdbarch_elf_make_msymbol_special (gdbarch,
+ m68hc11_elf_make_msymbol_special);
set_gdbarch_believe_pcc_promotion (gdbarch, 1);
- set_gdbarch_ieee_float (gdbarch, 1);
return gdbarch;
}
_initialize_m68hc11_tdep (void)
{
register_gdbarch_init (bfd_arch_m68hc11, m68hc11_gdbarch_init);
- if (!tm_print_insn) /* Someone may have already set it */
- tm_print_insn = print_insn_m68hc11;
+ register_gdbarch_init (bfd_arch_m68hc12, m68hc11_gdbarch_init);
add_com ("regs", class_vars, show_regs, "Print all registers");
}
projects / deliverable / binutils-gdb.git / blobdiff