/* Target-dependent code for GNU/Linux on MIPS processors.
- Copyright 2001, 2002, 2004 Free Software Foundation, Inc.
+ Copyright (C) 2001, 2002, 2004, 2005 Free Software Foundation, Inc.
This file is part of GDB.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330,
- Boston, MA 02111-1307, USA. */
+ Foundation, Inc., 51 Franklin Street, Fifth Floor,
+ Boston, MA 02110-1301, USA. */
#include "defs.h"
#include "gdbcore.h"
#include "gdb_string.h"
#include "gdb_assert.h"
#include "frame.h"
+#include "regcache.h"
#include "trad-frame.h"
#include "tramp-frame.h"
#define EF_SIZE 180
/* Figure out where the longjmp will land.
- We expect the first arg to be a pointer to the jmp_buf structure from
- which we extract the pc (MIPS_LINUX_JB_PC) that we will land at. The pc
- is copied into PC. This routine returns 1 on success. */
+ We expect the first arg to be a pointer to the jmp_buf structure
+ from which we extract the pc (MIPS_LINUX_JB_PC) that we will land
+ at. The pc is copied into PC. This routine returns 1 on
+ success. */
#define MIPS_LINUX_JB_ELEMENT_SIZE 4
#define MIPS_LINUX_JB_PC 0
CORE_ADDR jb_addr;
char buf[TARGET_PTR_BIT / TARGET_CHAR_BIT];
- jb_addr = read_register (A0_REGNUM);
+ jb_addr = read_register (MIPS_A0_REGNUM);
if (target_read_memory (jb_addr
+ MIPS_LINUX_JB_PC * MIPS_LINUX_JB_ELEMENT_SIZE,
supply_32bit_reg (int regnum, const void *addr)
{
char buf[MAX_REGISTER_SIZE];
- store_signed_integer (buf, DEPRECATED_REGISTER_RAW_SIZE (regnum),
+ store_signed_integer (buf, register_size (current_gdbarch, regnum),
extract_signed_integer (addr, 4));
regcache_raw_supply (current_regcache, regnum, buf);
}
(char *)(regp + EF_CP0_EPC));
supply_32bit_reg (mips_regnum (current_gdbarch)->badvaddr,
(char *)(regp + EF_CP0_BADVADDR));
- supply_32bit_reg (PS_REGNUM, (char *)(regp + EF_CP0_STATUS));
+ supply_32bit_reg (MIPS_PS_REGNUM, (char *)(regp + EF_CP0_STATUS));
supply_32bit_reg (mips_regnum (current_gdbarch)->cause,
(char *)(regp + EF_CP0_CAUSE));
/* Fill inaccessible registers with zero. */
- regcache_raw_supply (current_regcache, UNUSED_REGNUM, zerobuf);
- for (regi = FIRST_EMBED_REGNUM; regi < LAST_EMBED_REGNUM; regi++)
+ regcache_raw_supply (current_regcache, MIPS_UNUSED_REGNUM, zerobuf);
+ for (regi = MIPS_FIRST_EMBED_REGNUM;
+ regi < MIPS_LAST_EMBED_REGNUM;
+ regi++)
regcache_raw_supply (current_regcache, regi, zerobuf);
}
fill_gregset (gregsetp, mips_regnum (current_gdbarch)->hi);
fill_gregset (gregsetp, mips_regnum (current_gdbarch)->pc);
fill_gregset (gregsetp, mips_regnum (current_gdbarch)->badvaddr);
- fill_gregset (gregsetp, PS_REGNUM);
+ fill_gregset (gregsetp, MIPS_PS_REGNUM);
fill_gregset (gregsetp, mips_regnum (current_gdbarch)->cause);
return;
regaddr = EF_CP0_EPC;
else if (regno == mips_regnum (current_gdbarch)->badvaddr)
regaddr = EF_CP0_BADVADDR;
- else if (regno == PS_REGNUM)
+ else if (regno == MIPS_PS_REGNUM)
regaddr = EF_CP0_STATUS;
else if (regno == mips_regnum (current_gdbarch)->cause)
regaddr = EF_CP0_CAUSE;
mips_regnum (current_gdbarch)->fp_control_status,
(char *)(*fpregsetp + 32));
- /* FIXME: how can we supply FCRIR? The ABI doesn't tell us. */
+ /* FIXME: how can we supply FCRIR? The ABI doesn't tell us. */
regcache_raw_supply (current_regcache,
mips_regnum (current_gdbarch)->fp_implementation_revision,
zerobuf);
if ((regno >= FP0_REGNUM) && (regno < FP0_REGNUM + 32))
{
- from = (char *) &deprecated_registers[DEPRECATED_REGISTER_BYTE (regno)];
to = (char *) (*fpregsetp + regno - FP0_REGNUM);
- memcpy (to, from, DEPRECATED_REGISTER_RAW_SIZE (regno - FP0_REGNUM));
+ regcache_raw_collect (current_regcache, regno, to);
}
else if (regno == mips_regnum (current_gdbarch)->fp_control_status)
{
- from = (char *) &deprecated_registers[DEPRECATED_REGISTER_BYTE (regno)];
to = (char *) (*fpregsetp + 32);
- memcpy (to, from, DEPRECATED_REGISTER_RAW_SIZE (regno));
+ regcache_raw_collect (current_regcache, regno, to);
}
else if (regno == -1)
{
for (regi = 0; regi < 32; regi++)
fill_fpregset (fpregsetp, FP0_REGNUM + regi);
- fill_fpregset(fpregsetp, mips_regnum (current_gdbarch)->fp_control_status);
+ fill_fpregset (fpregsetp,
+ mips_regnum (current_gdbarch)->fp_control_status);
}
}
int regaddr;
if (regno < 0 || regno >= NUM_REGS)
- error ("Bogon register number %d.", regno);
+ error (_("Bogon register number %d."), regno);
if (regno < 32)
regaddr = regno;
else if (regno == mips_regnum (current_gdbarch)->fp_implementation_revision)
regaddr = FPC_EIR;
else
- error ("Unknowable register number %d.", regno);
+ error (_("Unknowable register number %d."), regno);
return regaddr;
}
/* Fetch (and possibly build) an appropriate link_map_offsets
- structure for native GNU/Linux MIPS targets using the struct offsets
- defined in link.h (but without actual reference to that file).
+ structure for native GNU/Linux MIPS targets using the struct
+ offsets defined in link.h (but without actual reference to that
+ file).
- This makes it possible to access GNU/Linux MIPS shared libraries from a
- GDB that was built on a different host platform (for cross debugging). */
+ This makes it possible to access GNU/Linux MIPS shared libraries
+ from a GDB that was built on a different host platform (for cross
+ debugging). */
static struct link_map_offsets *
mips_linux_svr4_fetch_link_map_offsets (void)
-{
+{
static struct link_map_offsets lmo;
static struct link_map_offsets *lmp = NULL;
if (lmp == NULL)
- {
+ {
lmp = &lmo;
lmo.r_debug_size = 8; /* The actual size is 20 bytes, but
#define MIPS64_EF_SIZE 304
/* Figure out where the longjmp will land.
- We expect the first arg to be a pointer to the jmp_buf structure from
- which we extract the pc (MIPS_LINUX_JB_PC) that we will land at. The pc
- is copied into PC. This routine returns 1 on success. */
+ We expect the first arg to be a pointer to the jmp_buf structure
+ from which we extract the pc (MIPS_LINUX_JB_PC) that we will land
+ at. The pc is copied into PC. This routine returns 1 on
+ success. */
/* Details about jmp_buf. */
void *buf = alloca (TARGET_PTR_BIT / TARGET_CHAR_BIT);
int element_size = TARGET_PTR_BIT == 32 ? 4 : 8;
- jb_addr = read_register (A0_REGNUM);
+ jb_addr = read_register (MIPS_A0_REGNUM);
if (target_read_memory (jb_addr + MIPS64_LINUX_JB_PC * element_size,
buf, TARGET_PTR_BIT / TARGET_CHAR_BIT))
regcache_raw_supply (current_regcache, (regi - MIPS64_EF_REG0),
(char *)(regp + regi));
- regcache_raw_supply (current_regcache, mips_regnum (current_gdbarch)->lo,
- (char *)(regp + MIPS64_EF_LO));
- regcache_raw_supply (current_regcache, mips_regnum (current_gdbarch)->hi,
- (char *)(regp + MIPS64_EF_HI));
+ regcache_raw_supply (current_regcache,
+ mips_regnum (current_gdbarch)->lo,
+ (char *) (regp + MIPS64_EF_LO));
+ regcache_raw_supply (current_regcache,
+ mips_regnum (current_gdbarch)->hi,
+ (char *) (regp + MIPS64_EF_HI));
- regcache_raw_supply (current_regcache, mips_regnum (current_gdbarch)->pc,
- (char *)(regp + MIPS64_EF_CP0_EPC));
- regcache_raw_supply (current_regcache, mips_regnum (current_gdbarch)->badvaddr,
- (char *)(regp + MIPS64_EF_CP0_BADVADDR));
- regcache_raw_supply (current_regcache, PS_REGNUM,
- (char *)(regp + MIPS64_EF_CP0_STATUS));
- regcache_raw_supply (current_regcache, mips_regnum (current_gdbarch)->cause,
- (char *)(regp + MIPS64_EF_CP0_CAUSE));
+ regcache_raw_supply (current_regcache,
+ mips_regnum (current_gdbarch)->pc,
+ (char *) (regp + MIPS64_EF_CP0_EPC));
+ regcache_raw_supply (current_regcache,
+ mips_regnum (current_gdbarch)->badvaddr,
+ (char *) (regp + MIPS64_EF_CP0_BADVADDR));
+ regcache_raw_supply (current_regcache, MIPS_PS_REGNUM,
+ (char *) (regp + MIPS64_EF_CP0_STATUS));
+ regcache_raw_supply (current_regcache,
+ mips_regnum (current_gdbarch)->cause,
+ (char *) (regp + MIPS64_EF_CP0_CAUSE));
/* Fill inaccessible registers with zero. */
- regcache_raw_supply (current_regcache, UNUSED_REGNUM, zerobuf);
- for (regi = FIRST_EMBED_REGNUM; regi < LAST_EMBED_REGNUM; regi++)
+ regcache_raw_supply (current_regcache, MIPS_UNUSED_REGNUM, zerobuf);
+ for (regi = MIPS_FIRST_EMBED_REGNUM;
+ regi < MIPS_LAST_EMBED_REGNUM;
+ regi++)
regcache_raw_supply (current_regcache, regi, zerobuf);
}
mips64_fill_gregset (gregsetp, mips_regnum (current_gdbarch)->lo);
mips64_fill_gregset (gregsetp, mips_regnum (current_gdbarch)->hi);
mips64_fill_gregset (gregsetp, mips_regnum (current_gdbarch)->pc);
- mips64_fill_gregset (gregsetp, mips_regnum (current_gdbarch)->badvaddr);
- mips64_fill_gregset (gregsetp, PS_REGNUM);
- mips64_fill_gregset (gregsetp, mips_regnum (current_gdbarch)->cause);
+ mips64_fill_gregset (gregsetp,
+ mips_regnum (current_gdbarch)->badvaddr);
+ mips64_fill_gregset (gregsetp, MIPS_PS_REGNUM);
+ mips64_fill_gregset (gregsetp,
+ mips_regnum (current_gdbarch)->cause);
return;
}
regaddr = MIPS64_EF_CP0_EPC;
else if (regno == mips_regnum (current_gdbarch)->badvaddr)
regaddr = MIPS64_EF_CP0_BADVADDR;
- else if (regno == PS_REGNUM)
+ else if (regno == MIPS_PS_REGNUM)
regaddr = MIPS64_EF_CP0_STATUS;
else if (regno == mips_regnum (current_gdbarch)->cause)
regaddr = MIPS64_EF_CP0_CAUSE;
mips_regnum (current_gdbarch)->fp_control_status,
(char *)(*fpregsetp + 32));
- /* FIXME: how can we supply FCRIR? The ABI doesn't tell us. */
+ /* FIXME: how can we supply FCRIR? The ABI doesn't tell us. */
regcache_raw_supply (current_regcache,
mips_regnum (current_gdbarch)->fp_implementation_revision,
zerobuf);
if ((regno >= FP0_REGNUM) && (regno < FP0_REGNUM + 32))
{
- from = (char *) &deprecated_registers[DEPRECATED_REGISTER_BYTE (regno)];
to = (char *) (*fpregsetp + regno - FP0_REGNUM);
- memcpy (to, from, DEPRECATED_REGISTER_RAW_SIZE (regno - FP0_REGNUM));
+ regcache_raw_collect (current_regcache, regno, to);
}
else if (regno == mips_regnum (current_gdbarch)->fp_control_status)
{
- from = (char *) &deprecated_registers[DEPRECATED_REGISTER_BYTE (regno)];
to = (char *) (*fpregsetp + 32);
- memcpy (to, from, DEPRECATED_REGISTER_RAW_SIZE (regno));
+ regcache_raw_collect (current_regcache, regno, to);
}
else if (regno == -1)
{
int regaddr;
if (regno < 0 || regno >= NUM_REGS)
- error ("Bogon register number %d.", regno);
+ error (_("Bogon register number %d."), regno);
if (regno < 32)
regaddr = regno;
else if (regno == mips_regnum (current_gdbarch)->fp_implementation_revision)
regaddr = MIPS64_FPC_EIR;
else
- error ("Unknowable register number %d.", regno);
+ error (_("Unknowable register number %d."), regno);
return regaddr;
}
}
else
{
- warning ("wrong size gregset struct in core file");
+ warning (_("wrong size gregset struct in core file"));
}
}
else if (which == 2)
}
else if (core_reg_size == sizeof (fpregset64))
{
- memcpy ((char *) &fpregset64, core_reg_sect, sizeof (fpregset64));
+ memcpy ((char *) &fpregset64, core_reg_sect,
+ sizeof (fpregset64));
mips64_supply_fpregset (&fpregset64);
}
else
{
- warning ("wrong size fpregset struct in core file");
+ warning (_("wrong size fpregset struct in core file"));
}
}
}
};
/* Fetch (and possibly build) an appropriate link_map_offsets
- structure for native GNU/Linux MIPS targets using the struct offsets
- defined in link.h (but without actual reference to that file).
+ structure for native GNU/Linux MIPS targets using the struct
+ offsets defined in link.h (but without actual reference to that
+ file).
- This makes it possible to access GNU/Linux MIPS shared libraries from a
- GDB that was built on a different host platform (for cross debugging). */
+ This makes it possible to access GNU/Linux MIPS shared libraries
+ from a GDB that was built on a different host platform (for cross
+ debugging). */
static struct link_map_offsets *
mips64_linux_svr4_fetch_link_map_offsets (void)
-{
+{
static struct link_map_offsets lmo;
static struct link_map_offsets *lmp = NULL;
if (lmp == NULL)
- {
+ {
lmp = &lmo;
lmo.r_debug_size = 16; /* The actual size is 40 bytes, but
return lmp;
}
-/* Handle for obtaining pointer to the current register_addr() function
- for a given architecture. */
+/* Handle for obtaining pointer to the current register_addr()
+ function for a given architecture. */
static struct gdbarch_data *register_addr_data;
CORE_ADDR
static void
set_mips_linux_register_addr (struct gdbarch *gdbarch,
- CORE_ADDR (*register_addr_ptr) (int, CORE_ADDR))
+ CORE_ADDR (*register_addr_ptr) (int,
+ CORE_ADDR))
{
- deprecated_set_gdbarch_data (gdbarch, register_addr_data, register_addr_ptr);
+ deprecated_set_gdbarch_data (gdbarch, register_addr_data,
+ register_addr_ptr);
}
static void *
return 0;
}
-/* Check the code at PC for a dynamic linker lazy resolution stub. Because
- they aren't in the .plt section, we pattern-match on the code generated
- by GNU ld. They look like this:
+/* Check the code at PC for a dynamic linker lazy resolution stub.
+ Because they aren't in the .plt section, we pattern-match on the
+ code generated by GNU ld. They look like this:
lw t9,0x8010(gp)
addu t7,ra
jalr t9,ra
addiu t8,zero,INDEX
- (with the appropriate doubleword instructions for N64). Also return the
- dynamic symbol index used in the last instruction. */
+ (with the appropriate doubleword instructions for N64). Also
+ return the dynamic symbol index used in the last instruction. */
static int
mips_linux_in_dynsym_stub (CORE_ADDR pc, char *name)
if (insn != 0x03e07821)
return 0;
}
-
+
insn = extract_unsigned_integer (p + 8, 4);
/* jalr t9,ra */
if (insn != 0x0320f809)
return (insn & 0xffff);
}
-/* Return non-zero iff PC belongs to the dynamic linker resolution code
- or to a stub. */
+/* Return non-zero iff PC belongs to the dynamic linker resolution
+ code or to a stub. */
int
mips_linux_in_dynsym_resolve_code (CORE_ADDR pc)
{
- /* Check whether PC is in the dynamic linker. This also checks whether
- it is in the .plt section, which MIPS does not use. */
+ /* Check whether PC is in the dynamic linker. This also checks
+ whether it is in the .plt section, which MIPS does not use. */
if (in_solib_dynsym_resolve_code (pc))
return 1;
- /* Pattern match for the stub. It would be nice if there were a more
- efficient way to avoid this check. */
+ /* Pattern match for the stub. It would be nice if there were a
+ more efficient way to avoid this check. */
if (mips_linux_in_dynsym_stub (pc, NULL))
return 1;
resolver = lookup_minimal_symbol ("__dl_runtime_resolve", NULL, NULL);
if (resolver && SYMBOL_VALUE_ADDRESS (resolver) == pc)
- return frame_pc_unwind (get_current_frame ());
+ return frame_pc_unwind (get_current_frame ());
return 0;
-}
+}
/* Signal trampoline support. There are four supported layouts for a
signal frame: o32 sigframe, o32 rt_sigframe, n32 rt_sigframe, and
static const struct tramp_frame mips_linux_n64_rt_sigframe = {
SIGTRAMP_FRAME,
4,
- { MIPS_INST_LI_V0_N64_RT_SIGRETURN, MIPS_INST_SYSCALL, TRAMP_SENTINEL_INSN },
+ { MIPS_INST_LI_V0_N64_RT_SIGRETURN,
+ MIPS_INST_SYSCALL,
+ TRAMP_SENTINEL_INSN },
mips_linux_n32n64_sigframe_init
};
int ireg, reg_position;
CORE_ADDR sigcontext_base = func - SIGFRAME_CODE_OFFSET;
const struct mips_regnum *regs = mips_regnum (current_gdbarch);
+ CORE_ADDR regs_base;
if (self == &mips_linux_o32_sigframe)
sigcontext_base += SIGFRAME_SIGCONTEXT_OFFSET;
else
sigcontext_base += RTSIGFRAME_SIGCONTEXT_OFFSET;
-
- /* I'm not proud of this hack. Eventually we will have the infrastructure
- to indicate the size of saved registers on a per-frame basis, but
- right now we don't; the kernel saves eight bytes but we only want
- four. */
+
+ /* I'm not proud of this hack. Eventually we will have the
+ infrastructure to indicate the size of saved registers on a
+ per-frame basis, but right now we don't; the kernel saves eight
+ bytes but we only want four. Use regs_base to access any
+ 64-bit fields. */
if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
- sigcontext_base += 4;
+ regs_base = sigcontext_base + 4;
+ else
+ regs_base = sigcontext_base;
#if 0
trad_frame_set_reg_addr (this_cache, ORIG_ZERO_REGNUM + NUM_REGS,
- sigcontext_base + SIGCONTEXT_REGS);
+ regs_base + SIGCONTEXT_REGS);
#endif
for (ireg = 1; ireg < 32; ireg++)
- trad_frame_set_reg_addr (this_cache, ireg + ZERO_REGNUM + NUM_REGS,
- sigcontext_base + SIGCONTEXT_REGS
+ trad_frame_set_reg_addr (this_cache,
+ ireg + MIPS_ZERO_REGNUM + NUM_REGS,
+ regs_base + SIGCONTEXT_REGS
+ ireg * SIGCONTEXT_REG_SIZE);
+ /* The way that floating point registers are saved, unfortunately,
+ depends on the architecture the kernel is built for. For the r3000 and
+ tx39, four bytes of each register are at the beginning of each of the
+ 32 eight byte slots. For everything else, the registers are saved
+ using double precision; only the even-numbered slots are initialized,
+ and the high bits are the odd-numbered register. Assume the latter
+ layout, since we can't tell, and it's much more common. Which bits are
+ the "high" bits depends on endianness. */
for (ireg = 0; ireg < 32; ireg++)
- trad_frame_set_reg_addr (this_cache, ireg + regs->fp0 + NUM_REGS,
- sigcontext_base + SIGCONTEXT_FPREGS
- + ireg * SIGCONTEXT_REG_SIZE);
+ if ((TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) != (ireg & 1))
+ trad_frame_set_reg_addr (this_cache, ireg + regs->fp0 + NUM_REGS,
+ sigcontext_base + SIGCONTEXT_FPREGS + 4
+ + (ireg & ~1) * SIGCONTEXT_REG_SIZE);
+ else
+ trad_frame_set_reg_addr (this_cache, ireg + regs->fp0 + NUM_REGS,
+ sigcontext_base + SIGCONTEXT_FPREGS
+ + (ireg & ~1) * SIGCONTEXT_REG_SIZE);
trad_frame_set_reg_addr (this_cache, regs->pc + NUM_REGS,
- sigcontext_base + SIGCONTEXT_PC);
+ regs_base + SIGCONTEXT_PC);
- trad_frame_set_reg_addr (this_cache, regs->fp_control_status + NUM_REGS,
+ trad_frame_set_reg_addr (this_cache,
+ regs->fp_control_status + NUM_REGS,
sigcontext_base + SIGCONTEXT_FPCSR);
trad_frame_set_reg_addr (this_cache, regs->hi + NUM_REGS,
- sigcontext_base + SIGCONTEXT_HI);
+ regs_base + SIGCONTEXT_HI);
trad_frame_set_reg_addr (this_cache, regs->lo + NUM_REGS,
- sigcontext_base + SIGCONTEXT_LO);
+ regs_base + SIGCONTEXT_LO);
trad_frame_set_reg_addr (this_cache, regs->cause + NUM_REGS,
sigcontext_base + SIGCONTEXT_CAUSE);
trad_frame_set_reg_addr (this_cache, regs->badvaddr + NUM_REGS,
/* Choice of the bottom of the sigframe is somewhat arbitrary. */
trad_frame_set_id (this_cache,
- frame_id_build (func - SIGFRAME_CODE_OFFSET, func));
+ frame_id_build (func - SIGFRAME_CODE_OFFSET,
+ func));
}
/* *INDENT-OFF* */
struct sigcontext uc_mcontext;
sigset_t uc_sigmask; [ mask last for extensibility ]
};
-
+
struct rt_sigframe_n32 {
u32 rs_ass[4]; [ argument save space for o32 ]
u32 rs_code[2]; [ signal trampoline ]
#define N64_SIGCONTEXT_BADVADDR (67 * 8 + 5 * 4)
#define N64_SIGCONTEXT_REG_SIZE 8
-
+
static void
mips_linux_n32n64_sigframe_init (const struct tramp_frame *self,
struct frame_info *next_frame,
sigcontext_base += N32_SIGFRAME_SIGCONTEXT_OFFSET;
else
sigcontext_base += N64_SIGFRAME_SIGCONTEXT_OFFSET;
-
+
#if 0
trad_frame_set_reg_addr (this_cache, ORIG_ZERO_REGNUM + NUM_REGS,
sigcontext_base + N64_SIGCONTEXT_REGS);
#endif
for (ireg = 1; ireg < 32; ireg++)
- trad_frame_set_reg_addr (this_cache, ireg + ZERO_REGNUM + NUM_REGS,
+ trad_frame_set_reg_addr (this_cache,
+ ireg + MIPS_ZERO_REGNUM + NUM_REGS,
sigcontext_base + N64_SIGCONTEXT_REGS
+ ireg * N64_SIGCONTEXT_REG_SIZE);
trad_frame_set_reg_addr (this_cache, regs->pc + NUM_REGS,
sigcontext_base + N64_SIGCONTEXT_PC);
- trad_frame_set_reg_addr (this_cache, regs->fp_control_status + NUM_REGS,
+ trad_frame_set_reg_addr (this_cache,
+ regs->fp_control_status + NUM_REGS,
sigcontext_base + N64_SIGCONTEXT_FPCSR);
trad_frame_set_reg_addr (this_cache, regs->hi + NUM_REGS,
sigcontext_base + N64_SIGCONTEXT_HI);
/* Choice of the bottom of the sigframe is somewhat arbitrary. */
trad_frame_set_id (this_cache,
- frame_id_build (func - SIGFRAME_CODE_OFFSET, func));
+ frame_id_build (func - SIGFRAME_CODE_OFFSET,
+ func));
}
/* Initialize one of the GNU/Linux OS ABIs. */
static void
-mips_linux_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
+mips_linux_init_abi (struct gdbarch_info info,
+ struct gdbarch *gdbarch)
{
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
enum mips_abi abi = mips_abi (gdbarch);
tramp_frame_prepend_unwinder (gdbarch, &mips_linux_n64_rt_sigframe);
break;
default:
- internal_error (__FILE__, __LINE__, "can't handle ABI");
+ internal_error (__FILE__, __LINE__, _("can't handle ABI"));
break;
}
set_gdbarch_skip_solib_resolver (gdbarch, mips_linux_skip_resolver);
- /* This overrides the MIPS16 stub support from mips-tdep. But no
- one uses MIPS16 on GNU/Linux yet, so this isn't much of a loss. */
- set_gdbarch_in_solib_call_trampoline (gdbarch, mips_linux_in_dynsym_stub);
+ set_gdbarch_software_single_step (gdbarch, mips_software_single_step);
+
+ /* Enable TLS support. */
+ set_gdbarch_fetch_tls_load_module_address (gdbarch,
+ svr4_fetch_objfile_link_map);
}
void
arch_info != NULL;
arch_info = arch_info->next)
{
- gdbarch_register_osabi (bfd_arch_mips, arch_info->mach, GDB_OSABI_LINUX,
+ gdbarch_register_osabi (bfd_arch_mips, arch_info->mach,
+ GDB_OSABI_LINUX,
mips_linux_init_abi);
}
projects / deliverable / binutils-gdb.git / blobdiff