/* Target-dependent code for GNU/Linux on MIPS processors.
- Copyright 2001, 2002, 2004 Free Software Foundation, Inc.
+ Copyright (C) 2001, 2002, 2004, 2005, 2006
+ Free Software Foundation, Inc.
This file is part of GDB.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330,
- Boston, MA 02111-1307, USA. */
+ Foundation, Inc., 51 Franklin Street, Fifth Floor,
+ Boston, MA 02110-1301, USA. */
#include "defs.h"
#include "gdbcore.h"
#include "regcache.h"
#include "trad-frame.h"
#include "tramp-frame.h"
-
-/* Copied from <asm/elf.h>. */
-#define ELF_NGREG 45
-#define ELF_NFPREG 33
-
-typedef unsigned char elf_greg_t[4];
-typedef elf_greg_t elf_gregset_t[ELF_NGREG];
-
-typedef unsigned char elf_fpreg_t[8];
-typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
-
-/* 0 - 31 are integer registers, 32 - 63 are fp registers. */
-#define FPR_BASE 32
-#define PC 64
-#define CAUSE 65
-#define BADVADDR 66
-#define MMHI 67
-#define MMLO 68
-#define FPC_CSR 69
-#define FPC_EIR 70
-
-#define EF_REG0 6
-#define EF_REG31 37
-#define EF_LO 38
-#define EF_HI 39
-#define EF_CP0_EPC 40
-#define EF_CP0_BADVADDR 41
-#define EF_CP0_STATUS 42
-#define EF_CP0_CAUSE 43
-
-#define EF_SIZE 180
+#include "floatformat.h"
+#include "solib.h"
+#include "symtab.h"
+#include "mips-linux-tdep.h"
/* Figure out where the longjmp will land.
- We expect the first arg to be a pointer to the jmp_buf structure from
- which we extract the pc (MIPS_LINUX_JB_PC) that we will land at. The pc
- is copied into PC. This routine returns 1 on success. */
+ We expect the first arg to be a pointer to the jmp_buf structure
+ from which we extract the pc (MIPS_LINUX_JB_PC) that we will land
+ at. The pc is copied into PC. This routine returns 1 on
+ success. */
#define MIPS_LINUX_JB_ELEMENT_SIZE 4
#define MIPS_LINUX_JB_PC 0
static void
supply_32bit_reg (int regnum, const void *addr)
{
- char buf[MAX_REGISTER_SIZE];
+ gdb_byte buf[MAX_REGISTER_SIZE];
store_signed_integer (buf, register_size (current_gdbarch, regnum),
extract_signed_integer (addr, 4));
regcache_raw_supply (current_regcache, regnum, buf);
/* Unpack an elf_gregset_t into GDB's register cache. */
-void
-supply_gregset (elf_gregset_t *gregsetp)
+void
+mips_supply_gregset (mips_elf_gregset_t *gregsetp)
{
int regi;
- elf_greg_t *regp = *gregsetp;
+ mips_elf_greg_t *regp = *gregsetp;
char zerobuf[MAX_REGISTER_SIZE];
memset (zerobuf, 0, MAX_REGISTER_SIZE);
/* Fill inaccessible registers with zero. */
regcache_raw_supply (current_regcache, MIPS_UNUSED_REGNUM, zerobuf);
- for (regi = MIPS_FIRST_EMBED_REGNUM; regi < MIPS_LAST_EMBED_REGNUM; regi++)
+ for (regi = MIPS_FIRST_EMBED_REGNUM;
+ regi < MIPS_LAST_EMBED_REGNUM;
+ regi++)
regcache_raw_supply (current_regcache, regi, zerobuf);
}
/* Pack our registers (or one register) into an elf_gregset_t. */
void
-fill_gregset (elf_gregset_t *gregsetp, int regno)
+mips_fill_gregset (mips_elf_gregset_t *gregsetp, int regno)
{
int regaddr, regi;
- elf_greg_t *regp = *gregsetp;
+ mips_elf_greg_t *regp = *gregsetp;
void *dst;
if (regno == -1)
{
- memset (regp, 0, sizeof (elf_gregset_t));
+ memset (regp, 0, sizeof (mips_elf_gregset_t));
for (regi = 0; regi < 32; regi++)
- fill_gregset (gregsetp, regi);
- fill_gregset (gregsetp, mips_regnum (current_gdbarch)->lo);
- fill_gregset (gregsetp, mips_regnum (current_gdbarch)->hi);
- fill_gregset (gregsetp, mips_regnum (current_gdbarch)->pc);
- fill_gregset (gregsetp, mips_regnum (current_gdbarch)->badvaddr);
- fill_gregset (gregsetp, MIPS_PS_REGNUM);
- fill_gregset (gregsetp, mips_regnum (current_gdbarch)->cause);
+ mips_fill_gregset (gregsetp, regi);
+ mips_fill_gregset (gregsetp, mips_regnum (current_gdbarch)->lo);
+ mips_fill_gregset (gregsetp, mips_regnum (current_gdbarch)->hi);
+ mips_fill_gregset (gregsetp, mips_regnum (current_gdbarch)->pc);
+ mips_fill_gregset (gregsetp, mips_regnum (current_gdbarch)->badvaddr);
+ mips_fill_gregset (gregsetp, MIPS_PS_REGNUM);
+ mips_fill_gregset (gregsetp, mips_regnum (current_gdbarch)->cause);
return;
}
/* Likewise, unpack an elf_fpregset_t. */
void
-supply_fpregset (elf_fpregset_t *fpregsetp)
+mips_supply_fpregset (mips_elf_fpregset_t *fpregsetp)
{
int regi;
char zerobuf[MAX_REGISTER_SIZE];
mips_regnum (current_gdbarch)->fp_control_status,
(char *)(*fpregsetp + 32));
- /* FIXME: how can we supply FCRIR? The ABI doesn't tell us. */
+ /* FIXME: how can we supply FCRIR? The ABI doesn't tell us. */
regcache_raw_supply (current_regcache,
mips_regnum (current_gdbarch)->fp_implementation_revision,
zerobuf);
elf_fpregset_t. */
void
-fill_fpregset (elf_fpregset_t *fpregsetp, int regno)
+mips_fill_fpregset (mips_elf_fpregset_t *fpregsetp, int regno)
{
char *from, *to;
int regi;
for (regi = 0; regi < 32; regi++)
- fill_fpregset (fpregsetp, FP0_REGNUM + regi);
- fill_fpregset(fpregsetp, mips_regnum (current_gdbarch)->fp_control_status);
+ mips_fill_fpregset (fpregsetp, FP0_REGNUM + regi);
+ mips_fill_fpregset (fpregsetp,
+ mips_regnum (current_gdbarch)->fp_control_status);
}
}
int regaddr;
if (regno < 0 || regno >= NUM_REGS)
- error ("Bogon register number %d.", regno);
+ error (_("Bogon register number %d."), regno);
if (regno < 32)
regaddr = regno;
else if (regno == mips_regnum (current_gdbarch)->fp_implementation_revision)
regaddr = FPC_EIR;
else
- error ("Unknowable register number %d.", regno);
+ error (_("Unknowable register number %d."), regno);
return regaddr;
}
-
-/* Fetch (and possibly build) an appropriate link_map_offsets
- structure for native GNU/Linux MIPS targets using the struct offsets
- defined in link.h (but without actual reference to that file).
-
- This makes it possible to access GNU/Linux MIPS shared libraries from a
- GDB that was built on a different host platform (for cross debugging). */
-
-static struct link_map_offsets *
-mips_linux_svr4_fetch_link_map_offsets (void)
-{
- static struct link_map_offsets lmo;
- static struct link_map_offsets *lmp = NULL;
-
- if (lmp == NULL)
- {
- lmp = &lmo;
-
- lmo.r_debug_size = 8; /* The actual size is 20 bytes, but
- this is all we need. */
- lmo.r_map_offset = 4;
- lmo.r_map_size = 4;
-
- lmo.link_map_size = 20;
-
- lmo.l_addr_offset = 0;
- lmo.l_addr_size = 4;
-
- lmo.l_name_offset = 4;
- lmo.l_name_size = 4;
-
- lmo.l_next_offset = 12;
- lmo.l_next_size = 4;
-
- lmo.l_prev_offset = 16;
- lmo.l_prev_size = 4;
- }
-
- return lmp;
-}
-
/* Support for 64-bit ABIs. */
-/* Copied from <asm/elf.h>. */
-#define MIPS64_ELF_NGREG 45
-#define MIPS64_ELF_NFPREG 33
-
-typedef unsigned char mips64_elf_greg_t[8];
-typedef mips64_elf_greg_t mips64_elf_gregset_t[MIPS64_ELF_NGREG];
-
-typedef unsigned char mips64_elf_fpreg_t[8];
-typedef mips64_elf_fpreg_t mips64_elf_fpregset_t[MIPS64_ELF_NFPREG];
-
-/* 0 - 31 are integer registers, 32 - 63 are fp registers. */
-#define MIPS64_FPR_BASE 32
-#define MIPS64_PC 64
-#define MIPS64_CAUSE 65
-#define MIPS64_BADVADDR 66
-#define MIPS64_MMHI 67
-#define MIPS64_MMLO 68
-#define MIPS64_FPC_CSR 69
-#define MIPS64_FPC_EIR 70
-
-#define MIPS64_EF_REG0 0
-#define MIPS64_EF_REG31 31
-#define MIPS64_EF_LO 32
-#define MIPS64_EF_HI 33
-#define MIPS64_EF_CP0_EPC 34
-#define MIPS64_EF_CP0_BADVADDR 35
-#define MIPS64_EF_CP0_STATUS 36
-#define MIPS64_EF_CP0_CAUSE 37
-
-#define MIPS64_EF_SIZE 304
-
/* Figure out where the longjmp will land.
- We expect the first arg to be a pointer to the jmp_buf structure from
- which we extract the pc (MIPS_LINUX_JB_PC) that we will land at. The pc
- is copied into PC. This routine returns 1 on success. */
+ We expect the first arg to be a pointer to the jmp_buf structure
+ from which we extract the pc (MIPS_LINUX_JB_PC) that we will land
+ at. The pc is copied into PC. This routine returns 1 on
+ success. */
/* Details about jmp_buf. */
return 1;
}
-/* Unpack an elf_gregset_t into GDB's register cache. */
+/* Register set support functions. These operate on standard 64-bit
+ regsets, but work whether the target is 32-bit or 64-bit. A 32-bit
+ target will still use the 64-bit format for PTRACE_GETREGS. */
+
+/* Supply a 64-bit register. */
+
+void
+supply_64bit_reg (int regnum, const gdb_byte *buf)
+{
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG
+ && register_size (current_gdbarch, regnum) == 4)
+ regcache_raw_supply (current_regcache, regnum, buf + 4);
+ else
+ regcache_raw_supply (current_regcache, regnum, buf);
+}
-static void
+/* Unpack a 64-bit elf_gregset_t into GDB's register cache. */
+
+void
mips64_supply_gregset (mips64_elf_gregset_t *gregsetp)
{
int regi;
mips64_elf_greg_t *regp = *gregsetp;
- char zerobuf[MAX_REGISTER_SIZE];
+ gdb_byte zerobuf[MAX_REGISTER_SIZE];
memset (zerobuf, 0, MAX_REGISTER_SIZE);
for (regi = MIPS64_EF_REG0; regi <= MIPS64_EF_REG31; regi++)
- regcache_raw_supply (current_regcache, (regi - MIPS64_EF_REG0),
- (char *)(regp + regi));
-
- regcache_raw_supply (current_regcache, mips_regnum (current_gdbarch)->lo,
- (char *)(regp + MIPS64_EF_LO));
- regcache_raw_supply (current_regcache, mips_regnum (current_gdbarch)->hi,
- (char *)(regp + MIPS64_EF_HI));
-
- regcache_raw_supply (current_regcache, mips_regnum (current_gdbarch)->pc,
- (char *)(regp + MIPS64_EF_CP0_EPC));
- regcache_raw_supply (current_regcache, mips_regnum (current_gdbarch)->badvaddr,
- (char *)(regp + MIPS64_EF_CP0_BADVADDR));
- regcache_raw_supply (current_regcache, MIPS_PS_REGNUM,
- (char *)(regp + MIPS64_EF_CP0_STATUS));
- regcache_raw_supply (current_regcache, mips_regnum (current_gdbarch)->cause,
- (char *)(regp + MIPS64_EF_CP0_CAUSE));
+ supply_64bit_reg (regi - MIPS64_EF_REG0, (gdb_byte *)(regp + regi));
+
+ supply_64bit_reg (mips_regnum (current_gdbarch)->lo,
+ (gdb_byte *) (regp + MIPS64_EF_LO));
+ supply_64bit_reg (mips_regnum (current_gdbarch)->hi,
+ (gdb_byte *) (regp + MIPS64_EF_HI));
+
+ supply_64bit_reg (mips_regnum (current_gdbarch)->pc,
+ (gdb_byte *) (regp + MIPS64_EF_CP0_EPC));
+ supply_64bit_reg (mips_regnum (current_gdbarch)->badvaddr,
+ (gdb_byte *) (regp + MIPS64_EF_CP0_BADVADDR));
+ supply_64bit_reg (MIPS_PS_REGNUM,
+ (gdb_byte *) (regp + MIPS64_EF_CP0_STATUS));
+ supply_64bit_reg (mips_regnum (current_gdbarch)->cause,
+ (gdb_byte *) (regp + MIPS64_EF_CP0_CAUSE));
/* Fill inaccessible registers with zero. */
regcache_raw_supply (current_regcache, MIPS_UNUSED_REGNUM, zerobuf);
- for (regi = MIPS_FIRST_EMBED_REGNUM; regi < MIPS_LAST_EMBED_REGNUM; regi++)
+ for (regi = MIPS_FIRST_EMBED_REGNUM;
+ regi < MIPS_LAST_EMBED_REGNUM;
+ regi++)
regcache_raw_supply (current_regcache, regi, zerobuf);
}
-/* Pack our registers (or one register) into an elf_gregset_t. */
+/* Pack our registers (or one register) into a 64-bit elf_gregset_t. */
-static void
+void
mips64_fill_gregset (mips64_elf_gregset_t *gregsetp, int regno)
{
int regaddr, regi;
mips64_fill_gregset (gregsetp, mips_regnum (current_gdbarch)->lo);
mips64_fill_gregset (gregsetp, mips_regnum (current_gdbarch)->hi);
mips64_fill_gregset (gregsetp, mips_regnum (current_gdbarch)->pc);
- mips64_fill_gregset (gregsetp, mips_regnum (current_gdbarch)->badvaddr);
+ mips64_fill_gregset (gregsetp,
+ mips_regnum (current_gdbarch)->badvaddr);
mips64_fill_gregset (gregsetp, MIPS_PS_REGNUM);
- mips64_fill_gregset (gregsetp, mips_regnum (current_gdbarch)->cause);
+ mips64_fill_gregset (gregsetp,
+ mips_regnum (current_gdbarch)->cause);
return;
}
if (regno < 32)
- {
- dst = regp + regno + MIPS64_EF_REG0;
- regcache_raw_collect (current_regcache, regno, dst);
- return;
- }
-
- if (regno == mips_regnum (current_gdbarch)->lo)
+ regaddr = regno + MIPS64_EF_REG0;
+ else if (regno == mips_regnum (current_gdbarch)->lo)
regaddr = MIPS64_EF_LO;
else if (regno == mips_regnum (current_gdbarch)->hi)
regaddr = MIPS64_EF_HI;
if (regaddr != -1)
{
+ gdb_byte buf[MAX_REGISTER_SIZE];
+ LONGEST val;
+
+ regcache_raw_collect (current_regcache, regno, buf);
+ val = extract_signed_integer (buf,
+ register_size (current_gdbarch, regno));
dst = regp + regaddr;
- regcache_raw_collect (current_regcache, regno, dst);
+ store_signed_integer (dst, 8, val);
}
}
/* Likewise, unpack an elf_fpregset_t. */
-static void
+void
mips64_supply_fpregset (mips64_elf_fpregset_t *fpregsetp)
{
int regi;
- char zerobuf[MAX_REGISTER_SIZE];
-
- memset (zerobuf, 0, MAX_REGISTER_SIZE);
-
- for (regi = 0; regi < 32; regi++)
- regcache_raw_supply (current_regcache, FP0_REGNUM + regi,
- (char *)(*fpregsetp + regi));
-
- regcache_raw_supply (current_regcache,
- mips_regnum (current_gdbarch)->fp_control_status,
- (char *)(*fpregsetp + 32));
- /* FIXME: how can we supply FCRIR? The ABI doesn't tell us. */
- regcache_raw_supply (current_regcache,
- mips_regnum (current_gdbarch)->fp_implementation_revision,
- zerobuf);
+ /* See mips_linux_o32_sigframe_init for a description of the
+ peculiar FP register layout. */
+ if (register_size (current_gdbarch, FP0_REGNUM) == 4)
+ for (regi = 0; regi < 32; regi++)
+ {
+ gdb_byte *reg_ptr = (gdb_byte *) (*fpregsetp + (regi & ~1));
+ if ((TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) != (regi & 1))
+ reg_ptr += 4;
+ regcache_raw_supply (current_regcache, FP0_REGNUM + regi, reg_ptr);
+ }
+ else
+ for (regi = 0; regi < 32; regi++)
+ regcache_raw_supply (current_regcache, FP0_REGNUM + regi,
+ (char *)(*fpregsetp + regi));
+
+ supply_32bit_reg (mips_regnum (current_gdbarch)->fp_control_status,
+ (gdb_byte *)(*fpregsetp + 32));
+
+ /* The ABI doesn't tell us how to supply FCRIR, and core dumps don't
+ include it - but the result of PTRACE_GETFPREGS does. The best we
+ can do is to assume that its value is present. */
+ supply_32bit_reg (mips_regnum (current_gdbarch)->fp_implementation_revision,
+ (gdb_byte *)(*fpregsetp + 32) + 4);
}
/* Likewise, pack one or all floating point registers into an
elf_fpregset_t. */
-static void
+void
mips64_fill_fpregset (mips64_elf_fpregset_t *fpregsetp, int regno)
{
- char *from, *to;
+ gdb_byte *to;
if ((regno >= FP0_REGNUM) && (regno < FP0_REGNUM + 32))
{
- to = (char *) (*fpregsetp + regno - FP0_REGNUM);
- regcache_raw_collect (current_regcache, regno, to);
+ /* See mips_linux_o32_sigframe_init for a description of the
+ peculiar FP register layout. */
+ if (register_size (current_gdbarch, regno) == 4)
+ {
+ int regi = regno - FP0_REGNUM;
+
+ to = (gdb_byte *) (*fpregsetp + (regi & ~1));
+ if ((TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) != (regi & 1))
+ to += 4;
+ regcache_raw_collect (current_regcache, regno, to);
+ }
+ else
+ {
+ to = (gdb_byte *) (*fpregsetp + regno - FP0_REGNUM);
+ regcache_raw_collect (current_regcache, regno, to);
+ }
}
else if (regno == mips_regnum (current_gdbarch)->fp_control_status)
{
- to = (char *) (*fpregsetp + 32);
- regcache_raw_collect (current_regcache, regno, to);
+ gdb_byte buf[MAX_REGISTER_SIZE];
+ LONGEST val;
+
+ regcache_raw_collect (current_regcache, regno, buf);
+ val = extract_signed_integer (buf,
+ register_size (current_gdbarch, regno));
+ to = (gdb_byte *) (*fpregsetp + 32);
+ store_signed_integer (to, 4, val);
+ }
+ else if (regno == mips_regnum (current_gdbarch)->fp_implementation_revision)
+ {
+ gdb_byte buf[MAX_REGISTER_SIZE];
+ LONGEST val;
+
+ regcache_raw_collect (current_regcache, regno, buf);
+ val = extract_signed_integer (buf,
+ register_size (current_gdbarch, regno));
+ to = (gdb_byte *) (*fpregsetp + 32) + 4;
+ store_signed_integer (to, 4, val);
}
else if (regno == -1)
{
for (regi = 0; regi < 32; regi++)
mips64_fill_fpregset (fpregsetp, FP0_REGNUM + regi);
- mips64_fill_fpregset(fpregsetp,
- mips_regnum (current_gdbarch)->fp_control_status);
+ mips64_fill_fpregset (fpregsetp,
+ mips_regnum (current_gdbarch)->fp_control_status);
+ mips64_fill_fpregset (fpregsetp, (mips_regnum (current_gdbarch)
+ ->fp_implementation_revision));
}
}
int regaddr;
if (regno < 0 || regno >= NUM_REGS)
- error ("Bogon register number %d.", regno);
+ error (_("Bogon register number %d."), regno);
if (regno < 32)
regaddr = regno;
else if (regno == mips_regnum (current_gdbarch)->fp_implementation_revision)
regaddr = MIPS64_FPC_EIR;
else
- error ("Unknowable register number %d.", regno);
+ error (_("Unknowable register number %d."), regno);
return regaddr;
}
fetch_core_registers (char *core_reg_sect, unsigned core_reg_size,
int which, CORE_ADDR reg_addr)
{
- elf_gregset_t gregset;
- elf_fpregset_t fpregset;
+ mips_elf_gregset_t gregset;
+ mips_elf_fpregset_t fpregset;
mips64_elf_gregset_t gregset64;
mips64_elf_fpregset_t fpregset64;
if (core_reg_size == sizeof (gregset))
{
memcpy ((char *) &gregset, core_reg_sect, sizeof (gregset));
- supply_gregset (&gregset);
+ mips_supply_gregset (&gregset);
}
else if (core_reg_size == sizeof (gregset64))
{
}
else
{
- warning ("wrong size gregset struct in core file");
+ warning (_("wrong size gregset struct in core file"));
}
}
else if (which == 2)
if (core_reg_size == sizeof (fpregset))
{
memcpy ((char *) &fpregset, core_reg_sect, sizeof (fpregset));
- supply_fpregset (&fpregset);
+ mips_supply_fpregset (&fpregset);
}
else if (core_reg_size == sizeof (fpregset64))
{
- memcpy ((char *) &fpregset64, core_reg_sect, sizeof (fpregset64));
+ memcpy ((char *) &fpregset64, core_reg_sect,
+ sizeof (fpregset64));
mips64_supply_fpregset (&fpregset64);
}
else
{
- warning ("wrong size fpregset struct in core file");
+ warning (_("wrong size fpregset struct in core file"));
}
}
}
NULL /* next */
};
-/* Fetch (and possibly build) an appropriate link_map_offsets
- structure for native GNU/Linux MIPS targets using the struct offsets
- defined in link.h (but without actual reference to that file).
-
- This makes it possible to access GNU/Linux MIPS shared libraries from a
- GDB that was built on a different host platform (for cross debugging). */
-
-static struct link_map_offsets *
-mips64_linux_svr4_fetch_link_map_offsets (void)
-{
- static struct link_map_offsets lmo;
- static struct link_map_offsets *lmp = NULL;
-
- if (lmp == NULL)
- {
- lmp = &lmo;
-
- lmo.r_debug_size = 16; /* The actual size is 40 bytes, but
- this is all we need. */
- lmo.r_map_offset = 8;
- lmo.r_map_size = 8;
-
- lmo.link_map_size = 40;
-
- lmo.l_addr_offset = 0;
- lmo.l_addr_size = 8;
-
- lmo.l_name_offset = 8;
- lmo.l_name_size = 8;
-
- lmo.l_next_offset = 24;
- lmo.l_next_size = 8;
-
- lmo.l_prev_offset = 32;
- lmo.l_prev_size = 8;
- }
-
- return lmp;
-}
-
-/* Handle for obtaining pointer to the current register_addr() function
- for a given architecture. */
+/* Handle for obtaining pointer to the current register_addr()
+ function for a given architecture. */
static struct gdbarch_data *register_addr_data;
CORE_ADDR
static void
set_mips_linux_register_addr (struct gdbarch *gdbarch,
- CORE_ADDR (*register_addr_ptr) (int, CORE_ADDR))
+ CORE_ADDR (*register_addr_ptr) (int,
+ CORE_ADDR))
{
- deprecated_set_gdbarch_data (gdbarch, register_addr_data, register_addr_ptr);
+ deprecated_set_gdbarch_data (gdbarch, register_addr_data,
+ register_addr_ptr);
}
static void *
return 0;
}
-/* Check the code at PC for a dynamic linker lazy resolution stub. Because
- they aren't in the .plt section, we pattern-match on the code generated
- by GNU ld. They look like this:
+/* Check the code at PC for a dynamic linker lazy resolution stub.
+ Because they aren't in the .plt section, we pattern-match on the
+ code generated by GNU ld. They look like this:
lw t9,0x8010(gp)
addu t7,ra
jalr t9,ra
addiu t8,zero,INDEX
- (with the appropriate doubleword instructions for N64). Also return the
- dynamic symbol index used in the last instruction. */
+ (with the appropriate doubleword instructions for N64). Also
+ return the dynamic symbol index used in the last instruction. */
static int
mips_linux_in_dynsym_stub (CORE_ADDR pc, char *name)
if (insn != 0x03e07821)
return 0;
}
-
+
insn = extract_unsigned_integer (p + 8, 4);
/* jalr t9,ra */
if (insn != 0x0320f809)
return (insn & 0xffff);
}
-/* Return non-zero iff PC belongs to the dynamic linker resolution code
- or to a stub. */
+/* Return non-zero iff PC belongs to the dynamic linker resolution
+ code or to a stub. */
int
mips_linux_in_dynsym_resolve_code (CORE_ADDR pc)
{
- /* Check whether PC is in the dynamic linker. This also checks whether
- it is in the .plt section, which MIPS does not use. */
+ /* Check whether PC is in the dynamic linker. This also checks
+ whether it is in the .plt section, which MIPS does not use. */
if (in_solib_dynsym_resolve_code (pc))
return 1;
- /* Pattern match for the stub. It would be nice if there were a more
- efficient way to avoid this check. */
+ /* Pattern match for the stub. It would be nice if there were a
+ more efficient way to avoid this check. */
if (mips_linux_in_dynsym_stub (pc, NULL))
return 1;
resolver = lookup_minimal_symbol ("__dl_runtime_resolve", NULL, NULL);
if (resolver && SYMBOL_VALUE_ADDRESS (resolver) == pc)
- return frame_pc_unwind (get_current_frame ());
+ return frame_pc_unwind (get_current_frame ());
return 0;
-}
+}
/* Signal trampoline support. There are four supported layouts for a
signal frame: o32 sigframe, o32 rt_sigframe, n32 rt_sigframe, and
static const struct tramp_frame mips_linux_n64_rt_sigframe = {
SIGTRAMP_FRAME,
4,
- { MIPS_INST_LI_V0_N64_RT_SIGRETURN, MIPS_INST_SYSCALL, TRAMP_SENTINEL_INSN },
+ { MIPS_INST_LI_V0_N64_RT_SIGRETURN,
+ MIPS_INST_SYSCALL,
+ TRAMP_SENTINEL_INSN },
mips_linux_n32n64_sigframe_init
};
int ireg, reg_position;
CORE_ADDR sigcontext_base = func - SIGFRAME_CODE_OFFSET;
const struct mips_regnum *regs = mips_regnum (current_gdbarch);
+ CORE_ADDR regs_base;
if (self == &mips_linux_o32_sigframe)
sigcontext_base += SIGFRAME_SIGCONTEXT_OFFSET;
else
sigcontext_base += RTSIGFRAME_SIGCONTEXT_OFFSET;
-
- /* I'm not proud of this hack. Eventually we will have the infrastructure
- to indicate the size of saved registers on a per-frame basis, but
- right now we don't; the kernel saves eight bytes but we only want
- four. */
+
+ /* I'm not proud of this hack. Eventually we will have the
+ infrastructure to indicate the size of saved registers on a
+ per-frame basis, but right now we don't; the kernel saves eight
+ bytes but we only want four. Use regs_base to access any
+ 64-bit fields. */
if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
- sigcontext_base += 4;
+ regs_base = sigcontext_base + 4;
+ else
+ regs_base = sigcontext_base;
#if 0
trad_frame_set_reg_addr (this_cache, ORIG_ZERO_REGNUM + NUM_REGS,
- sigcontext_base + SIGCONTEXT_REGS);
+ regs_base + SIGCONTEXT_REGS);
#endif
for (ireg = 1; ireg < 32; ireg++)
- trad_frame_set_reg_addr (this_cache, ireg + MIPS_ZERO_REGNUM + NUM_REGS,
- sigcontext_base + SIGCONTEXT_REGS
+ trad_frame_set_reg_addr (this_cache,
+ ireg + MIPS_ZERO_REGNUM + NUM_REGS,
+ regs_base + SIGCONTEXT_REGS
+ ireg * SIGCONTEXT_REG_SIZE);
+ /* The way that floating point registers are saved, unfortunately,
+ depends on the architecture the kernel is built for. For the r3000 and
+ tx39, four bytes of each register are at the beginning of each of the
+ 32 eight byte slots. For everything else, the registers are saved
+ using double precision; only the even-numbered slots are initialized,
+ and the high bits are the odd-numbered register. Assume the latter
+ layout, since we can't tell, and it's much more common. Which bits are
+ the "high" bits depends on endianness. */
for (ireg = 0; ireg < 32; ireg++)
- trad_frame_set_reg_addr (this_cache, ireg + regs->fp0 + NUM_REGS,
- sigcontext_base + SIGCONTEXT_FPREGS
- + ireg * SIGCONTEXT_REG_SIZE);
+ if ((TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) != (ireg & 1))
+ trad_frame_set_reg_addr (this_cache, ireg + regs->fp0 + NUM_REGS,
+ sigcontext_base + SIGCONTEXT_FPREGS + 4
+ + (ireg & ~1) * SIGCONTEXT_REG_SIZE);
+ else
+ trad_frame_set_reg_addr (this_cache, ireg + regs->fp0 + NUM_REGS,
+ sigcontext_base + SIGCONTEXT_FPREGS
+ + (ireg & ~1) * SIGCONTEXT_REG_SIZE);
trad_frame_set_reg_addr (this_cache, regs->pc + NUM_REGS,
- sigcontext_base + SIGCONTEXT_PC);
+ regs_base + SIGCONTEXT_PC);
- trad_frame_set_reg_addr (this_cache, regs->fp_control_status + NUM_REGS,
+ trad_frame_set_reg_addr (this_cache,
+ regs->fp_control_status + NUM_REGS,
sigcontext_base + SIGCONTEXT_FPCSR);
trad_frame_set_reg_addr (this_cache, regs->hi + NUM_REGS,
- sigcontext_base + SIGCONTEXT_HI);
+ regs_base + SIGCONTEXT_HI);
trad_frame_set_reg_addr (this_cache, regs->lo + NUM_REGS,
- sigcontext_base + SIGCONTEXT_LO);
+ regs_base + SIGCONTEXT_LO);
trad_frame_set_reg_addr (this_cache, regs->cause + NUM_REGS,
sigcontext_base + SIGCONTEXT_CAUSE);
trad_frame_set_reg_addr (this_cache, regs->badvaddr + NUM_REGS,
/* Choice of the bottom of the sigframe is somewhat arbitrary. */
trad_frame_set_id (this_cache,
- frame_id_build (func - SIGFRAME_CODE_OFFSET, func));
+ frame_id_build (func - SIGFRAME_CODE_OFFSET,
+ func));
}
/* *INDENT-OFF* */
struct sigcontext uc_mcontext;
sigset_t uc_sigmask; [ mask last for extensibility ]
};
-
+
struct rt_sigframe_n32 {
u32 rs_ass[4]; [ argument save space for o32 ]
u32 rs_code[2]; [ signal trampoline ]
#define N64_SIGCONTEXT_BADVADDR (67 * 8 + 5 * 4)
#define N64_SIGCONTEXT_REG_SIZE 8
-
+
static void
mips_linux_n32n64_sigframe_init (const struct tramp_frame *self,
struct frame_info *next_frame,
sigcontext_base += N32_SIGFRAME_SIGCONTEXT_OFFSET;
else
sigcontext_base += N64_SIGFRAME_SIGCONTEXT_OFFSET;
-
+
#if 0
trad_frame_set_reg_addr (this_cache, ORIG_ZERO_REGNUM + NUM_REGS,
sigcontext_base + N64_SIGCONTEXT_REGS);
#endif
for (ireg = 1; ireg < 32; ireg++)
- trad_frame_set_reg_addr (this_cache, ireg + MIPS_ZERO_REGNUM + NUM_REGS,
+ trad_frame_set_reg_addr (this_cache,
+ ireg + MIPS_ZERO_REGNUM + NUM_REGS,
sigcontext_base + N64_SIGCONTEXT_REGS
+ ireg * N64_SIGCONTEXT_REG_SIZE);
trad_frame_set_reg_addr (this_cache, regs->pc + NUM_REGS,
sigcontext_base + N64_SIGCONTEXT_PC);
- trad_frame_set_reg_addr (this_cache, regs->fp_control_status + NUM_REGS,
+ trad_frame_set_reg_addr (this_cache,
+ regs->fp_control_status + NUM_REGS,
sigcontext_base + N64_SIGCONTEXT_FPCSR);
trad_frame_set_reg_addr (this_cache, regs->hi + NUM_REGS,
sigcontext_base + N64_SIGCONTEXT_HI);
/* Choice of the bottom of the sigframe is somewhat arbitrary. */
trad_frame_set_id (this_cache,
- frame_id_build (func - SIGFRAME_CODE_OFFSET, func));
+ frame_id_build (func - SIGFRAME_CODE_OFFSET,
+ func));
+}
+
+/* Wrapper functions. These are only used by libthread_db. */
+
+void
+supply_gregset (mips_elf_gregset_t *gregsetp)
+{
+ if (mips_isa_regsize (current_gdbarch) == 4)
+ mips_supply_gregset (gregsetp);
+ else
+ mips64_supply_gregset ((void *) gregsetp);
+}
+
+void
+fill_gregset (mips_elf_gregset_t *gregsetp, int regno)
+{
+ if (mips_isa_regsize (current_gdbarch) == 4)
+ mips_fill_gregset (gregsetp, regno);
+ else
+ mips64_fill_gregset ((void *) gregsetp, regno);
+}
+
+/* Likewise, unpack an elf_fpregset_t. */
+
+void
+supply_fpregset (mips_elf_fpregset_t *fpregsetp)
+{
+ if (mips_isa_regsize (current_gdbarch) == 4)
+ mips_supply_fpregset (fpregsetp);
+ else
+ mips64_supply_fpregset ((void *) fpregsetp);
+}
+
+/* Likewise, pack one or all floating point registers into an
+ elf_fpregset_t. */
+
+void
+fill_fpregset (mips_elf_fpregset_t *fpregsetp, int regno)
+{
+ if (mips_isa_regsize (current_gdbarch) == 4)
+ mips_fill_fpregset (fpregsetp, regno);
+ else
+ mips64_fill_fpregset ((void *) fpregsetp, regno);
}
/* Initialize one of the GNU/Linux OS ABIs. */
static void
-mips_linux_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
+mips_linux_init_abi (struct gdbarch_info info,
+ struct gdbarch *gdbarch)
{
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
enum mips_abi abi = mips_abi (gdbarch);
set_gdbarch_get_longjmp_target (gdbarch,
mips_linux_get_longjmp_target);
set_solib_svr4_fetch_link_map_offsets
- (gdbarch, mips_linux_svr4_fetch_link_map_offsets);
+ (gdbarch, svr4_ilp32_fetch_link_map_offsets);
set_mips_linux_register_addr (gdbarch, mips_linux_register_addr);
tramp_frame_prepend_unwinder (gdbarch, &mips_linux_o32_sigframe);
tramp_frame_prepend_unwinder (gdbarch, &mips_linux_o32_rt_sigframe);
set_gdbarch_get_longjmp_target (gdbarch,
mips_linux_get_longjmp_target);
set_solib_svr4_fetch_link_map_offsets
- (gdbarch, mips_linux_svr4_fetch_link_map_offsets);
+ (gdbarch, svr4_ilp32_fetch_link_map_offsets);
set_mips_linux_register_addr (gdbarch, mips64_linux_register_addr);
+ set_gdbarch_long_double_bit (gdbarch, 128);
+ /* These floatformats should probably be renamed. MIPS uses
+ the same 128-bit IEEE floating point format that IA-64 uses,
+ except that the quiet/signalling NaN bit is reversed (GDB
+ does not distinguish between quiet and signalling NaNs). */
+ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
+ set_gdbarch_long_double_format (gdbarch, &floatformat_ia64_quad_big);
+ else
+ set_gdbarch_long_double_format (gdbarch, &floatformat_ia64_quad_little);
tramp_frame_prepend_unwinder (gdbarch, &mips_linux_n32_rt_sigframe);
break;
case MIPS_ABI_N64:
set_gdbarch_get_longjmp_target (gdbarch,
mips64_linux_get_longjmp_target);
set_solib_svr4_fetch_link_map_offsets
- (gdbarch, mips64_linux_svr4_fetch_link_map_offsets);
+ (gdbarch, svr4_lp64_fetch_link_map_offsets);
set_mips_linux_register_addr (gdbarch, mips64_linux_register_addr);
+ set_gdbarch_long_double_bit (gdbarch, 128);
+ /* These floatformats should probably be renamed. MIPS uses
+ the same 128-bit IEEE floating point format that IA-64 uses,
+ except that the quiet/signalling NaN bit is reversed (GDB
+ does not distinguish between quiet and signalling NaNs). */
+ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
+ set_gdbarch_long_double_format (gdbarch, &floatformat_ia64_quad_big);
+ else
+ set_gdbarch_long_double_format (gdbarch, &floatformat_ia64_quad_little);
tramp_frame_prepend_unwinder (gdbarch, &mips_linux_n64_rt_sigframe);
break;
default:
- internal_error (__FILE__, __LINE__, "can't handle ABI");
+ internal_error (__FILE__, __LINE__, _("can't handle ABI"));
break;
}
+ set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
set_gdbarch_skip_solib_resolver (gdbarch, mips_linux_skip_resolver);
set_gdbarch_software_single_step (gdbarch, mips_software_single_step);
+
+ /* Enable TLS support. */
+ set_gdbarch_fetch_tls_load_module_address (gdbarch,
+ svr4_fetch_objfile_link_map);
}
void
arch_info != NULL;
arch_info = arch_info->next)
{
- gdbarch_register_osabi (bfd_arch_mips, arch_info->mach, GDB_OSABI_LINUX,
+ gdbarch_register_osabi (bfd_arch_mips, arch_info->mach,
+ GDB_OSABI_LINUX,
mips_linux_init_abi);
}
projects / deliverable / binutils-gdb.git / blobdiff