#include "frame-unwind.h"
#include "frame-base.h"
#include "trad-frame.h"
+#include "infcall.h"
static const struct objfile_data *mips_pdr_data;
internal_error (__FILE__, __LINE__, "bad switch");
}
}
- else if (regnum >=
- (NUM_REGS + mips_regnum (current_gdbarch)->fp_control_status)
- && regnum <= NUM_REGS + LAST_EMBED_REGNUM)
- /* The pseudo/cooked view of the embedded registers is always
- 32-bit. The raw view is handled below. */
- return builtin_type_int32;
- else if (regnum >= NUM_REGS && mips_isa_regsize (gdbarch)
- && gdbarch_tdep (gdbarch)->mips64_transfers_32bit_regs_p)
- /* The target, while using a 64-bit register buffer, is only
- transfering 32-bits of each integer register. Reflect this in
- the cooked/pseudo register value. */
- return builtin_type_int32;
- else if (mips_isa_regsize (gdbarch) == 8)
- /* 64-bit ISA. */
- return builtin_type_int64;
+ else if (regnum < NUM_REGS)
+ {
+ /* The raw or ISA registers. These are all sized according to
+ the ISA regsize. */
+ if (mips_isa_regsize (gdbarch) == 4)
+ return builtin_type_int32;
+ else
+ return builtin_type_int64;
+ }
else
- /* 32-bit ISA. */
- return builtin_type_int32;
+ {
+ /* The cooked or ABI registers. These are sized according to
+ the ABI (with a few complications). */
+ if (regnum >= (NUM_REGS
+ + mips_regnum (current_gdbarch)->fp_control_status)
+ && regnum <= NUM_REGS + LAST_EMBED_REGNUM)
+ /* The pseudo/cooked view of the embedded registers is always
+ 32-bit. The raw view is handled below. */
+ return builtin_type_int32;
+ else if (gdbarch_tdep (gdbarch)->mips64_transfers_32bit_regs_p)
+ /* The target, while possibly using a 64-bit register buffer,
+ is only transfering 32-bits of each integer register.
+ Reflect this in the cooked/pseudo (ABI) register value. */
+ return builtin_type_int32;
+ else if (mips_abi_regsize (gdbarch) == 4)
+ /* The ABI is restricted to 32-bit registers (the ISA could be
+ 32- or 64-bit). */
+ return builtin_type_int32;
+ else
+ /* 64-bit ABI. */
+ return builtin_type_int64;
+ }
}
/* TARGET_READ_SP -- Remove useless bits from the stack pointer. */
static CORE_ADDR
mips_read_sp (void)
{
- return read_signed_register (SP_REGNUM);
+ return read_signed_register (MIPS_SP_REGNUM);
}
/* Should the upper word of 64-bit addresses be zeroed? */
return 0;
}
-/* MIPS believes that the PC has a sign extended value. Perhaphs the
+/* MIPS believes that the PC has a sign extended value. Perhaps the
all registers should be sign extended for simplicity? */
static CORE_ADDR
static struct frame_id
mips_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
{
- return frame_id_build (frame_unwind_register_signed (next_frame, NUM_REGS + SP_REGNUM),
+ return frame_id_build (frame_unwind_register_signed (next_frame, NUM_REGS + MIPS_SP_REGNUM),
frame_pc_unwind (next_frame));
}
{
/* If function is frameless, then we need to do it the hard way. I
strongly suspect that frameless always means prologueless... */
- if (PROC_FRAME_REG (proc_desc) == SP_REGNUM
+ if (PROC_FRAME_REG (proc_desc) == MIPS_SP_REGNUM
&& PROC_FRAME_OFFSET (proc_desc) == 0)
return 0;
}
}
else
instlen = MIPS_INSTLEN;
- status = read_memory_nobpt (addr, buf, instlen);
+ status = deprecated_read_memory_nobpt (addr, buf, instlen);
if (status)
memory_error (status, addr);
return extract_unsigned_integer (buf, instlen);
instlen = MIPS16_INSTLEN;
addr = unmake_mips16_addr (addr);
- status = read_memory_nobpt (addr, buf, instlen);
+ status = deprecated_read_memory_nobpt (addr, buf, instlen);
if (status)
memory_error (status, addr);
return extract_unsigned_integer (buf, instlen);
int instlen;
int status;
instlen = MIPS_INSTLEN;
- status = read_memory_nobpt (addr, buf, instlen);
+ status = deprecated_read_memory_nobpt (addr, buf, instlen);
if (status)
memory_error (status, addr);
return extract_unsigned_integer (buf, instlen);
}
/* SP_REGNUM, contains the value and not the address. */
- trad_frame_set_value (cache->saved_regs, NUM_REGS + SP_REGNUM, cache->base);
+ trad_frame_set_value (cache->saved_regs, NUM_REGS + MIPS_SP_REGNUM, cache->base);
return (*this_cache);
}
regcache_cooked_read_signed (current_regcache, regno, &val);
return val;
}
- else if ((regno % NUM_REGS) == SP_REGNUM)
- /* The SP_REGNUM is special, its value is stored in saved_regs.
+ else if ((regno % NUM_REGS) == MIPS_SP_REGNUM)
+ /* MIPS_SP_REGNUM is special, its value is stored in saved_regs.
In fact, it is so special that it can even only be fetched
using a raw register number! Once this code as been converted
to frame-unwind the problem goes away. */
{
static int blurb_printed = 0;
- warning
- ("GDB can't find the start of the function at 0x%s.",
- paddr_nz (pc));
+ warning ("GDB can't find the start of the function at 0x%s.",
+ paddr_nz (pc));
if (!blurb_printed)
{
}
else if ((high_word & 0xFFE0) == 0xffa0) /* sd reg,offset($sp) */
{
- /* Irix 6.2 N32 ABI uses sd instructions for saving $gp and $ra,
- but the register size used is only 32 bits. Make the address
- for the saved register point to the lower 32 bits. */
+ /* Irix 6.2 N32 ABI uses sd instructions for saving $gp and
+ $ra. */
PROC_REG_MASK (&temp_proc_desc) |= 1 << reg;
- set_reg_offset (temp_saved_regs, reg,
- sp + low_word + 8 - mips_isa_regsize (current_gdbarch));
+ set_reg_offset (temp_saved_regs, reg, sp + low_word);
}
else if (high_word == 0x27be) /* addiu $30,$sp,size */
{
/* Old gcc frame, r30 is virtual frame pointer. */
if ((long) low_word != PROC_FRAME_OFFSET (&temp_proc_desc))
frame_addr = sp + low_word;
- else if (PROC_FRAME_REG (&temp_proc_desc) == SP_REGNUM)
+ else if (PROC_FRAME_REG (&temp_proc_desc) == MIPS_SP_REGNUM)
{
unsigned alloca_adjust;
PROC_FRAME_REG (&temp_proc_desc) = 30;
else if (inst == 0x03A0F021 || inst == 0x03a0f025 || inst == 0x03a0f02d)
{
/* New gcc frame, virtual frame pointer is at r30 + frame_size. */
- if (PROC_FRAME_REG (&temp_proc_desc) == SP_REGNUM)
+ if (PROC_FRAME_REG (&temp_proc_desc) == MIPS_SP_REGNUM)
{
unsigned alloca_adjust;
PROC_FRAME_REG (&temp_proc_desc) = 30;
CORE_ADDR sp;
if (cur_frame)
- sp = read_next_frame_reg (next_frame, NUM_REGS + SP_REGNUM);
+ sp = read_next_frame_reg (next_frame, NUM_REGS + MIPS_SP_REGNUM);
else
sp = 0;
temp_saved_regs = xrealloc (temp_saved_regs, SIZEOF_FRAME_SAVED_REGS);
memset (temp_saved_regs, '\0', SIZEOF_FRAME_SAVED_REGS);
PROC_LOW_ADDR (&temp_proc_desc) = start_pc;
- PROC_FRAME_REG (&temp_proc_desc) = SP_REGNUM;
+ PROC_FRAME_REG (&temp_proc_desc) = MIPS_SP_REGNUM;
PROC_PC_REG (&temp_proc_desc) = RA_REGNUM;
if (start_pc + 200 < limit_pc)
struct obj_section *sec;
struct mips_objfile_private *priv;
- if (DEPRECATED_PC_IN_CALL_DUMMY (pc, 0, 0))
- return NULL;
-
find_pc_partial_function (pc, NULL, &startaddr, NULL);
if (addrptr)
*addrptr = startaddr;
}
static CORE_ADDR
-mips_eabi_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
+mips_eabi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
struct regcache *regcache, CORE_ADDR bp_addr,
int nargs, struct value **args, CORE_ADDR sp,
int struct_return, CORE_ADDR struct_addr)
int len = 0;
int stack_offset = 0;
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ CORE_ADDR func_addr = find_function_addr (function, NULL);
/* For shared libraries, "t9" needs to point at the function
address. */
register-sized pieces. Large arguments are split between
registers and stack. */
/* Note: structs whose size is not a multiple of
- mips_isa_regsize() are treated specially: Irix cc passes them
- in registers where gcc sometimes puts them on the stack.
- For maximum compatibility, we will put them in both
- places. */
+ mips_abi_regsize() are treated specially: Irix cc passes
+ them in registers where gcc sometimes puts them on the
+ stack. For maximum compatibility, we will put them in
+ both places. */
int odd_sized_struct = ((len > mips_abi_regsize (gdbarch))
&& (len % mips_abi_regsize (gdbarch) != 0));
fprintf_unfiltered (gdb_stdlog, "\n");
}
- regcache_cooked_write_signed (regcache, SP_REGNUM, sp);
+ regcache_cooked_write_signed (regcache, MIPS_SP_REGNUM, sp);
/* Return adjusted stack pointer. */
return sp;
/* N32/N64 ABI stuff. */
static CORE_ADDR
-mips_n32n64_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
+mips_n32n64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
struct regcache *regcache, CORE_ADDR bp_addr,
int nargs, struct value **args, CORE_ADDR sp,
int struct_return, CORE_ADDR struct_addr)
int len = 0;
int stack_offset = 0;
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ CORE_ADDR func_addr = find_function_addr (function, NULL);
/* For shared libraries, "t9" needs to point at the function
address. */
register-sized pieces. Large arguments are split between
registers and stack. */
/* Note: structs whose size is not a multiple of
- mips_isa_regsize() are treated specially: Irix cc passes them
- in registers where gcc sometimes puts them on the stack.
- For maximum compatibility, we will put them in both
- places. */
+ mips_abi_regsize() are treated specially: Irix cc passes
+ them in registers where gcc sometimes puts them on the
+ stack. For maximum compatibility, we will put them in
+ both places. */
int odd_sized_struct = ((len > mips_abi_regsize (gdbarch))
&& (len % mips_abi_regsize (gdbarch) != 0));
/* Note: Floating-point values that didn't fit into an FP
fprintf_unfiltered (gdb_stdlog, "\n");
}
- regcache_cooked_write_signed (regcache, SP_REGNUM, sp);
+ regcache_cooked_write_signed (regcache, MIPS_SP_REGNUM, sp);
/* Return adjusted stack pointer. */
return sp;
/* O32 ABI stuff. */
static CORE_ADDR
-mips_o32_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
+mips_o32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
struct regcache *regcache, CORE_ADDR bp_addr,
int nargs, struct value **args, CORE_ADDR sp,
int struct_return, CORE_ADDR struct_addr)
int len = 0;
int stack_offset = 0;
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ CORE_ADDR func_addr = find_function_addr (function, NULL);
/* For shared libraries, "t9" needs to point at the function
address. */
register-sized pieces. Large arguments are split between
registers and stack. */
/* Note: structs whose size is not a multiple of
- mips_isa_regsize() are treated specially: Irix cc passes them
- in registers where gcc sometimes puts them on the stack.
- For maximum compatibility, we will put them in both
- places. */
+ mips_abi_regsize() are treated specially: Irix cc passes
+ them in registers where gcc sometimes puts them on the
+ stack. For maximum compatibility, we will put them in
+ both places. */
int odd_sized_struct = ((len > mips_abi_regsize (gdbarch))
&& (len % mips_abi_regsize (gdbarch) != 0));
/* Structures should be aligned to eight bytes (even arg registers)
fprintf_unfiltered (gdb_stdlog, "\n");
}
- regcache_cooked_write_signed (regcache, SP_REGNUM, sp);
+ regcache_cooked_write_signed (regcache, MIPS_SP_REGNUM, sp);
/* Return adjusted stack pointer. */
return sp;
ABI. */
static CORE_ADDR
-mips_o64_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
+mips_o64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
struct regcache *regcache, CORE_ADDR bp_addr,
int nargs,
struct value **args, CORE_ADDR sp,
int len = 0;
int stack_offset = 0;
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ CORE_ADDR func_addr = find_function_addr (function, NULL);
/* For shared libraries, "t9" needs to point at the function
address. */
register-sized pieces. Large arguments are split between
registers and stack. */
/* Note: structs whose size is not a multiple of
- mips_isa_regsize() are treated specially: Irix cc passes them
- in registers where gcc sometimes puts them on the stack.
- For maximum compatibility, we will put them in both
- places. */
+ mips_abi_regsize() are treated specially: Irix cc passes
+ them in registers where gcc sometimes puts them on the
+ stack. For maximum compatibility, we will put them in
+ both places. */
int odd_sized_struct = ((len > mips_abi_regsize (gdbarch))
&& (len % mips_abi_regsize (gdbarch) != 0));
/* Structures should be aligned to eight bytes (even arg registers)
fprintf_unfiltered (gdb_stdlog, "\n");
}
- regcache_cooked_write_signed (regcache, SP_REGNUM, sp);
+ regcache_cooked_write_signed (regcache, MIPS_SP_REGNUM, sp);
/* Return adjusted stack pointer. */
return sp;
struct gdbarch *gdbarch = get_frame_arch (frame);
/* do values for GP (int) regs */
char raw_buffer[MAX_REGISTER_SIZE];
- int ncols = (mips_isa_regsize (gdbarch) == 8 ? 4 : 8); /* display cols per row */
+ int ncols = (mips_abi_regsize (gdbarch) == 8 ? 4 : 8); /* display cols per row */
int col, byte;
int regnum;
TYPE_CODE_FLT)
break; /* end the row: reached FP register */
fprintf_filtered (file,
- mips_isa_regsize (current_gdbarch) == 8 ? "%17s" : "%9s",
+ mips_abi_regsize (current_gdbarch) == 8 ? "%17s" : "%9s",
REGISTER_NAME (regnum));
col++;
}
error ("can't read register %d (%s)", regnum, REGISTER_NAME (regnum));
/* pad small registers */
for (byte = 0;
- byte < (mips_isa_regsize (current_gdbarch)
+ byte < (mips_abi_regsize (current_gdbarch)
- register_size (current_gdbarch, regnum)); byte++)
printf_filtered (" ");
/* Now print the register value in hex, endian order. */
return mips32_skip_prologue (pc);
}
-/* Exported procedure: Is PC in the signal trampoline code */
-
-static int
-mips_pc_in_sigtramp (CORE_ADDR pc, char *ignore)
-{
- if (sigtramp_address == 0)
- fixup_sigtramp ();
- return (pc >= sigtramp_address && pc < sigtramp_end);
-}
-
/* Root of all "set mips "/"show mips " commands. This will eventually be
used for all MIPS-specific commands. */
}
-/* Return non-zero if the PC is in a library helper function that should
- be ignored. This implements the IGNORE_HELPER_CALL macro. */
+/* Return non-zero if the PC is in a library helper function that
+ should be ignored. This implements the
+ DEPRECATED_IGNORE_HELPER_CALL macro. */
int
mips_ignore_helper (CORE_ADDR pc)
if (found_abi == MIPS_ABI_UNKNOWN && info.abfd != NULL)
bfd_map_over_sections (info.abfd, mips_find_abi_section, &found_abi);
- /* If we have no usefu BFD information, use the ABI from the last
+ /* If we have no useful BFD information, use the ABI from the last
MIPS architecture (if there is one). */
if (found_abi == MIPS_ABI_UNKNOWN && info.abfd == NULL && arches != NULL)
found_abi = gdbarch_tdep (arches->gdbarch)->found_abi;
case bfd_mach_mips3900:
case bfd_mach_mips4100:
case bfd_mach_mips4111:
+ case bfd_mach_mips4120:
fpu_type = MIPS_FPU_NONE;
break;
case bfd_mach_mips4650:
}
/* FIXME: cagney/2003-11-15: For MIPS, hasn't PC_REGNUM been
replaced by read_pc? */
- set_gdbarch_pc_regnum (gdbarch, regnum->pc);
+ set_gdbarch_pc_regnum (gdbarch, regnum->pc + num_regs);
+ set_gdbarch_sp_regnum (gdbarch, MIPS_SP_REGNUM + num_regs);
set_gdbarch_fp0_regnum (gdbarch, regnum->fp0);
set_gdbarch_num_regs (gdbarch, num_regs);
set_gdbarch_num_pseudo_regs (gdbarch, num_regs);
set_gdbarch_long_bit (gdbarch, 32);
set_gdbarch_ptr_bit (gdbarch, 32);
set_gdbarch_long_long_bit (gdbarch, 64);
- set_gdbarch_use_struct_convention (gdbarch,
- always_use_struct_convention);
+ set_gdbarch_deprecated_use_struct_convention (gdbarch, always_use_struct_convention);
break;
case MIPS_ABI_EABI32:
set_gdbarch_push_dummy_call (gdbarch, mips_eabi_push_dummy_call);
set_gdbarch_long_long_bit (gdbarch, 64);
set_gdbarch_deprecated_reg_struct_has_addr
(gdbarch, mips_eabi_reg_struct_has_addr);
- set_gdbarch_use_struct_convention (gdbarch,
- mips_eabi_use_struct_convention);
+ set_gdbarch_deprecated_use_struct_convention (gdbarch, mips_eabi_use_struct_convention);
break;
case MIPS_ABI_EABI64:
set_gdbarch_push_dummy_call (gdbarch, mips_eabi_push_dummy_call);
set_gdbarch_long_long_bit (gdbarch, 64);
set_gdbarch_deprecated_reg_struct_has_addr
(gdbarch, mips_eabi_reg_struct_has_addr);
- set_gdbarch_use_struct_convention (gdbarch,
- mips_eabi_use_struct_convention);
+ set_gdbarch_deprecated_use_struct_convention (gdbarch, mips_eabi_use_struct_convention);
break;
case MIPS_ABI_N32:
set_gdbarch_push_dummy_call (gdbarch, mips_n32n64_push_dummy_call);
set_gdbarch_register_type (gdbarch, mips_register_type);
set_gdbarch_print_registers_info (gdbarch, mips_print_registers_info);
- set_gdbarch_deprecated_pc_in_sigtramp (gdbarch, mips_pc_in_sigtramp);
set_gdbarch_print_insn (gdbarch, gdb_print_insn_mips);
"mips_dump_tdep: FIRST_EMBED_REGNUM = %d\n",
FIRST_EMBED_REGNUM);
fprintf_unfiltered (file,
- "mips_dump_tdep: IGNORE_HELPER_CALL # %s\n",
- XSTRING (IGNORE_HELPER_CALL (PC)));
+ "mips_dump_tdep: DEPRECATED_IGNORE_HELPER_CALL # %s\n",
+ XSTRING (DEPRECATED_IGNORE_HELPER_CALL (PC)));
fprintf_unfiltered (file,
"mips_dump_tdep: IN_SOLIB_CALL_TRAMPOLINE # %s\n",
XSTRING (IN_SOLIB_CALL_TRAMPOLINE (PC, NAME)));
&showmipscmdlist, "show mips ", 0, &showlist);
/* Allow the user to override the saved register size. */
- add_show_from_set (add_set_enum_cmd ("saved-gpreg-size",
- class_obscure,
- size_enums,
- &mips_abi_regsize_string, "\
+ deprecated_add_show_from_set (add_set_enum_cmd ("saved-gpreg-size",
+ class_obscure,
+ size_enums,
+ &mips_abi_regsize_string, "\
Set size of general purpose registers saved on the stack.\n\
This option can be set to one of:\n\
32 - Force GDB to treat saved GP registers as 32-bit\n\
(default: auto)", &setmipscmdlist), &showmipscmdlist);
/* Allow the user to override the argument stack size. */
- add_show_from_set (add_set_enum_cmd ("stack-arg-size",
- class_obscure,
- size_enums,
- &mips_stack_argsize_string, "\
+ deprecated_add_show_from_set
+ (add_set_enum_cmd ("stack-arg-size",
+ class_obscure,
+ size_enums,
+ &mips_stack_argsize_string, "\
Set the amount of stack space reserved for each argument.\n\
This option can be set to one of:\n\
32 - Force GDB to allocate 32-bit chunks per argument\n\
64 - Force GDB to allocate 64-bit chunks per argument\n\
auto - Allow GDB to determine the correct setting from the current\n\
- target and executable (default)", &setmipscmdlist), &showmipscmdlist);
+ target and executable (default)", &setmipscmdlist),
+ &showmipscmdlist);
/* Allow the user to override the ABI. */
c = add_set_enum_cmd
/* We need to throw away the frame cache when we set this, since it
might change our ability to get backtraces. */
set_cmd_sfunc (c, reinit_frame_cache_sfunc);
- add_show_from_set (c, &showlist);
+ deprecated_add_show_from_set (c, &showlist);
/* Allow the user to control whether the upper bits of 64-bit
addresses should be zeroed. */
64 bits for others. Use \"off\" to disable compatibility mode", set_mips64_transfers_32bit_regs, NULL, &setlist, &showlist);
/* Debug this files internals. */
- add_show_from_set (add_set_cmd ("mips", class_maintenance, var_zinteger,
- &mips_debug, "Set mips debugging.\n\
-When non-zero, mips specific debugging is enabled.", &setdebuglist), &showdebuglist);
+ deprecated_add_show_from_set
+ (add_set_cmd ("mips", class_maintenance, var_zinteger,
+ &mips_debug, "Set mips debugging.\n\
+When non-zero, mips specific debugging is enabled.", &setdebuglist),
+ &showdebuglist);
}