import gdb-1999-09-08 snapshot

[deliverable/binutils-gdb.git] / gdb / mips-tdep.c

diff --git a/gdb/mips-tdep.c b/gdb/mips-tdep.c
index 73429dca1bd26dff85820f59076307e748b872f9..b54b753a07365ee6f444f96a8d67d00b40186efa 100644 (file)
--- a/gdb/mips-tdep.c
+++ b/gdb/mips-tdep.c
@@ -1,6 +1,5 @@
 /* Target-dependent code for the MIPS architecture, for GDB, the GNU Debugger.
-   Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998
-   Free Software Foundation, Inc.
+   Copyright 1988-1999, Free Software Foundation, Inc.
    Contributed by Alessandro Forin(af@cs.cmu.edu) at CMU
    and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin.
 
@@ -88,8 +87,6 @@ static CORE_ADDR heuristic_proc_start PARAMS ((CORE_ADDR));
 
 static CORE_ADDR read_next_frame_reg PARAMS ((struct frame_info *, int));
 
-void mips_set_processor_type_command PARAMS ((char *, int));
-
 int mips_set_processor_type PARAMS ((char *));
 
 static void mips_show_processor_type_command PARAMS ((char *, int));
@@ -248,9 +245,9 @@ mips_print_extra_frame_info (fi)
       && fi->extra_info
       && fi->extra_info->proc_desc
       && fi->extra_info->proc_desc->pdr.framereg < NUM_REGS)
-    printf_filtered (" frame pointer is at %s+%d\n",
+    printf_filtered (" frame pointer is at %s+%s\n",
                     REGISTER_NAME (fi->extra_info->proc_desc->pdr.framereg),
-                    fi->extra_info->proc_desc->pdr.frameoffset);
+                    paddr_d (fi->extra_info->proc_desc->pdr.frameoffset));
 }
 
 /* Convert between RAW and VIRTUAL registers.  The RAW register size
@@ -690,8 +687,8 @@ static void
 print_unpack (char *comment,
              struct upk_mips16 *u)
 {
-  printf ("%s %04x ,f(%d) off(%08x) (x(%x) y(%x)\n",
-         comment, u->inst, u->fmt, u->offset, u->regx, u->regy);
+  printf ("%s %04x ,f(%d) off(%s) (x(%x) y(%x)\n",
+         comment, u->inst, u->fmt, paddr (u->offset), u->regx, u->regy);
 }
 
 /* The EXT-I, EXT-ri nad EXT-I8 instructions all have the same
@@ -2032,10 +2029,16 @@ mips_push_arguments (nargs, args, sp, struct_return, struct_addr)
            {
              /* This is a floating point value that fits entirely
                 in a single register.  */
+             /* On 32 bit ABI's the float_argreg is further adjusted
+                 above to ensure that it is even register aligned. */
              CORE_ADDR regval = extract_address (val, len);
              write_register (float_argreg++, regval);
              if (!MIPS_EABI)
                {
+                 /* CAGNEY: 32 bit MIPS ABI's always reserve two FP
+                     registers for each argument.  The below is (my
+                     guess) to ensure that the corresponding integer
+                     register has reserved the same space. */
                  write_register (argreg, regval);
                  argreg += FP_REGISTER_DOUBLE ? 1 : 2;
                }