#include "symcat.h"
#include "sim-regno.h"
#include "dis-asm.h"
+#include "frame-unwind.h"
+#include "frame-base.h"
+#include "trad-frame.h"
+#include "infcall.h"
+
+static const struct objfile_data *mips_pdr_data;
static void set_reg_offset (CORE_ADDR *saved_regs, int regnum, CORE_ADDR off);
static struct type *mips_register_type (struct gdbarch *gdbarch, int regnum);
};
/* Some MIPS boards don't support floating point while others only
- support single-precision floating-point operations. See also
- FP_REGISTER_DOUBLE. */
+ support single-precision floating-point operations. */
enum mips_fpu_type
{
enum mips_fpu_type mips_fpu_type;
int mips_last_arg_regnum;
int mips_last_fp_arg_regnum;
- int mips_default_saved_regsize;
- int mips_fp_register_double;
- int mips_default_stack_argsize;
int default_mask_address_p;
/* Is the target using 64-bit raw integer registers but only
storing a left-aligned 32-bit value in each? */
}
int
-mips_regsize (struct gdbarch *gdbarch)
+mips_isa_regsize (struct gdbarch *gdbarch)
{
return (gdbarch_bfd_arch_info (gdbarch)->bits_per_word
/ gdbarch_bfd_arch_info (gdbarch)->bits_per_byte);
/* Return the currently configured (or set) saved register size. */
-static const char *mips_saved_regsize_string = size_auto;
+static const char *mips_abi_regsize_string = size_auto;
static unsigned int
-mips_saved_regsize (struct gdbarch_tdep *tdep)
+mips_abi_regsize (struct gdbarch *gdbarch)
{
- if (mips_saved_regsize_string == size_auto)
- return tdep->mips_default_saved_regsize;
- else if (mips_saved_regsize_string == size_64)
+ if (mips_abi_regsize_string == size_auto)
+ switch (mips_abi (gdbarch))
+ {
+ case MIPS_ABI_EABI32:
+ case MIPS_ABI_O32:
+ return 4;
+ case MIPS_ABI_N32:
+ case MIPS_ABI_N64:
+ case MIPS_ABI_O64:
+ case MIPS_ABI_EABI64:
+ return 8;
+ case MIPS_ABI_UNKNOWN:
+ case MIPS_ABI_LAST:
+ default:
+ internal_error (__FILE__, __LINE__, "bad switch");
+ }
+ else if (mips_abi_regsize_string == size_64)
return 8;
- else /* if (mips_saved_regsize_string == size_32) */
+ else /* if (mips_abi_regsize_string == size_32) */
return 4;
}
enum bfd_endian endian, bfd_byte * in,
const bfd_byte * out, int buf_offset)
{
- bfd_byte reg[MAX_REGISTER_SIZE];
int reg_offset = 0;
gdb_assert (reg_num >= NUM_REGS);
/* Need to transfer the left or right part of the register, based on
return 0;
}
-/* Indicate that the ABI makes use of double-precision registers
- provided by the FPU (rather than combining pairs of registers to
- form double-precision values). See also MIPS_FPU_TYPE. */
-#define FP_REGISTER_DOUBLE (gdbarch_tdep (current_gdbarch)->mips_fp_register_double)
-
/* The amount of space reserved on the stack for registers. This is
- different to MIPS_SAVED_REGSIZE as it determines the alignment of
+ different to MIPS_ABI_REGSIZE as it determines the alignment of
data allocated after the registers have run out. */
static const char *mips_stack_argsize_string = size_auto;
static unsigned int
-mips_stack_argsize (struct gdbarch_tdep *tdep)
+mips_stack_argsize (struct gdbarch *gdbarch)
{
if (mips_stack_argsize_string == size_auto)
- return tdep->mips_default_stack_argsize;
+ return mips_abi_regsize (gdbarch);
else if (mips_stack_argsize_string == size_64)
return 8;
else /* if (mips_stack_argsize_string == size_32) */
&& (regnum % NUM_REGS) < mips_regnum (current_gdbarch)->fp0 + 32)
{
/* The floating-point registers raw, or cooked, always match
- mips_regsize(), and also map 1:1, byte for byte. */
+ mips_isa_regsize(), and also map 1:1, byte for byte. */
switch (gdbarch_byte_order (gdbarch))
{
case BFD_ENDIAN_BIG:
- if (mips_regsize (gdbarch) == 4)
+ if (mips_isa_regsize (gdbarch) == 4)
return builtin_type_ieee_single_big;
else
return builtin_type_ieee_double_big;
case BFD_ENDIAN_LITTLE:
- if (mips_regsize (gdbarch) == 4)
+ if (mips_isa_regsize (gdbarch) == 4)
return builtin_type_ieee_single_little;
else
return builtin_type_ieee_double_little;
internal_error (__FILE__, __LINE__, "bad switch");
}
}
- else if (regnum >=
- (NUM_REGS + mips_regnum (current_gdbarch)->fp_control_status)
- && regnum <= NUM_REGS + LAST_EMBED_REGNUM)
- /* The pseudo/cooked view of the embedded registers is always
- 32-bit. The raw view is handled below. */
- return builtin_type_int32;
- else if (regnum >= NUM_REGS && mips_regsize (gdbarch)
- && gdbarch_tdep (gdbarch)->mips64_transfers_32bit_regs_p)
- /* The target, while using a 64-bit register buffer, is only
- transfering 32-bits of each integer register. Reflect this in
- the cooked/pseudo register value. */
- return builtin_type_int32;
- else if (mips_regsize (gdbarch) == 8)
- /* 64-bit ISA. */
- return builtin_type_int64;
+ else if (regnum < NUM_REGS)
+ {
+ /* The raw or ISA registers. These are all sized according to
+ the ISA regsize. */
+ if (mips_isa_regsize (gdbarch) == 4)
+ return builtin_type_int32;
+ else
+ return builtin_type_int64;
+ }
else
- /* 32-bit ISA. */
- return builtin_type_int32;
+ {
+ /* The cooked or ABI registers. These are sized according to
+ the ABI (with a few complications). */
+ if (regnum >= (NUM_REGS
+ + mips_regnum (current_gdbarch)->fp_control_status)
+ && regnum <= NUM_REGS + LAST_EMBED_REGNUM)
+ /* The pseudo/cooked view of the embedded registers is always
+ 32-bit. The raw view is handled below. */
+ return builtin_type_int32;
+ else if (gdbarch_tdep (gdbarch)->mips64_transfers_32bit_regs_p)
+ /* The target, while possibly using a 64-bit register buffer,
+ is only transfering 32-bits of each integer register.
+ Reflect this in the cooked/pseudo (ABI) register value. */
+ return builtin_type_int32;
+ else if (mips_abi_regsize (gdbarch) == 4)
+ /* The ABI is restricted to 32-bit registers (the ISA could be
+ 32- or 64-bit). */
+ return builtin_type_int32;
+ else
+ /* 64-bit ABI. */
+ return builtin_type_int64;
+ }
}
/* TARGET_READ_SP -- Remove useless bits from the stack pointer. */
return read_signed_register_pid (mips_regnum (current_gdbarch)->pc, ptid);
}
+static CORE_ADDR
+mips_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
+{
+ return frame_unwind_register_signed (next_frame,
+ NUM_REGS + mips_regnum (gdbarch)->pc);
+}
+
+/* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
+ dummy frame. The frame ID's base needs to match the TOS value
+ saved by save_dummy_frame_tos(), and the PC match the dummy frame's
+ breakpoint. */
+
+static struct frame_id
+mips_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
+{
+ return frame_id_build (frame_unwind_register_signed (next_frame, NUM_REGS + SP_REGNUM),
+ frame_pc_unwind (next_frame));
+}
+
static void
mips_write_pc (CORE_ADDR pc, ptid_t ptid)
{
return extract_unsigned_integer (buf, instlen);
}
+static ULONGEST
+mips16_fetch_instruction (CORE_ADDR addr)
+{
+ char buf[MIPS_INSTLEN];
+ int instlen;
+ int status;
+
+ instlen = MIPS16_INSTLEN;
+ addr = unmake_mips16_addr (addr);
+ status = read_memory_nobpt (addr, buf, instlen);
+ if (status)
+ memory_error (status, addr);
+ return extract_unsigned_integer (buf, instlen);
+}
+
+static ULONGEST
+mips32_fetch_instruction (CORE_ADDR addr)
+{
+ char buf[MIPS_INSTLEN];
+ int instlen;
+ int status;
+ instlen = MIPS_INSTLEN;
+ status = read_memory_nobpt (addr, buf, instlen);
+ if (status)
+ memory_error (status, addr);
+ return extract_unsigned_integer (buf, instlen);
+}
+
/* These the fields of 32 bit mips instructions */
#define mips32_op(x) (x >> 26)
return mips32_next_pc (pc);
}
-/* Set up the 'saved_regs' array. This is a data structure containing
- the addresses on the stack where each register has been saved, for
- each stack frame. Registers that have not been saved will have
- zero here. The stack pointer register is special: rather than the
- address where the stack register has been saved,
- saved_regs[SP_REGNUM] will have the actual value of the previous
- frame's stack register. */
+struct mips_frame_cache
+{
+ CORE_ADDR base;
+ struct trad_frame_saved_reg *saved_regs;
+};
+
-static void
-mips_find_saved_regs (struct frame_info *fci)
+static struct mips_frame_cache *
+mips_mdebug_frame_cache (struct frame_info *next_frame, void **this_cache)
{
- int ireg;
+ mips_extra_func_info_t proc_desc;
+ struct mips_frame_cache *cache;
+ struct gdbarch *gdbarch = get_frame_arch (next_frame);
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
/* r0 bit means kernel trap */
int kernel_trap;
/* What registers have been saved? Bitmasks. */
unsigned long gen_mask, float_mask;
- mips_extra_func_info_t proc_desc;
- t_inst inst;
- CORE_ADDR *saved_regs;
- struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
- if (deprecated_get_frame_saved_regs (fci) != NULL)
- return;
- saved_regs = frame_saved_regs_zalloc (fci);
-
- /* If it is the frame for sigtramp, the saved registers are located
- in a sigcontext structure somewhere on the stack. If the stack
- layout for sigtramp changes we might have to change these
- constants and the companion fixup_sigtramp in mdebugread.c */
-#ifndef SIGFRAME_BASE
- /* To satisfy alignment restrictions, sigcontext is located 4 bytes
- above the sigtramp frame. */
-#define SIGFRAME_BASE mips_regsize (current_gdbarch)
-/* FIXME! Are these correct?? */
-#define SIGFRAME_PC_OFF (SIGFRAME_BASE + 2 * mips_regsize (current_gdbarch))
-#define SIGFRAME_REGSAVE_OFF (SIGFRAME_BASE + 3 * mips_regsize (current_gdbarch))
-#define SIGFRAME_FPREGSAVE_OFF \
- (SIGFRAME_REGSAVE_OFF + MIPS_NUMREGS * mips_regsize (current_gdbarch) + 3 * mips_regsize (current_gdbarch))
-#endif
- if ((get_frame_type (fci) == SIGTRAMP_FRAME))
- {
- for (ireg = 0; ireg < MIPS_NUMREGS; ireg++)
- {
- CORE_ADDR reg_position =
- (get_frame_base (fci) + SIGFRAME_REGSAVE_OFF +
- ireg * mips_regsize (current_gdbarch));
- set_reg_offset (saved_regs, ireg, reg_position);
- }
- for (ireg = 0; ireg < MIPS_NUMREGS; ireg++)
- {
- CORE_ADDR reg_position = (get_frame_base (fci)
- + SIGFRAME_FPREGSAVE_OFF
- + ireg * mips_regsize (current_gdbarch));
- set_reg_offset (saved_regs,
- mips_regnum (current_gdbarch)->fp0 + ireg,
- reg_position);
- }
-
- set_reg_offset (saved_regs, mips_regnum (current_gdbarch)->pc,
- get_frame_base (fci) + SIGFRAME_PC_OFF);
- /* SP_REGNUM, contains the value and not the address. */
- set_reg_offset (saved_regs, SP_REGNUM, get_frame_base (fci));
- return;
- }
+ if ((*this_cache) != NULL)
+ return (*this_cache);
+ cache = FRAME_OBSTACK_ZALLOC (struct mips_frame_cache);
+ (*this_cache) = cache;
+ cache->saved_regs = trad_frame_alloc_saved_regs (next_frame);
- proc_desc = get_frame_extra_info (fci)->proc_desc;
+ /* Get the mdebug proc descriptor. */
+ proc_desc = find_proc_desc (frame_pc_unwind (next_frame), next_frame, 1);
if (proc_desc == NULL)
/* I'm not sure how/whether this can happen. Normally when we
can't find a proc_desc, we "synthesize" one using
heuristic_proc_desc and set the saved_regs right away. */
- return;
+ return cache;
+
+ /* Extract the frame's base. */
+ cache->base = (frame_unwind_register_signed (next_frame, NUM_REGS + PROC_FRAME_REG (proc_desc))
+ + PROC_FRAME_OFFSET (proc_desc) - PROC_FRAME_ADJUST (proc_desc));
kernel_trap = PROC_REG_MASK (proc_desc) & 1;
gen_mask = kernel_trap ? 0xFFFFFFFF : PROC_REG_MASK (proc_desc);
float_mask = kernel_trap ? 0xFFFFFFFF : PROC_FREG_MASK (proc_desc);
-
- if ( /* In any frame other than the innermost or a frame interrupted
- by a signal, we assume that all registers have been saved.
- This assumes that all register saves in a function happen
- before the first function call. */
- (get_next_frame (fci) == NULL
- || (get_frame_type (get_next_frame (fci)) == SIGTRAMP_FRAME))
- /* In a dummy frame we know exactly where things are saved. */
- && !PROC_DESC_IS_DUMMY (proc_desc)
- /* Don't bother unless we are inside a function prologue.
- Outside the prologue, we know where everything is. */
- && in_prologue (get_frame_pc (fci), PROC_LOW_ADDR (proc_desc))
- /* Not sure exactly what kernel_trap means, but if it means the
- kernel saves the registers without a prologue doing it, we
- better not examine the prologue to see whether registers
- have been saved yet. */
- && !kernel_trap)
+
+ /* In any frame other than the innermost or a frame interrupted by a
+ signal, we assume that all registers have been saved. This
+ assumes that all register saves in a function happen before the
+ first function call. */
+ if (in_prologue (frame_pc_unwind (next_frame), PROC_LOW_ADDR (proc_desc))
+ /* Not sure exactly what kernel_trap means, but if it means the
+ kernel saves the registers without a prologue doing it, we
+ better not examine the prologue to see whether registers
+ have been saved yet. */
+ && !kernel_trap)
{
/* We need to figure out whether the registers that the
proc_desc claims are saved have been saved yet. */
/* Bitmasks; set if we have found a save for the register. */
unsigned long gen_save_found = 0;
unsigned long float_save_found = 0;
- int instlen;
+ int mips16;
/* If the address is odd, assume this is MIPS16 code. */
addr = PROC_LOW_ADDR (proc_desc);
- instlen = pc_is_mips16 (addr) ? MIPS16_INSTLEN : MIPS_INSTLEN;
+ mips16 = pc_is_mips16 (addr);
/* Scan through this function's instructions preceding the
current PC, and look for those that save registers. */
- while (addr < get_frame_pc (fci))
+ while (addr < frame_pc_unwind (next_frame))
{
- inst = mips_fetch_instruction (addr);
- if (pc_is_mips16 (addr))
- mips16_decode_reg_save (inst, &gen_save_found);
+ if (mips16)
+ {
+ mips16_decode_reg_save (mips16_fetch_instruction (addr),
+ &gen_save_found);
+ addr += MIPS16_INSTLEN;
+ }
else
- mips32_decode_reg_save (inst, &gen_save_found, &float_save_found);
- addr += instlen;
+ {
+ mips32_decode_reg_save (mips32_fetch_instruction (addr),
+ &gen_save_found, &float_save_found);
+ addr += MIPS_INSTLEN;
+ }
}
gen_mask = gen_save_found;
float_mask = float_save_found;
/* Fill in the offsets for the registers which gen_mask says were
saved. */
{
- CORE_ADDR reg_position = (get_frame_base (fci)
+ CORE_ADDR reg_position = (cache->base
+ PROC_REG_OFFSET (proc_desc));
+ int ireg;
for (ireg = MIPS_NUMREGS - 1; gen_mask; --ireg, gen_mask <<= 1)
if (gen_mask & 0x80000000)
{
- set_reg_offset (saved_regs, ireg, reg_position);
- reg_position -= mips_saved_regsize (tdep);
+ cache->saved_regs[NUM_REGS + ireg].addr = reg_position;
+ reg_position -= mips_abi_regsize (gdbarch);
}
}
instruction that saves $s0 or $s1, correct their saved addresses. */
if (pc_is_mips16 (PROC_LOW_ADDR (proc_desc)))
{
- inst = mips_fetch_instruction (PROC_LOW_ADDR (proc_desc));
+ ULONGEST inst = mips16_fetch_instruction (PROC_LOW_ADDR (proc_desc));
if ((inst & 0xf81f) == 0xe809 && (inst & 0x700) != 0x700)
/* entry */
{
int sreg_count = (inst >> 6) & 3;
/* Check if the ra register was pushed on the stack. */
- CORE_ADDR reg_position = (get_frame_base (fci)
+ CORE_ADDR reg_position = (cache->base
+ PROC_REG_OFFSET (proc_desc));
if (inst & 0x20)
- reg_position -= mips_saved_regsize (tdep);
+ reg_position -= mips_abi_regsize (gdbarch);
/* Check if the s0 and s1 registers were pushed on the
stack. */
+ /* NOTE: cagney/2004-02-08: Huh? This is doing no such
+ check. */
for (reg = 16; reg < sreg_count + 16; reg++)
{
- set_reg_offset (saved_regs, reg, reg_position);
- reg_position -= mips_saved_regsize (tdep);
+ cache->saved_regs[NUM_REGS + reg].addr = reg_position;
+ reg_position -= mips_abi_regsize (gdbarch);
}
}
}
/* Fill in the offsets for the registers which float_mask says were
saved. */
{
- CORE_ADDR reg_position = (get_frame_base (fci)
+ CORE_ADDR reg_position = (cache->base
+ PROC_FREG_OFFSET (proc_desc));
-
+ int ireg;
/* Fill in the offsets for the float registers which float_mask
says were saved. */
for (ireg = MIPS_NUMREGS - 1; float_mask; --ireg, float_mask <<= 1)
if (float_mask & 0x80000000)
{
- if (mips_saved_regsize (tdep) == 4
+ if (mips_abi_regsize (gdbarch) == 4
&& TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
{
/* On a big endian 32 bit ABI, floating point registers
reg_position is decremented each time through the
loop). */
if ((ireg & 1))
- set_reg_offset (saved_regs,
- mips_regnum (current_gdbarch)->fp0 + ireg,
- reg_position - mips_saved_regsize (tdep));
+ cache->saved_regs[NUM_REGS + mips_regnum (current_gdbarch)->fp0 + ireg]
+ .addr = reg_position - mips_abi_regsize (gdbarch);
else
- set_reg_offset (saved_regs,
- mips_regnum (current_gdbarch)->fp0 + ireg,
- reg_position + mips_saved_regsize (tdep));
+ cache->saved_regs[NUM_REGS + mips_regnum (current_gdbarch)->fp0 + ireg]
+ .addr = reg_position + mips_abi_regsize (gdbarch);
}
else
- set_reg_offset (saved_regs,
- mips_regnum (current_gdbarch)->fp0 + ireg,
- reg_position);
- reg_position -= mips_saved_regsize (tdep);
+ cache->saved_regs[NUM_REGS + mips_regnum (current_gdbarch)->fp0 + ireg]
+ .addr = reg_position;
+ reg_position -= mips_abi_regsize (gdbarch);
}
- set_reg_offset (saved_regs, mips_regnum (current_gdbarch)->pc,
- saved_regs[RA_REGNUM]);
+ cache->saved_regs[NUM_REGS + mips_regnum (current_gdbarch)->pc]
+ = cache->saved_regs[NUM_REGS + RA_REGNUM];
}
/* SP_REGNUM, contains the value and not the address. */
- set_reg_offset (saved_regs, SP_REGNUM, get_frame_base (fci));
+ trad_frame_set_value (cache->saved_regs, NUM_REGS + SP_REGNUM, cache->base);
+
+ return (*this_cache);
+}
+
+static void
+mips_mdebug_frame_this_id (struct frame_info *next_frame, void **this_cache,
+ struct frame_id *this_id)
+{
+ struct mips_frame_cache *info = mips_mdebug_frame_cache (next_frame,
+ this_cache);
+ (*this_id) = frame_id_build (info->base, frame_func_unwind (next_frame));
+}
+
+static void
+mips_mdebug_frame_prev_register (struct frame_info *next_frame,
+ void **this_cache,
+ int regnum, int *optimizedp,
+ enum lval_type *lvalp, CORE_ADDR *addrp,
+ int *realnump, void *valuep)
+{
+ struct mips_frame_cache *info = mips_mdebug_frame_cache (next_frame,
+ this_cache);
+ trad_frame_prev_register (next_frame, info->saved_regs, regnum,
+ optimizedp, lvalp, addrp, realnump, valuep);
+}
+
+static const struct frame_unwind mips_mdebug_frame_unwind =
+{
+ NORMAL_FRAME,
+ mips_mdebug_frame_this_id,
+ mips_mdebug_frame_prev_register
+};
+
+static const struct frame_unwind *
+mips_mdebug_frame_sniffer (struct frame_info *next_frame)
+{
+ return &mips_mdebug_frame_unwind;
+}
+
+static CORE_ADDR
+mips_mdebug_frame_base_address (struct frame_info *next_frame,
+ void **this_cache)
+{
+ struct mips_frame_cache *info = mips_mdebug_frame_cache (next_frame,
+ this_cache);
+ return info->base;
+}
+
+static const struct frame_base mips_mdebug_frame_base = {
+ &mips_mdebug_frame_unwind,
+ mips_mdebug_frame_base_address,
+ mips_mdebug_frame_base_address,
+ mips_mdebug_frame_base_address
+};
+
+static const struct frame_base *
+mips_mdebug_frame_base_sniffer (struct frame_info *next_frame)
+{
+ return &mips_mdebug_frame_base;
}
static CORE_ADDR
target_remove_breakpoint (next_pc, break_mem);
}
-static CORE_ADDR
-mips_init_frame_pc_first (int fromleaf, struct frame_info *prev)
-{
- CORE_ADDR pc, tmp;
-
- pc = ((fromleaf)
- ? DEPRECATED_SAVED_PC_AFTER_CALL (get_next_frame (prev))
- : get_next_frame (prev)
- ? DEPRECATED_FRAME_SAVED_PC (get_next_frame (prev)) : read_pc ());
- tmp = SKIP_TRAMPOLINE_CODE (pc);
- return tmp ? tmp : pc;
-}
-
-
-static CORE_ADDR
-mips_frame_saved_pc (struct frame_info *frame)
-{
- CORE_ADDR saved_pc;
- struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
-
- if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame), 0, 0))
- {
- /* Always unwind the cooked PC register value. */
- saved_pc = frame_unwind_register_signed (frame, NUM_REGS + mips_regnum (current_gdbarch)->pc);
- }
- else
- {
- mips_extra_func_info_t proc_desc
- = get_frame_extra_info (frame)->proc_desc;
- if (proc_desc && PROC_DESC_IS_DUMMY (proc_desc))
- saved_pc = read_memory_integer ((get_frame_base (frame)
- - mips_saved_regsize (tdep)),
- mips_saved_regsize (tdep));
- else
- {
- /* We have to get the saved pc from the sigcontext if it is
- a signal handler frame. */
- int pcreg = (get_frame_type (frame) == SIGTRAMP_FRAME
- ? mips_regnum (current_gdbarch)->pc
- : proc_desc ? PROC_PC_REG (proc_desc) : RA_REGNUM);
- saved_pc = read_next_frame_reg (frame, NUM_REGS + pcreg);
- }
- }
- return ADDR_BITS_REMOVE (saved_pc);
-}
-
static struct mips_extra_func_info temp_proc_desc;
/* This hack will go away once the get_prev_frame() code has been
{
static int blurb_printed = 0;
- warning
- ("Warning: GDB can't find the start of the function at 0x%s.",
- paddr_nz (pc));
+ warning ("GDB can't find the start of the function at 0x%s.",
+ paddr_nz (pc));
if (!blurb_printed)
{
{
PROC_REG_MASK (&temp_proc_desc) |= 1 << reg;
set_reg_offset (temp_saved_regs, reg, sp + offset);
- offset += mips_saved_regsize (tdep);
+ offset += mips_abi_regsize (current_gdbarch);
}
/* Check if the ra register was pushed on the stack. */
{
PROC_REG_MASK (&temp_proc_desc) |= 1 << RA_REGNUM;
set_reg_offset (temp_saved_regs, RA_REGNUM, sp + offset);
- offset -= mips_saved_regsize (tdep);
+ offset -= mips_abi_regsize (current_gdbarch);
}
/* Check if the s0 and s1 registers were pushed on the stack. */
{
PROC_REG_MASK (&temp_proc_desc) |= 1 << reg;
set_reg_offset (temp_saved_regs, reg, sp + offset);
- offset -= mips_saved_regsize (tdep);
+ offset -= mips_abi_regsize (current_gdbarch);
}
}
}
}
else if ((high_word & 0xFFE0) == 0xffa0) /* sd reg,offset($sp) */
{
- /* Irix 6.2 N32 ABI uses sd instructions for saving $gp and $ra,
- but the register size used is only 32 bits. Make the address
- for the saved register point to the lower 32 bits. */
+ /* Irix 6.2 N32 ABI uses sd instructions for saving $gp and
+ $ra. */
PROC_REG_MASK (&temp_proc_desc) |= 1 << reg;
- set_reg_offset (temp_saved_regs, reg,
- sp + low_word + 8 - mips_regsize (current_gdbarch));
+ set_reg_offset (temp_saved_regs, reg, sp + low_word);
}
else if (high_word == 0x27be) /* addiu $30,$sp,size */
{
struct obj_section *sec;
struct mips_objfile_private *priv;
- if (DEPRECATED_PC_IN_CALL_DUMMY (pc, 0, 0))
+ if (deprecated_pc_in_call_dummy (pc))
return NULL;
find_pc_partial_function (pc, NULL, &startaddr, NULL);
sec = find_pc_section (pc);
if (sec != NULL)
{
- priv = (struct mips_objfile_private *) sec->objfile->obj_private;
+ priv = (struct mips_objfile_private *) objfile_data (sec->objfile, mips_pdr_data);
/* Search the ".pdr" section generated by GAS. This includes most of
the information normally found in ECOFF PDRs. */
This means that we should not bother with this method on 64-bit
targets (until that is fixed). */
- priv = obstack_alloc (&sec->objfile->psymbol_obstack,
+ priv = obstack_alloc (&sec->objfile->objfile_obstack,
sizeof (struct mips_objfile_private));
priv->size = 0;
- sec->objfile->obj_private = priv;
+ set_objfile_data (sec->objfile, mips_pdr_data, priv);
}
else if (priv == NULL)
{
asection *bfdsec;
- priv = obstack_alloc (&sec->objfile->psymbol_obstack,
+ priv = obstack_alloc (&sec->objfile->objfile_obstack,
sizeof (struct mips_objfile_private));
bfdsec = bfd_get_section_by_name (sec->objfile->obfd, ".pdr");
if (bfdsec != NULL)
{
priv->size = bfd_section_size (sec->objfile->obfd, bfdsec);
- priv->contents = obstack_alloc (&sec->objfile->psymbol_obstack,
+ priv->contents = obstack_alloc (&sec->objfile->objfile_obstack,
priv->size);
bfd_get_section_contents (sec->objfile->obfd, bfdsec,
priv->contents, 0, priv->size);
else
priv->size = 0;
- sec->objfile->obj_private = priv;
+ set_objfile_data (sec->objfile, mips_pdr_data, priv);
}
the_bfd = NULL;
{
int low, mid, high;
char *ptr;
+ CORE_ADDR pdr_pc;
low = 0;
high = priv->size / 32;
+ /* We've found a .pdr section describing this objfile. We want to
+ find the entry which describes this code address. The .pdr
+ information is not very descriptive; we have only a function
+ start address. We have to look for the closest entry, because
+ the local symbol at the beginning of this function may have
+ been stripped - so if we ask the symbol table for the start
+ address we may get a preceding global function. */
+
+ /* First, find the last .pdr entry starting at or before PC. */
do
{
- CORE_ADDR pdr_pc;
-
mid = (low + high) / 2;
ptr = priv->contents + mid * 32;
pdr_pc = bfd_get_signed_32 (sec->objfile->obfd, ptr);
pdr_pc += ANOFFSET (sec->objfile->section_offsets,
SECT_OFF_TEXT (sec->objfile));
- if (pdr_pc == startaddr)
- break;
- if (pdr_pc > startaddr)
+
+ if (pdr_pc > pc)
high = mid;
else
low = mid + 1;
}
while (low != high);
- if (low != high)
+ /* Both low and high point one past the PDR of interest. If
+ both are zero, that means this PC is before any region
+ covered by a PDR, i.e. pdr_pc for the first PDR entry is
+ greater than PC. */
+ if (low > 0)
+ {
+ ptr = priv->contents + (low - 1) * 32;
+ pdr_pc = bfd_get_signed_32 (sec->objfile->obfd, ptr);
+ pdr_pc += ANOFFSET (sec->objfile->section_offsets,
+ SECT_OFF_TEXT (sec->objfile));
+ }
+
+ /* We don't have a range, so we have no way to know for sure
+ whether we're in the correct PDR or a PDR for a preceding
+ function and the current function was a stripped local
+ symbol. But if the PDR's PC is at least as great as the
+ best guess from the symbol table, assume that it does cover
+ the right area; if a .pdr section is present at all then
+ nearly every function will have an entry. The biggest exception
+ will be the dynamic linker stubs; conveniently these are
+ placed before .text instead of after. */
+
+ if (pc >= pdr_pc && pdr_pc >= startaddr)
{
struct symbol *sym = find_pc_function (pc);
+ if (addrptr)
+ *addrptr = pdr_pc;
+
/* Fill in what we need of the proc_desc. */
proc_desc = (mips_extra_func_info_t)
- obstack_alloc (&sec->objfile->psymbol_obstack,
+ obstack_alloc (&sec->objfile->objfile_obstack,
sizeof (struct mips_extra_func_info));
- PROC_LOW_ADDR (proc_desc) = startaddr;
+ PROC_LOW_ADDR (proc_desc) = pdr_pc;
/* Only used for dummy frames. */
PROC_HIGH_ADDR (proc_desc) = 0;
return proc_desc;
}
-static CORE_ADDR
-get_frame_pointer (struct frame_info *frame, mips_extra_func_info_t proc_desc)
-{
- return (read_next_frame_reg (frame, NUM_REGS + PROC_FRAME_REG (proc_desc))
- + PROC_FRAME_OFFSET (proc_desc) - PROC_FRAME_ADJUST (proc_desc));
-}
-
-static mips_extra_func_info_t cached_proc_desc;
-
-static CORE_ADDR
-mips_frame_chain (struct frame_info *frame)
-{
- mips_extra_func_info_t proc_desc;
- CORE_ADDR tmp;
- CORE_ADDR saved_pc = DEPRECATED_FRAME_SAVED_PC (frame);
-
- /* Check if the PC is inside a call stub. If it is, fetch the
- PC of the caller of that stub. */
- if ((tmp = SKIP_TRAMPOLINE_CODE (saved_pc)) != 0)
- saved_pc = tmp;
-
- if (DEPRECATED_PC_IN_CALL_DUMMY (saved_pc, 0, 0))
- {
- /* A dummy frame, uses SP not FP. Get the old SP value. If all
- is well, frame->frame the bottom of the current frame will
- contain that value. */
- return get_frame_base (frame);
- }
-
- /* Look up the procedure descriptor for this PC. */
- proc_desc = find_proc_desc (saved_pc, frame, 1);
- if (!proc_desc)
- return 0;
-
- cached_proc_desc = proc_desc;
-
- /* If no frame pointer and frame size is zero, we must be at end
- of stack (or otherwise hosed). If we don't check frame size,
- we loop forever if we see a zero size frame. */
- if (PROC_FRAME_REG (proc_desc) == SP_REGNUM
- && PROC_FRAME_OFFSET (proc_desc) == 0
- /* The previous frame from a sigtramp frame might be frameless
- and have frame size zero. */
- && !(get_frame_type (frame) == SIGTRAMP_FRAME)
- /* For a generic dummy frame, let get_frame_pointer() unwind a
- register value saved as part of the dummy frame call. */
- && !(DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame), 0, 0)))
- return 0;
- else
- return get_frame_pointer (frame, proc_desc);
-}
-
-static void
-mips_init_extra_frame_info (int fromleaf, struct frame_info *fci)
-{
- int regnum;
- mips_extra_func_info_t proc_desc;
-
- if (get_frame_type (fci) == DUMMY_FRAME)
- return;
-
- /* Use proc_desc calculated in frame_chain. When there is no
- next frame, i.e, get_next_frame (fci) == NULL, we call
- find_proc_desc () to calculate it, passing an explicit
- NULL as the frame parameter. */
- proc_desc =
- get_next_frame (fci)
- ? cached_proc_desc
- : find_proc_desc (get_frame_pc (fci),
- NULL /* i.e, get_next_frame (fci) */ ,
- 1);
-
- frame_extra_info_zalloc (fci, sizeof (struct frame_extra_info));
-
- get_frame_extra_info (fci)->proc_desc =
- proc_desc == &temp_proc_desc ? 0 : proc_desc;
- if (proc_desc)
- {
- /* Fixup frame-pointer - only needed for top frame */
- /* This may not be quite right, if proc has a real frame register.
- Get the value of the frame relative sp, procedure might have been
- interrupted by a signal at it's very start. */
- if (get_frame_pc (fci) == PROC_LOW_ADDR (proc_desc)
- && !PROC_DESC_IS_DUMMY (proc_desc))
- deprecated_update_frame_base_hack (fci,
- read_next_frame_reg (get_next_frame
- (fci),
- NUM_REGS +
- SP_REGNUM));
- else if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fci), 0, 0))
- /* Do not ``fix'' fci->frame. It will have the value of the
- generic dummy frame's top-of-stack (since the draft
- fci->frame is obtained by returning the unwound stack
- pointer) and that is what we want. That way the fci->frame
- value will match the top-of-stack value that was saved as
- part of the dummy frames data. */
- /* Do nothing. */ ;
- else
- deprecated_update_frame_base_hack (fci,
- get_frame_pointer (get_next_frame
- (fci),
- proc_desc));
-
- if (proc_desc == &temp_proc_desc)
- {
- char *name;
-
- /* Do not set the saved registers for a sigtramp frame,
- mips_find_saved_registers will do that for us. We can't
- use (get_frame_type (fci) == SIGTRAMP_FRAME), it is not
- yet set. */
- /* FIXME: cagney/2002-11-18: This problem will go away once
- frame.c:get_prev_frame() is modified to set the frame's
- type before calling functions like this. */
- find_pc_partial_function (get_frame_pc (fci), &name,
- (CORE_ADDR *) NULL, (CORE_ADDR *) NULL);
- if (!PC_IN_SIGTRAMP (get_frame_pc (fci), name))
- {
- frame_saved_regs_zalloc (fci);
- /* Set value of previous frame's stack pointer.
- Remember that saved_regs[SP_REGNUM] is special in
- that it contains the value of the stack pointer
- register. The other saved_regs values are addresses
- (in the inferior) at which a given register's value
- may be found. */
- set_reg_offset (temp_saved_regs, SP_REGNUM,
- get_frame_base (fci));
- set_reg_offset (temp_saved_regs, mips_regnum (current_gdbarch)->pc,
- temp_saved_regs[RA_REGNUM]);
- memcpy (deprecated_get_frame_saved_regs (fci), temp_saved_regs,
- SIZEOF_FRAME_SAVED_REGS);
- }
- }
-
- /* hack: if argument regs are saved, guess these contain args */
- /* assume we can't tell how many args for now */
- get_frame_extra_info (fci)->num_args = -1;
- for (regnum = MIPS_LAST_ARG_REGNUM; regnum >= A0_REGNUM; regnum--)
- {
- if (PROC_REG_MASK (proc_desc) & (1 << regnum))
- {
- get_frame_extra_info (fci)->num_args = regnum - A0_REGNUM + 1;
- break;
- }
- }
- }
-}
-
/* MIPS stack frames are almost impenetrable. When execution stops,
we basically have to look at symbol information for the function
that we stopped in, which tells us *which* register (if any) is
&& ((MIPS_FPU_TYPE == MIPS_FPU_DOUBLE && (len == 4 || len == 8))
|| (MIPS_FPU_TYPE == MIPS_FPU_SINGLE && len == 4)))
{
- if (!FP_REGISTER_DOUBLE && len == 8)
+ if (mips_abi_regsize (current_gdbarch) < 8 && len == 8)
{
/* We need to break a 64bit float in two 32 bit halves and
- spread them across a floating-point register pair. */
+ spread them across a floating-point register pair. */
lo->buf_offset = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG ? 4 : 0;
hi->buf_offset = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG ? 0 : 4;
lo->reg_offset = ((TARGET_BYTE_ORDER == BFD_ENDIAN_BIG
lo->reg = regnum + 0;
hi->reg = regnum + 1;
if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG
- && len < mips_saved_regsize (tdep))
+ && len < mips_abi_regsize (current_gdbarch))
{
/* "un-left-justify" the value in the low register */
- lo->reg_offset = mips_saved_regsize (tdep) - len;
+ lo->reg_offset = mips_abi_regsize (current_gdbarch) - len;
lo->len = len;
hi->reg_offset = 0;
hi->len = 0;
}
- else if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG && len > mips_saved_regsize (tdep) /* odd-size structs */
- && len < mips_saved_regsize (tdep) * 2
+ else if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG && len > mips_abi_regsize (current_gdbarch) /* odd-size structs */
+ && len < mips_abi_regsize (current_gdbarch) * 2
&& (TYPE_CODE (valtype) == TYPE_CODE_STRUCT ||
TYPE_CODE (valtype) == TYPE_CODE_UNION))
{
/* "un-left-justify" the value spread across two registers. */
- lo->reg_offset = 2 * mips_saved_regsize (tdep) - len;
- lo->len = mips_saved_regsize (tdep) - lo->reg_offset;
+ lo->reg_offset = 2 * mips_abi_regsize (current_gdbarch) - len;
+ lo->len = mips_abi_regsize (current_gdbarch) - lo->reg_offset;
hi->reg_offset = 0;
hi->len = len - lo->len;
}
/* Only perform a partial copy of the second register. */
lo->reg_offset = 0;
hi->reg_offset = 0;
- if (len > mips_saved_regsize (tdep))
+ if (len > mips_abi_regsize (current_gdbarch))
{
- lo->len = mips_saved_regsize (tdep);
- hi->len = len - mips_saved_regsize (tdep);
+ lo->len = mips_abi_regsize (current_gdbarch);
+ hi->len = len - mips_abi_regsize (current_gdbarch);
}
else
{
}
if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG
&& register_size (current_gdbarch, regnum) == 8
- && mips_saved_regsize (tdep) == 4)
+ && mips_abi_regsize (current_gdbarch) == 4)
{
/* Account for the fact that only the least-signficant part
of the register is being used */
mips_eabi_use_struct_convention (int gcc_p, struct type *type)
{
struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
- return (TYPE_LENGTH (type) > 2 * mips_saved_regsize (tdep));
+ return (TYPE_LENGTH (type) > 2 * mips_abi_regsize (current_gdbarch));
}
/* Should call_function pass struct by reference?
struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
if (typecode == TYPE_CODE_STRUCT || typecode == TYPE_CODE_UNION)
- return (len > mips_saved_regsize (tdep));
+ return (len > mips_abi_regsize (current_gdbarch));
return 0;
}
static CORE_ADDR
-mips_eabi_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
+mips_eabi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
struct regcache *regcache, CORE_ADDR bp_addr,
int nargs, struct value **args, CORE_ADDR sp,
int struct_return, CORE_ADDR struct_addr)
int len = 0;
int stack_offset = 0;
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ CORE_ADDR func_addr = find_function_addr (function, NULL);
/* For shared libraries, "t9" needs to point at the function
address. */
passed in registers, but that's OK. */
for (argnum = 0; argnum < nargs; argnum++)
len += align_up (TYPE_LENGTH (VALUE_TYPE (args[argnum])),
- mips_stack_argsize (tdep));
+ mips_stack_argsize (gdbarch));
sp -= align_up (len, 16);
if (mips_debug)
/* The EABI passes structures that do not fit in a register by
reference. */
- if (len > mips_saved_regsize (tdep)
+ if (len > mips_abi_regsize (gdbarch)
&& (typecode == TYPE_CODE_STRUCT || typecode == TYPE_CODE_UNION))
{
- store_unsigned_integer (valbuf, mips_saved_regsize (tdep),
+ store_unsigned_integer (valbuf, mips_abi_regsize (gdbarch),
VALUE_ADDRESS (arg));
typecode = TYPE_CODE_PTR;
- len = mips_saved_regsize (tdep);
+ len = mips_abi_regsize (gdbarch);
val = valbuf;
if (mips_debug)
fprintf_unfiltered (gdb_stdlog, " push");
up before the check to see if there are any FP registers
left. Non MIPS_EABI targets also pass the FP in the integer
registers so also round up normal registers. */
- if (!FP_REGISTER_DOUBLE && fp_register_arg_p (typecode, arg_type))
+ if (mips_abi_regsize (gdbarch) < 8
+ && fp_register_arg_p (typecode, arg_type))
{
if ((float_argreg & 1))
float_argreg++;
if (fp_register_arg_p (typecode, arg_type)
&& float_argreg <= MIPS_LAST_FP_ARG_REGNUM)
{
- if (!FP_REGISTER_DOUBLE && len == 8)
+ if (mips_abi_regsize (gdbarch) < 8 && len == 8)
{
int low_offset = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG ? 4 : 0;
unsigned long regval;
register-sized pieces. Large arguments are split between
registers and stack. */
/* Note: structs whose size is not a multiple of
- mips_regsize() are treated specially: Irix cc passes them
- in registers where gcc sometimes puts them on the stack.
- For maximum compatibility, we will put them in both
- places. */
- int odd_sized_struct = ((len > mips_saved_regsize (tdep))
- && (len % mips_saved_regsize (tdep) != 0));
+ mips_abi_regsize() are treated specially: Irix cc passes
+ them in registers where gcc sometimes puts them on the
+ stack. For maximum compatibility, we will put them in
+ both places. */
+ int odd_sized_struct = ((len > mips_abi_regsize (gdbarch))
+ && (len % mips_abi_regsize (gdbarch) != 0));
/* Note: Floating-point values that didn't fit into an FP
register are only written to memory. */
{
/* Remember if the argument was written to the stack. */
int stack_used_p = 0;
- int partial_len = (len < mips_saved_regsize (tdep)
- ? len : mips_saved_regsize (tdep));
+ int partial_len = (len < mips_abi_regsize (gdbarch)
+ ? len : mips_abi_regsize (gdbarch));
if (mips_debug)
fprintf_unfiltered (gdb_stdlog, " -- partial=%d",
stack_used_p = 1;
if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
{
- if (mips_stack_argsize (tdep) == 8
+ if (mips_stack_argsize (gdbarch) == 8
&& (typecode == TYPE_CODE_INT
|| typecode == TYPE_CODE_PTR
|| typecode == TYPE_CODE_FLT) && len <= 4)
- longword_offset = mips_stack_argsize (tdep) - len;
+ longword_offset = mips_stack_argsize (gdbarch) - len;
else if ((typecode == TYPE_CODE_STRUCT
|| typecode == TYPE_CODE_UNION)
&& (TYPE_LENGTH (arg_type)
- < mips_stack_argsize (tdep)))
- longword_offset = mips_stack_argsize (tdep) - len;
+ < mips_stack_argsize (gdbarch)))
+ longword_offset = mips_stack_argsize (gdbarch) - len;
}
if (mips_debug)
fprintf_filtered (gdb_stdlog, " - reg=%d val=%s",
argreg,
phex (regval,
- mips_saved_regsize (tdep)));
+ mips_abi_regsize (gdbarch)));
write_register (argreg, regval);
argreg++;
}
if (stack_used_p)
stack_offset += align_up (partial_len,
- mips_stack_argsize (tdep));
+ mips_stack_argsize (gdbarch));
}
}
if (mips_debug)
/* N32/N64 ABI stuff. */
static CORE_ADDR
-mips_n32n64_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
+mips_n32n64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
struct regcache *regcache, CORE_ADDR bp_addr,
int nargs, struct value **args, CORE_ADDR sp,
int struct_return, CORE_ADDR struct_addr)
int len = 0;
int stack_offset = 0;
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ CORE_ADDR func_addr = find_function_addr (function, NULL);
/* For shared libraries, "t9" needs to point at the function
address. */
/* Now make space on the stack for the args. */
for (argnum = 0; argnum < nargs; argnum++)
len += align_up (TYPE_LENGTH (VALUE_TYPE (args[argnum])),
- mips_stack_argsize (tdep));
+ mips_stack_argsize (gdbarch));
sp -= align_up (len, 16);
if (mips_debug)
for (argnum = 0; argnum < nargs; argnum++)
{
char *val;
- char valbuf[MAX_REGISTER_SIZE];
struct value *arg = args[argnum];
struct type *arg_type = check_typedef (VALUE_TYPE (arg));
int len = TYPE_LENGTH (arg_type);
register-sized pieces. Large arguments are split between
registers and stack. */
/* Note: structs whose size is not a multiple of
- mips_regsize() are treated specially: Irix cc passes them
- in registers where gcc sometimes puts them on the stack.
- For maximum compatibility, we will put them in both
- places. */
- int odd_sized_struct = ((len > mips_saved_regsize (tdep))
- && (len % mips_saved_regsize (tdep) != 0));
+ mips_abi_regsize() are treated specially: Irix cc passes
+ them in registers where gcc sometimes puts them on the
+ stack. For maximum compatibility, we will put them in
+ both places. */
+ int odd_sized_struct = ((len > mips_abi_regsize (gdbarch))
+ && (len % mips_abi_regsize (gdbarch) != 0));
/* Note: Floating-point values that didn't fit into an FP
register are only written to memory. */
while (len > 0)
{
/* Rememer if the argument was written to the stack. */
int stack_used_p = 0;
- int partial_len = (len < mips_saved_regsize (tdep)
- ? len : mips_saved_regsize (tdep));
+ int partial_len = (len < mips_abi_regsize (gdbarch)
+ ? len : mips_abi_regsize (gdbarch));
if (mips_debug)
fprintf_unfiltered (gdb_stdlog, " -- partial=%d",
stack_used_p = 1;
if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
{
- if (mips_stack_argsize (tdep) == 8
+ if (mips_stack_argsize (gdbarch) == 8
&& (typecode == TYPE_CODE_INT
|| typecode == TYPE_CODE_PTR
|| typecode == TYPE_CODE_FLT) && len <= 4)
- longword_offset = mips_stack_argsize (tdep) - len;
+ longword_offset = mips_stack_argsize (gdbarch) - len;
}
if (mips_debug)
cagney/2001-07-23: gdb/179: Also, GCC, when
outputting LE O32 with sizeof (struct) <
- mips_saved_regsize(), generates a left shift as
+ mips_abi_regsize(), generates a left shift as
part of storing the argument in a register a
register (the left shift isn't generated when
- sizeof (struct) >= mips_saved_regsize()). Since
+ sizeof (struct) >= mips_abi_regsize()). Since
it is quite possible that this is GCC
contradicting the LE/O32 ABI, GDB has not been
adjusted to accommodate this. Either someone
accordingly. */
if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG
- && partial_len < mips_saved_regsize (tdep)
+ && partial_len < mips_abi_regsize (gdbarch)
&& (typecode == TYPE_CODE_STRUCT ||
typecode == TYPE_CODE_UNION))
- regval <<= ((mips_saved_regsize (tdep) - partial_len) *
+ regval <<= ((mips_abi_regsize (gdbarch) - partial_len) *
TARGET_CHAR_BIT);
if (mips_debug)
fprintf_filtered (gdb_stdlog, " - reg=%d val=%s",
argreg,
phex (regval,
- mips_saved_regsize (tdep)));
+ mips_abi_regsize (gdbarch)));
write_register (argreg, regval);
argreg++;
}
if (stack_used_p)
stack_offset += align_up (partial_len,
- mips_stack_argsize (tdep));
+ mips_stack_argsize (gdbarch));
}
}
if (mips_debug)
if (TYPE_CODE (type) == TYPE_CODE_STRUCT
|| TYPE_CODE (type) == TYPE_CODE_UNION
|| TYPE_CODE (type) == TYPE_CODE_ARRAY
- || TYPE_LENGTH (type) > 2 * mips_saved_regsize (tdep))
+ || TYPE_LENGTH (type) > 2 * mips_abi_regsize (gdbarch))
return RETURN_VALUE_STRUCT_CONVENTION;
else if (TYPE_CODE (type) == TYPE_CODE_FLT
&& tdep->mips_fpu_type != MIPS_FPU_NONE)
/* A struct that contains one or two floats. Each value is part
in the least significant part of their floating point
register.. */
- bfd_byte reg[MAX_REGISTER_SIZE];
int regnum;
int field;
for (field = 0, regnum = mips_regnum (current_gdbarch)->fp0;
offset += register_size (current_gdbarch, regnum), regnum++)
{
int xfer = register_size (current_gdbarch, regnum);
- int pos = 0;
if (offset + xfer > TYPE_LENGTH (type))
xfer = TYPE_LENGTH (type) - offset;
if (mips_debug)
/* O32 ABI stuff. */
static CORE_ADDR
-mips_o32_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
+mips_o32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
struct regcache *regcache, CORE_ADDR bp_addr,
int nargs, struct value **args, CORE_ADDR sp,
int struct_return, CORE_ADDR struct_addr)
int len = 0;
int stack_offset = 0;
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ CORE_ADDR func_addr = find_function_addr (function, NULL);
/* For shared libraries, "t9" needs to point at the function
address. */
/* Now make space on the stack for the args. */
for (argnum = 0; argnum < nargs; argnum++)
len += align_up (TYPE_LENGTH (VALUE_TYPE (args[argnum])),
- mips_stack_argsize (tdep));
+ mips_stack_argsize (gdbarch));
sp -= align_up (len, 16);
if (mips_debug)
"mips_o32_push_dummy_call: struct_return reg=%d 0x%s\n",
argreg, paddr_nz (struct_addr));
write_register (argreg++, struct_addr);
- stack_offset += mips_stack_argsize (tdep);
+ stack_offset += mips_stack_argsize (gdbarch);
}
/* Now load as many as possible of the first arguments into
for (argnum = 0; argnum < nargs; argnum++)
{
char *val;
- char valbuf[MAX_REGISTER_SIZE];
struct value *arg = args[argnum];
struct type *arg_type = check_typedef (VALUE_TYPE (arg));
int len = TYPE_LENGTH (arg_type);
up before the check to see if there are any FP registers
left. O32/O64 targets also pass the FP in the integer
registers so also round up normal registers. */
- if (!FP_REGISTER_DOUBLE && fp_register_arg_p (typecode, arg_type))
+ if (mips_abi_regsize (gdbarch) < 8
+ && fp_register_arg_p (typecode, arg_type))
{
if ((float_argreg & 1))
float_argreg++;
if (fp_register_arg_p (typecode, arg_type)
&& float_argreg <= MIPS_LAST_FP_ARG_REGNUM)
{
- if (!FP_REGISTER_DOUBLE && len == 8)
+ if (mips_abi_regsize (gdbarch) < 8 && len == 8)
{
int low_offset = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG ? 4 : 0;
unsigned long regval;
fprintf_unfiltered (gdb_stdlog, " - reg=%d val=%s",
argreg, phex (regval, len));
write_register (argreg, regval);
- argreg += FP_REGISTER_DOUBLE ? 1 : 2;
+ argreg += (mips_abi_regsize (gdbarch) == 8) ? 1 : 2;
}
/* Reserve space for the FP register. */
- stack_offset += align_up (len, mips_stack_argsize (tdep));
+ stack_offset += align_up (len, mips_stack_argsize (gdbarch));
}
else
{
register-sized pieces. Large arguments are split between
registers and stack. */
/* Note: structs whose size is not a multiple of
- mips_regsize() are treated specially: Irix cc passes them
- in registers where gcc sometimes puts them on the stack.
- For maximum compatibility, we will put them in both
- places. */
- int odd_sized_struct = ((len > mips_saved_regsize (tdep))
- && (len % mips_saved_regsize (tdep) != 0));
+ mips_abi_regsize() are treated specially: Irix cc passes
+ them in registers where gcc sometimes puts them on the
+ stack. For maximum compatibility, we will put them in
+ both places. */
+ int odd_sized_struct = ((len > mips_abi_regsize (gdbarch))
+ && (len % mips_abi_regsize (gdbarch) != 0));
/* Structures should be aligned to eight bytes (even arg registers)
on MIPS_ABI_O32, if their first member has double precision. */
- if (mips_saved_regsize (tdep) < 8
+ if (mips_abi_regsize (gdbarch) < 8
&& mips_type_needs_double_align (arg_type))
{
if ((argreg & 1))
{
/* Remember if the argument was written to the stack. */
int stack_used_p = 0;
- int partial_len = (len < mips_saved_regsize (tdep)
- ? len : mips_saved_regsize (tdep));
+ int partial_len = (len < mips_abi_regsize (gdbarch)
+ ? len : mips_abi_regsize (gdbarch));
if (mips_debug)
fprintf_unfiltered (gdb_stdlog, " -- partial=%d",
stack_used_p = 1;
if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
{
- if (mips_stack_argsize (tdep) == 8
+ if (mips_stack_argsize (gdbarch) == 8
&& (typecode == TYPE_CODE_INT
|| typecode == TYPE_CODE_PTR
|| typecode == TYPE_CODE_FLT) && len <= 4)
- longword_offset = mips_stack_argsize (tdep) - len;
+ longword_offset = mips_stack_argsize (gdbarch) - len;
}
if (mips_debug)
{
LONGEST regval = extract_signed_integer (val, partial_len);
/* Value may need to be sign extended, because
- mips_regsize() != mips_saved_regsize(). */
+ mips_isa_regsize() != mips_abi_regsize(). */
/* A non-floating-point argument being passed in a
general register. If a struct or union, and if
cagney/2001-07-23: gdb/179: Also, GCC, when
outputting LE O32 with sizeof (struct) <
- mips_saved_regsize(), generates a left shift as
+ mips_abi_regsize(), generates a left shift as
part of storing the argument in a register a
register (the left shift isn't generated when
- sizeof (struct) >= mips_saved_regsize()). Since
+ sizeof (struct) >= mips_abi_regsize()). Since
it is quite possible that this is GCC
contradicting the LE/O32 ABI, GDB has not been
adjusted to accommodate this. Either someone
identified as such and GDB gets tweaked
accordingly. */
- if (mips_saved_regsize (tdep) < 8
+ if (mips_abi_regsize (gdbarch) < 8
&& TARGET_BYTE_ORDER == BFD_ENDIAN_BIG
- && partial_len < mips_saved_regsize (tdep)
+ && partial_len < mips_abi_regsize (gdbarch)
&& (typecode == TYPE_CODE_STRUCT ||
typecode == TYPE_CODE_UNION))
- regval <<= ((mips_saved_regsize (tdep) - partial_len) *
+ regval <<= ((mips_abi_regsize (gdbarch) - partial_len) *
TARGET_CHAR_BIT);
if (mips_debug)
fprintf_filtered (gdb_stdlog, " - reg=%d val=%s",
argreg,
phex (regval,
- mips_saved_regsize (tdep)));
+ mips_abi_regsize (gdbarch)));
write_register (argreg, regval);
argreg++;
always allocated. */
stack_offset += align_up (partial_len,
- mips_stack_argsize (tdep));
+ mips_stack_argsize (gdbarch));
}
}
if (mips_debug)
int regnum;
for (offset = 0, regnum = V0_REGNUM;
offset < TYPE_LENGTH (type);
- offset += mips_stack_argsize (tdep), regnum++)
+ offset += mips_stack_argsize (gdbarch), regnum++)
{
- int xfer = mips_stack_argsize (tdep);
- int pos = 0;
+ int xfer = mips_stack_argsize (gdbarch);
if (offset + xfer > TYPE_LENGTH (type))
xfer = TYPE_LENGTH (type) - offset;
if (mips_debug)
ABI. */
static CORE_ADDR
-mips_o64_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
+mips_o64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
struct regcache *regcache, CORE_ADDR bp_addr,
int nargs,
struct value **args, CORE_ADDR sp,
int len = 0;
int stack_offset = 0;
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ CORE_ADDR func_addr = find_function_addr (function, NULL);
/* For shared libraries, "t9" needs to point at the function
address. */
/* Now make space on the stack for the args. */
for (argnum = 0; argnum < nargs; argnum++)
len += align_up (TYPE_LENGTH (VALUE_TYPE (args[argnum])),
- mips_stack_argsize (tdep));
+ mips_stack_argsize (gdbarch));
sp -= align_up (len, 16);
if (mips_debug)
"mips_o64_push_dummy_call: struct_return reg=%d 0x%s\n",
argreg, paddr_nz (struct_addr));
write_register (argreg++, struct_addr);
- stack_offset += mips_stack_argsize (tdep);
+ stack_offset += mips_stack_argsize (gdbarch);
}
/* Now load as many as possible of the first arguments into
for (argnum = 0; argnum < nargs; argnum++)
{
char *val;
- char valbuf[MAX_REGISTER_SIZE];
struct value *arg = args[argnum];
struct type *arg_type = check_typedef (VALUE_TYPE (arg));
int len = TYPE_LENGTH (arg_type);
up before the check to see if there are any FP registers
left. O32/O64 targets also pass the FP in the integer
registers so also round up normal registers. */
- if (!FP_REGISTER_DOUBLE && fp_register_arg_p (typecode, arg_type))
+ if (mips_abi_regsize (gdbarch) < 8
+ && fp_register_arg_p (typecode, arg_type))
{
if ((float_argreg & 1))
float_argreg++;
if (fp_register_arg_p (typecode, arg_type)
&& float_argreg <= MIPS_LAST_FP_ARG_REGNUM)
{
- if (!FP_REGISTER_DOUBLE && len == 8)
+ if (mips_abi_regsize (gdbarch) < 8 && len == 8)
{
int low_offset = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG ? 4 : 0;
unsigned long regval;
fprintf_unfiltered (gdb_stdlog, " - reg=%d val=%s",
argreg, phex (regval, len));
write_register (argreg, regval);
- argreg += FP_REGISTER_DOUBLE ? 1 : 2;
+ argreg += (mips_abi_regsize (gdbarch) == 8) ? 1 : 2;
}
/* Reserve space for the FP register. */
- stack_offset += align_up (len, mips_stack_argsize (tdep));
+ stack_offset += align_up (len, mips_stack_argsize (gdbarch));
}
else
{
register-sized pieces. Large arguments are split between
registers and stack. */
/* Note: structs whose size is not a multiple of
- mips_regsize() are treated specially: Irix cc passes them
- in registers where gcc sometimes puts them on the stack.
- For maximum compatibility, we will put them in both
- places. */
- int odd_sized_struct = ((len > mips_saved_regsize (tdep))
- && (len % mips_saved_regsize (tdep) != 0));
+ mips_abi_regsize() are treated specially: Irix cc passes
+ them in registers where gcc sometimes puts them on the
+ stack. For maximum compatibility, we will put them in
+ both places. */
+ int odd_sized_struct = ((len > mips_abi_regsize (gdbarch))
+ && (len % mips_abi_regsize (gdbarch) != 0));
/* Structures should be aligned to eight bytes (even arg registers)
on MIPS_ABI_O32, if their first member has double precision. */
- if (mips_saved_regsize (tdep) < 8
+ if (mips_abi_regsize (gdbarch) < 8
&& mips_type_needs_double_align (arg_type))
{
if ((argreg & 1))
{
/* Remember if the argument was written to the stack. */
int stack_used_p = 0;
- int partial_len = (len < mips_saved_regsize (tdep)
- ? len : mips_saved_regsize (tdep));
+ int partial_len = (len < mips_abi_regsize (gdbarch)
+ ? len : mips_abi_regsize (gdbarch));
if (mips_debug)
fprintf_unfiltered (gdb_stdlog, " -- partial=%d",
stack_used_p = 1;
if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
{
- if (mips_stack_argsize (tdep) == 8
+ if (mips_stack_argsize (gdbarch) == 8
&& (typecode == TYPE_CODE_INT
|| typecode == TYPE_CODE_PTR
|| typecode == TYPE_CODE_FLT) && len <= 4)
- longword_offset = mips_stack_argsize (tdep) - len;
+ longword_offset = mips_stack_argsize (gdbarch) - len;
}
if (mips_debug)
{
LONGEST regval = extract_signed_integer (val, partial_len);
/* Value may need to be sign extended, because
- mips_regsize() != mips_saved_regsize(). */
+ mips_isa_regsize() != mips_abi_regsize(). */
/* A non-floating-point argument being passed in a
general register. If a struct or union, and if
cagney/2001-07-23: gdb/179: Also, GCC, when
outputting LE O32 with sizeof (struct) <
- mips_saved_regsize(), generates a left shift as
+ mips_abi_regsize(), generates a left shift as
part of storing the argument in a register a
register (the left shift isn't generated when
- sizeof (struct) >= mips_saved_regsize()). Since
+ sizeof (struct) >= mips_abi_regsize()). Since
it is quite possible that this is GCC
contradicting the LE/O32 ABI, GDB has not been
adjusted to accommodate this. Either someone
identified as such and GDB gets tweaked
accordingly. */
- if (mips_saved_regsize (tdep) < 8
+ if (mips_abi_regsize (gdbarch) < 8
&& TARGET_BYTE_ORDER == BFD_ENDIAN_BIG
- && partial_len < mips_saved_regsize (tdep)
+ && partial_len < mips_abi_regsize (gdbarch)
&& (typecode == TYPE_CODE_STRUCT ||
typecode == TYPE_CODE_UNION))
- regval <<= ((mips_saved_regsize (tdep) - partial_len) *
+ regval <<= ((mips_abi_regsize (gdbarch) - partial_len) *
TARGET_CHAR_BIT);
if (mips_debug)
fprintf_filtered (gdb_stdlog, " - reg=%d val=%s",
argreg,
phex (regval,
- mips_saved_regsize (tdep)));
+ mips_abi_regsize (gdbarch)));
write_register (argreg, regval);
argreg++;
always allocated. */
stack_offset += align_up (partial_len,
- mips_stack_argsize (tdep));
+ mips_stack_argsize (gdbarch));
}
}
if (mips_debug)
}
}
-static void
-mips_pop_frame (void)
-{
- int regnum;
- struct frame_info *frame = get_current_frame ();
- CORE_ADDR new_sp = get_frame_base (frame);
- mips_extra_func_info_t proc_desc;
- struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
-
- if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame), 0, 0))
- {
- generic_pop_dummy_frame ();
- flush_cached_frames ();
- return;
- }
-
- proc_desc = get_frame_extra_info (frame)->proc_desc;
- write_register (mips_regnum (current_gdbarch)->pc,
- DEPRECATED_FRAME_SAVED_PC (frame));
- mips_find_saved_regs (frame);
- for (regnum = 0; regnum < NUM_REGS; regnum++)
- if (regnum != SP_REGNUM && regnum != mips_regnum (current_gdbarch)->pc
- && deprecated_get_frame_saved_regs (frame)[regnum])
- {
- /* Floating point registers must not be sign extended, in case
- mips_saved_regsize() = 4 but sizeof (FP0_REGNUM) == 8. */
-
- if (mips_regnum (current_gdbarch)->fp0 <= regnum
- && regnum < mips_regnum (current_gdbarch)->fp0 + 32)
- write_register (regnum,
- read_memory_unsigned_integer
- (deprecated_get_frame_saved_regs (frame)[regnum],
- mips_saved_regsize (tdep)));
- else
- write_register (regnum,
- read_memory_integer (deprecated_get_frame_saved_regs
- (frame)[regnum],
- mips_saved_regsize (tdep)));
- }
-
- write_register (SP_REGNUM, new_sp);
- flush_cached_frames ();
-
- if (proc_desc && PROC_DESC_IS_DUMMY (proc_desc))
- {
- struct linked_proc_info *pi_ptr, *prev_ptr;
-
- for (pi_ptr = linked_proc_desc_table, prev_ptr = NULL;
- pi_ptr != NULL; prev_ptr = pi_ptr, pi_ptr = pi_ptr->next)
- {
- if (&pi_ptr->info == proc_desc)
- break;
- }
-
- if (pi_ptr == NULL)
- error ("Can't locate dummy extra frame info\n");
-
- if (prev_ptr != NULL)
- prev_ptr->next = pi_ptr->next;
- else
- linked_proc_desc_table = pi_ptr->next;
-
- xfree (pi_ptr);
-
- write_register (mips_regnum (current_gdbarch)->hi,
- read_memory_integer ((new_sp
- - 2 * mips_saved_regsize (tdep)),
- mips_saved_regsize (tdep)));
- write_register (mips_regnum (current_gdbarch)->lo,
- read_memory_integer ((new_sp
- - 3 * mips_saved_regsize (tdep)),
- mips_saved_regsize (tdep)));
- if (MIPS_FPU_TYPE != MIPS_FPU_NONE)
- write_register (mips_regnum (current_gdbarch)->fp_control_status,
- read_memory_integer ((new_sp
- -
- 4 * mips_saved_regsize (tdep)),
- mips_saved_regsize (tdep)));
- }
-}
-
/* Floating point register management.
Background: MIPS1 & 2 fp registers are 32 bits wide. To support
int regnum)
{ /* do values for FP (float) regs */
char *raw_buffer;
- double doub, flt1, flt2; /* doubles extracted from raw hex data */
- int inv1, inv2, namelen;
+ double doub, flt1; /* doubles extracted from raw hex data */
+ int inv1, inv2;
raw_buffer =
(char *) alloca (2 *
struct gdbarch *gdbarch = get_frame_arch (frame);
/* do values for GP (int) regs */
char raw_buffer[MAX_REGISTER_SIZE];
- int ncols = (mips_regsize (gdbarch) == 8 ? 4 : 8); /* display cols per row */
+ int ncols = (mips_abi_regsize (gdbarch) == 8 ? 4 : 8); /* display cols per row */
int col, byte;
int regnum;
TYPE_CODE_FLT)
break; /* end the row: reached FP register */
fprintf_filtered (file,
- mips_regsize (current_gdbarch) == 8 ? "%17s" : "%9s",
+ mips_abi_regsize (current_gdbarch) == 8 ? "%17s" : "%9s",
REGISTER_NAME (regnum));
col++;
}
error ("can't read register %d (%s)", regnum, REGISTER_NAME (regnum));
/* pad small registers */
for (byte = 0;
- byte < (mips_regsize (current_gdbarch)
+ byte < (mips_abi_regsize (current_gdbarch)
- register_size (current_gdbarch, regnum)); byte++)
printf_filtered (" ");
/* Now print the register value in hex, endian order. */
extract_unsigned_integer (buf, MIPS_INSTLEN));
}
-
-/* Given PC at the function's start address, attempt to find the
- prologue end using SAL information. Return zero if the skip fails.
-
- A non-optimized prologue traditionally has one SAL for the function
- and a second for the function body. A single line function has
- them both pointing at the same line.
-
- An optimized prologue is similar but the prologue may contain
- instructions (SALs) from the instruction body. Need to skip those
- while not getting into the function body.
-
- The functions end point and an increasing SAL line are used as
- indicators of the prologue's endpoint.
-
- This code is based on the function refine_prologue_limit (versions
- found in both ia64 and ppc). */
-
-static CORE_ADDR
-skip_prologue_using_sal (CORE_ADDR func_addr)
-{
- struct symtab_and_line prologue_sal;
- CORE_ADDR start_pc;
- CORE_ADDR end_pc;
-
- /* Get an initial range for the function. */
- find_pc_partial_function (func_addr, NULL, &start_pc, &end_pc);
- start_pc += FUNCTION_START_OFFSET;
-
- prologue_sal = find_pc_line (start_pc, 0);
- if (prologue_sal.line != 0)
- {
- while (prologue_sal.end < end_pc)
- {
- struct symtab_and_line sal;
-
- sal = find_pc_line (prologue_sal.end, 0);
- if (sal.line == 0)
- break;
- /* Assume that a consecutive SAL for the same (or larger)
- line mark the prologue -> body transition. */
- if (sal.line >= prologue_sal.line)
- break;
- /* The case in which compiler's optimizer/scheduler has
- moved instructions into the prologue. We look ahead in
- the function looking for address ranges whose
- corresponding line number is less the first one that we
- found for the function. This is more conservative then
- refine_prologue_limit which scans a large number of SALs
- looking for any in the prologue */
- prologue_sal = sal;
- }
- }
- return prologue_sal.end;
-}
-
/* Skip the PC past function prologue instructions (32-bit version).
This is a helper function for mips_skip_prologue. */
return mips32_skip_prologue (pc);
}
-/* Exported procedure: Is PC in the signal trampoline code */
-
-static int
-mips_pc_in_sigtramp (CORE_ADDR pc, char *ignore)
-{
- if (sigtramp_address == 0)
- fixup_sigtramp ();
- return (pc >= sigtramp_address && pc < sigtramp_end);
-}
-
/* Root of all "set mips "/"show mips " commands. This will eventually be
used for all MIPS-specific commands. */
}
-/* When debugging a 64 MIPS target running a 32 bit ABI, the size of
- the register stored on the stack (32) is different to its real raw
- size (64). The below ensures that registers are fetched from the
- stack using their ABI size and then stored into the RAW_BUFFER
- using their raw size.
-
- The alternative to adding this function would be to add an ABI
- macro - REGISTER_STACK_SIZE(). */
-
-static void
-mips_get_saved_register (char *raw_buffer,
- int *optimizedp,
- CORE_ADDR *addrp,
- struct frame_info *frame,
- int regnum, enum lval_type *lvalp)
-{
- CORE_ADDR addrx;
- enum lval_type lvalx;
- int optimizedx;
- int realnumx;
-
- /* Always a pseudo. */
- gdb_assert (regnum >= NUM_REGS);
-
- /* Make certain that all needed parameters are present. */
- if (addrp == NULL)
- addrp = &addrx;
- if (lvalp == NULL)
- lvalp = &lvalx;
- if (optimizedp == NULL)
- optimizedp = &optimizedx;
-
- if ((regnum % NUM_REGS) == SP_REGNUM)
- /* The SP_REGNUM is special, its value is stored in saved_regs.
- In fact, it is so special that it can even only be fetched
- using a raw register number! Once this code as been converted
- to frame-unwind the problem goes away. */
- frame_register_unwind (deprecated_get_next_frame_hack (frame),
- regnum % NUM_REGS, optimizedp, lvalp, addrp,
- &realnumx, raw_buffer);
- else
- /* Get it from the next frame. */
- frame_register_unwind (deprecated_get_next_frame_hack (frame),
- regnum, optimizedp, lvalp, addrp,
- &realnumx, raw_buffer);
-}
-
-/* Immediately after a function call, return the saved pc.
- Can't always go through the frames for this because on some machines
- the new frame is not set up until the new function executes
- some instructions. */
-
-static CORE_ADDR
-mips_saved_pc_after_call (struct frame_info *frame)
-{
- return read_signed_register (RA_REGNUM);
-}
-
-
/* Convert a dbx stab register number (from `r' declaration) to a GDB
[1 * NUM_REGS .. 2 * NUM_REGS) REGNUM. */
if (found_abi == MIPS_ABI_UNKNOWN && info.abfd != NULL)
bfd_map_over_sections (info.abfd, mips_find_abi_section, &found_abi);
- /* If we have no usefu BFD information, use the ABI from the last
+ /* If we have no useful BFD information, use the ABI from the last
MIPS architecture (if there is one). */
if (found_abi == MIPS_ABI_UNKNOWN && info.abfd == NULL && arches != NULL)
found_abi = gdbarch_tdep (arches->gdbarch)->found_abi;
case MIPS_ABI_O32:
set_gdbarch_push_dummy_call (gdbarch, mips_o32_push_dummy_call);
set_gdbarch_return_value (gdbarch, mips_o32_return_value);
- tdep->mips_default_saved_regsize = 4;
- tdep->mips_default_stack_argsize = 4;
- tdep->mips_fp_register_double = 0;
tdep->mips_last_arg_regnum = A0_REGNUM + 4 - 1;
tdep->mips_last_fp_arg_regnum = tdep->regnum->fp0 + 12 + 4 - 1;
tdep->default_mask_address_p = 0;
mips_o64_store_return_value);
set_gdbarch_deprecated_extract_return_value (gdbarch,
mips_o64_extract_return_value);
- tdep->mips_default_saved_regsize = 8;
- tdep->mips_default_stack_argsize = 8;
- tdep->mips_fp_register_double = 1;
tdep->mips_last_arg_regnum = A0_REGNUM + 4 - 1;
tdep->mips_last_fp_arg_regnum = tdep->regnum->fp0 + 12 + 4 - 1;
tdep->default_mask_address_p = 0;
mips_eabi_store_return_value);
set_gdbarch_deprecated_extract_return_value (gdbarch,
mips_eabi_extract_return_value);
- tdep->mips_default_saved_regsize = 4;
- tdep->mips_default_stack_argsize = 4;
- tdep->mips_fp_register_double = 0;
tdep->mips_last_arg_regnum = A0_REGNUM + 8 - 1;
tdep->mips_last_fp_arg_regnum = tdep->regnum->fp0 + 12 + 8 - 1;
tdep->default_mask_address_p = 0;
mips_eabi_store_return_value);
set_gdbarch_deprecated_extract_return_value (gdbarch,
mips_eabi_extract_return_value);
- tdep->mips_default_saved_regsize = 8;
- tdep->mips_default_stack_argsize = 8;
- tdep->mips_fp_register_double = 1;
tdep->mips_last_arg_regnum = A0_REGNUM + 8 - 1;
tdep->mips_last_fp_arg_regnum = tdep->regnum->fp0 + 12 + 8 - 1;
tdep->default_mask_address_p = 0;
case MIPS_ABI_N32:
set_gdbarch_push_dummy_call (gdbarch, mips_n32n64_push_dummy_call);
set_gdbarch_return_value (gdbarch, mips_n32n64_return_value);
- tdep->mips_default_saved_regsize = 8;
- tdep->mips_default_stack_argsize = 8;
- tdep->mips_fp_register_double = 1;
tdep->mips_last_arg_regnum = A0_REGNUM + 8 - 1;
tdep->mips_last_fp_arg_regnum = tdep->regnum->fp0 + 12 + 8 - 1;
tdep->default_mask_address_p = 0;
case MIPS_ABI_N64:
set_gdbarch_push_dummy_call (gdbarch, mips_n32n64_push_dummy_call);
set_gdbarch_return_value (gdbarch, mips_n32n64_return_value);
- tdep->mips_default_saved_regsize = 8;
- tdep->mips_default_stack_argsize = 8;
- tdep->mips_fp_register_double = 1;
tdep->mips_last_arg_regnum = A0_REGNUM + 8 - 1;
tdep->mips_last_fp_arg_regnum = tdep->regnum->fp0 + 12 + 8 - 1;
tdep->default_mask_address_p = 0;
set_gdbarch_read_pc (gdbarch, mips_read_pc);
set_gdbarch_write_pc (gdbarch, mips_write_pc);
- set_gdbarch_deprecated_target_read_fp (gdbarch, mips_read_sp); /* Draft FRAME base. */
set_gdbarch_read_sp (gdbarch, mips_read_sp);
/* Add/remove bits from an address. The MIPS needs be careful to
ensure that all 32 bit addresses are sign extended to 64 bits. */
set_gdbarch_addr_bits_remove (gdbarch, mips_addr_bits_remove);
- /* There's a mess in stack frame creation. See comments in
- blockframe.c near reference to DEPRECATED_INIT_FRAME_PC_FIRST. */
- set_gdbarch_deprecated_init_frame_pc_first (gdbarch,
- mips_init_frame_pc_first);
+ /* Unwind the frame. */
+ set_gdbarch_unwind_pc (gdbarch, mips_unwind_pc);
+ set_gdbarch_unwind_dummy_id (gdbarch, mips_unwind_dummy_id);
/* Map debug register numbers onto internal register numbers. */
set_gdbarch_stab_reg_to_regnum (gdbarch, mips_stab_reg_to_regnum);
mips_dwarf_dwarf2_ecoff_reg_to_regnum);
set_gdbarch_register_sim_regno (gdbarch, mips_register_sim_regno);
- /* Initialize a frame */
- set_gdbarch_deprecated_frame_init_saved_regs (gdbarch,
- mips_find_saved_regs);
- set_gdbarch_deprecated_init_extra_frame_info (gdbarch,
- mips_init_extra_frame_info);
-
/* MIPS version of CALL_DUMMY */
/* NOTE: cagney/2003-08-05: Eventually call dummy location will be
replaced by a command, and all targets will default to on stack
(regardless of the stack's execute status). */
set_gdbarch_call_dummy_location (gdbarch, AT_SYMBOL);
- set_gdbarch_deprecated_pop_frame (gdbarch, mips_pop_frame);
set_gdbarch_frame_align (gdbarch, mips_frame_align);
- set_gdbarch_deprecated_save_dummy_frame_tos (gdbarch,
- generic_save_dummy_frame_tos);
set_gdbarch_convert_register_p (gdbarch, mips_convert_register_p);
set_gdbarch_register_to_value (gdbarch, mips_register_to_value);
set_gdbarch_value_to_register (gdbarch, mips_value_to_register);
- set_gdbarch_deprecated_frame_chain (gdbarch, mips_frame_chain);
- set_gdbarch_frameless_function_invocation (gdbarch,
- generic_frameless_function_invocation_not);
- set_gdbarch_deprecated_frame_saved_pc (gdbarch, mips_frame_saved_pc);
- set_gdbarch_frame_args_skip (gdbarch, 0);
-
- set_gdbarch_deprecated_get_saved_register (gdbarch,
- mips_get_saved_register);
-
set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
set_gdbarch_breakpoint_from_pc (gdbarch, mips_breakpoint_from_pc);
set_gdbarch_skip_prologue (gdbarch, mips_skip_prologue);
- set_gdbarch_deprecated_saved_pc_after_call (gdbarch,
- mips_saved_pc_after_call);
set_gdbarch_pointer_to_address (gdbarch, signed_pointer_to_address);
set_gdbarch_address_to_pointer (gdbarch, address_to_signed_pointer);
set_gdbarch_register_type (gdbarch, mips_register_type);
set_gdbarch_print_registers_info (gdbarch, mips_print_registers_info);
- set_gdbarch_pc_in_sigtramp (gdbarch, mips_pc_in_sigtramp);
set_gdbarch_print_insn (gdbarch, gdb_print_insn_mips);
is sitting on? */
set_gdbarch_have_nonsteppable_watchpoint (gdbarch, 1);
+ set_gdbarch_skip_trampoline_code (gdbarch, mips_skip_stub);
+
+ /* NOTE drow/2004-02-11: We overload the core solib trampoline code
+ to support MIPS16. This is a bad thing. Make sure not to do it
+ if we have an OS ABI that actually supports shared libraries, since
+ shared library support is more important. If we have an OS someday
+ that supports both shared libraries and MIPS16, we'll have to find
+ a better place for these. */
+ if (info.osabi == GDB_OSABI_UNKNOWN)
+ {
+ set_gdbarch_in_solib_call_trampoline (gdbarch, mips_in_call_stub);
+ set_gdbarch_in_solib_return_trampoline (gdbarch, mips_in_return_stub);
+ }
+
/* Hook in OS ABI-specific overrides, if they have been registered. */
gdbarch_init_osabi (info, gdbarch);
- set_gdbarch_skip_trampoline_code (gdbarch, mips_skip_stub);
-
- set_gdbarch_in_solib_call_trampoline (gdbarch, mips_in_call_stub);
- set_gdbarch_in_solib_return_trampoline (gdbarch, mips_in_return_stub);
+ /* Unwind the frame. */
+ frame_unwind_append_sniffer (gdbarch, mips_mdebug_frame_sniffer);
+ frame_base_append_sniffer (gdbarch, mips_mdebug_frame_base_sniffer);
return gdbarch;
}
mips_mask_address_p (tdep),
tdep->default_mask_address_p);
}
- fprintf_unfiltered (file,
- "mips_dump_tdep: FP_REGISTER_DOUBLE = %d\n",
- FP_REGISTER_DOUBLE);
fprintf_unfiltered (file,
"mips_dump_tdep: MIPS_DEFAULT_FPU_TYPE = %d (%s)\n",
MIPS_DEFAULT_FPU_TYPE,
: MIPS_FPU_TYPE == MIPS_FPU_SINGLE ? "single"
: MIPS_FPU_TYPE == MIPS_FPU_DOUBLE ? "double"
: "???"));
- fprintf_unfiltered (file,
- "mips_dump_tdep: FP_REGISTER_DOUBLE = %d\n",
- FP_REGISTER_DOUBLE);
fprintf_unfiltered (file,
"mips_dump_tdep: mips_stack_argsize() = %d\n",
- mips_stack_argsize (tdep));
+ mips_stack_argsize (current_gdbarch));
fprintf_unfiltered (file, "mips_dump_tdep: A0_REGNUM = %d\n", A0_REGNUM);
fprintf_unfiltered (file,
"mips_dump_tdep: ADDR_BITS_REMOVE # %s\n",
fprintf_unfiltered (file,
"mips_dump_tdep: MIPS_NUMREGS = %d\n", MIPS_NUMREGS);
fprintf_unfiltered (file,
- "mips_dump_tdep: mips_saved_regsize() = %d\n",
- mips_saved_regsize (tdep));
+ "mips_dump_tdep: mips_abi_regsize() = %d\n",
+ mips_abi_regsize (current_gdbarch));
fprintf_unfiltered (file,
"mips_dump_tdep: PRID_REGNUM = %d\n", PRID_REGNUM);
fprintf_unfiltered (file,
XSTRING (SETUP_ARBITRARY_FRAME (NUMARGS, ARGS)));
fprintf_unfiltered (file,
"mips_dump_tdep: SET_PROC_DESC_IS_DUMMY = function?\n");
- fprintf_unfiltered (file,
- "mips_dump_tdep: SIGFRAME_BASE = %d\n", SIGFRAME_BASE);
- fprintf_unfiltered (file,
- "mips_dump_tdep: SIGFRAME_FPREGSAVE_OFF = %d\n",
- SIGFRAME_FPREGSAVE_OFF);
- fprintf_unfiltered (file,
- "mips_dump_tdep: SIGFRAME_PC_OFF = %d\n",
- SIGFRAME_PC_OFF);
- fprintf_unfiltered (file,
- "mips_dump_tdep: SIGFRAME_REGSAVE_OFF = %d\n",
- SIGFRAME_REGSAVE_OFF);
fprintf_unfiltered (file,
"mips_dump_tdep: SKIP_TRAMPOLINE_CODE # %s\n",
XSTRING (SKIP_TRAMPOLINE_CODE (PC)));
gdbarch_register (bfd_arch_mips, mips_gdbarch_init, mips_dump_tdep);
+ mips_pdr_data = register_objfile_data ();
+
/* Add root prefix command for all "set mips"/"show mips" commands */
add_prefix_cmd ("mips", no_class, set_mips_command,
"Various MIPS specific commands.",
add_show_from_set (add_set_enum_cmd ("saved-gpreg-size",
class_obscure,
size_enums,
- &mips_saved_regsize_string, "\
+ &mips_abi_regsize_string, "\
Set size of general purpose registers saved on the stack.\n\
This option can be set to one of:\n\
32 - Force GDB to treat saved GP registers as 32-bit\n\
projects / deliverable / binutils-gdb.git / blobdiff