* linux-low.c (linux_wait_1): Avoid setting need_step_over is

[deliverable/binutils-gdb.git] / gdb / mips-tdep.h

diff --git a/gdb/mips-tdep.h b/gdb/mips-tdep.h
index 975dc2211d91ff00095450ac94586d8f765429c3..e289818a4c5ca085b3bef41070fc94c8aff8893c 100644 (file)
--- a/gdb/mips-tdep.h
+++ b/gdb/mips-tdep.h
@@ -1,12 +1,13 @@
 /* Target-dependent header for the MIPS architecture, for GDB, the GNU Debugger.
 
-   Copyright 2002, 2003 Free Software Foundation, Inc.
+   Copyright (C) 2002, 2003, 2007, 2008, 2009, 2010
+   Free Software Foundation, Inc.
 
    This file is part of GDB.
 
    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
-   the Free Software Foundation; either version 2 of the License, or
+   the Free Software Foundation; either version 3 of the License, or
    (at your option) any later version.
 
    This program is distributed in the hope that it will be useful,
@@ -15,9 +16,7 @@
    GNU General Public License for more details.
 
    You should have received a copy of the GNU General Public License
-   along with this program; if not, write to the Free Software
-   Foundation, Inc., 59 Temple Place - Suite 330,
-   Boston, MA 02111-1307, USA.  */
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
 
 #ifndef MIPS_TDEP_H
 #define MIPS_TDEP_H
@@ -40,9 +39,6 @@ enum mips_abi
 /* Return the MIPS ABI associated with GDBARCH.  */
 enum mips_abi mips_abi (struct gdbarch *gdbarch);
 
-/* For wince :-(.  */
-extern CORE_ADDR mips_next_pc (CORE_ADDR pc);
-
 /* Return the MIPS ISA's register size.  Just a short cut to the BFD
    architecture's word size.  */
 extern int mips_isa_regsize (struct gdbarch *gdbarch);
@@ -61,12 +57,52 @@ struct mips_regnum
 };
 extern const struct mips_regnum *mips_regnum (struct gdbarch *gdbarch);
 
-/* Register numbers of various important registers.  Note that some of
-   these values are "real" register numbers, and correspond to the
-   general registers of the machine, and some are "phony" register
-   numbers which are too large to be actual register numbers as far as
-   the user is concerned but do serve to get the desired values when
-   passed to read_register.  */
+/* Some MIPS boards don't support floating point while others only
+   support single-precision floating-point operations.  */
+
+enum mips_fpu_type
+{
+  MIPS_FPU_DOUBLE,             /* Full double precision floating point.  */
+  MIPS_FPU_SINGLE,             /* Single precision floating point (R4650).  */
+  MIPS_FPU_NONE                        /* No floating point.  */
+};
+
+/* MIPS specific per-architecture information */
+struct gdbarch_tdep
+{
+  /* from the elf header */
+  int elf_flags;
+
+  /* mips options */
+  enum mips_abi mips_abi;
+  enum mips_abi found_abi;
+  enum mips_fpu_type mips_fpu_type;
+  int mips_last_arg_regnum;
+  int mips_last_fp_arg_regnum;
+  int default_mask_address_p;
+  /* Is the target using 64-bit raw integer registers but only
+     storing a left-aligned 32-bit value in each?  */
+  int mips64_transfers_32bit_regs_p;
+  /* Indexes for various registers.  IRIX and embedded have
+     different values.  This contains the "public" fields.  Don't
+     add any that do not need to be public.  */
+  const struct mips_regnum *regnum;
+  /* Register names table for the current register set.  */
+  const char **mips_processor_reg_names;
+
+  /* The size of register data available from the target, if known.
+     This doesn't quite obsolete the manual
+     mips64_transfers_32bit_regs_p, since that is documented to force
+     left alignment even for big endian (very strange).  */
+  int register_size_valid_p;
+  int register_size;
+
+  /* Return the expected next PC if FRAME is stopped at a syscall
+     instruction.  */
+  CORE_ADDR (*syscall_next_pc) (struct frame_info *frame);
+};
+
+/* Register numbers of various important registers.  */
 
 enum
 {
@@ -86,6 +122,7 @@ enum
   MIPS_EMBED_FP0_REGNUM = 38,
   MIPS_UNUSED_REGNUM = 73,     /* Never used, FIXME */
   MIPS_FIRST_EMBED_REGNUM = 74,        /* First CP0 register for embedded use.  */
+  MIPS_PRID_REGNUM = 89,       /* Processor ID.  */
   MIPS_LAST_EMBED_REGNUM = 89  /* Last one.  */
 };
 
@@ -102,7 +139,7 @@ enum
 };
 
 /* Single step based on where the current instruction will take us.  */
-extern void mips_software_single_step (enum target_signal, int);
+extern int mips_software_single_step (struct frame_info *frame);
 
 /* Tell if the program counter value in MEMADDR is in a MIPS16
    function.  */
@@ -111,4 +148,9 @@ extern int mips_pc_is_mips16 (bfd_vma memaddr);
 /* Return the currently configured (or set) saved register size. */
 extern unsigned int mips_abi_regsize (struct gdbarch *gdbarch);
 
+/* Target descriptions which only indicate the size of general
+   registers.  */
+extern struct target_desc *mips_tdesc_gp32;
+extern struct target_desc *mips_tdesc_gp64;
+
 #endif /* MIPS_TDEP_H */