push_reg (pv_t *regs, struct pv_area *stack, int regnum)
{
regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], -4);
- pv_area_store (stack, regs[E_SP_REGNUM], 4, regs[regnum]);
+ stack->store (regs[E_SP_REGNUM], 4, regs[regnum]);
}
/* Translate an "r" register number extracted from an instruction encoding
return E_E0_REGNUM + rreg;
}
-/* Find saved registers in a 'struct pv_area'; we pass this to pv_area_scan.
+/* Find saved registers in a 'struct pv_area'; we pass this to pv_area::scan.
If VALUE is a saved register, ADDR says it was saved at a constant
offset from the frame base, and SIZE indicates that the whole
CORE_ADDR pc;
int rn;
pv_t regs[MN10300_MAX_NUM_REGS];
- struct pv_area *stack;
- struct cleanup *back_to;
CORE_ADDR after_last_frame_setup_insn = start_pc;
int am33_mode = AM33_MODE (gdbarch);
regs[rn] = pv_register (rn, 0);
result->reg_offset[rn] = 1;
}
- stack = make_pv_area (E_SP_REGNUM, gdbarch_addr_bit (gdbarch));
- back_to = make_cleanup_free_pv_area (stack);
+ pv_area stack (E_SP_REGNUM, gdbarch_addr_bit (gdbarch));
- /* The typical call instruction will have saved the return address on the
- stack. Space for the return address has already been preallocated in
- the caller's frame. It's possible, such as when using -mrelax with gcc
- that other registers were saved as well. If this happens, we really
- have no chance of deciphering the frame. DWARF info can save the day
- when this happens. */
- pv_area_store (stack, regs[E_SP_REGNUM], 4, regs[E_PC_REGNUM]);
+ /* The typical call instruction will have saved the return address on the
+ stack. Space for the return address has already been preallocated in
+ the caller's frame. It's possible, such as when using -mrelax with gcc
+ that other registers were saved as well. If this happens, we really
+ have no chance of deciphering the frame. DWARF info can save the day
+ when this happens. */
+ stack.store (regs[E_SP_REGNUM], 4, regs[E_PC_REGNUM]);
pc = start_pc;
while (pc < limit_pc)
if ((save_mask & movm_exreg0_bit) && am33_mode)
{
- push_reg (regs, stack, E_E2_REGNUM);
- push_reg (regs, stack, E_E3_REGNUM);
+ push_reg (regs, &stack, E_E2_REGNUM);
+ push_reg (regs, &stack, E_E3_REGNUM);
}
if ((save_mask & movm_exreg1_bit) && am33_mode)
{
- push_reg (regs, stack, E_E4_REGNUM);
- push_reg (regs, stack, E_E5_REGNUM);
- push_reg (regs, stack, E_E6_REGNUM);
- push_reg (regs, stack, E_E7_REGNUM);
+ push_reg (regs, &stack, E_E4_REGNUM);
+ push_reg (regs, &stack, E_E5_REGNUM);
+ push_reg (regs, &stack, E_E6_REGNUM);
+ push_reg (regs, &stack, E_E7_REGNUM);
}
if ((save_mask & movm_exother_bit) && am33_mode)
{
- push_reg (regs, stack, E_E0_REGNUM);
- push_reg (regs, stack, E_E1_REGNUM);
- push_reg (regs, stack, E_MDRQ_REGNUM);
- push_reg (regs, stack, E_MCRH_REGNUM);
- push_reg (regs, stack, E_MCRL_REGNUM);
- push_reg (regs, stack, E_MCVF_REGNUM);
+ push_reg (regs, &stack, E_E0_REGNUM);
+ push_reg (regs, &stack, E_E1_REGNUM);
+ push_reg (regs, &stack, E_MDRQ_REGNUM);
+ push_reg (regs, &stack, E_MCRH_REGNUM);
+ push_reg (regs, &stack, E_MCRL_REGNUM);
+ push_reg (regs, &stack, E_MCVF_REGNUM);
}
if (save_mask & movm_d2_bit)
- push_reg (regs, stack, E_D2_REGNUM);
+ push_reg (regs, &stack, E_D2_REGNUM);
if (save_mask & movm_d3_bit)
- push_reg (regs, stack, E_D3_REGNUM);
+ push_reg (regs, &stack, E_D3_REGNUM);
if (save_mask & movm_a2_bit)
- push_reg (regs, stack, E_A2_REGNUM);
+ push_reg (regs, &stack, E_A2_REGNUM);
if (save_mask & movm_a3_bit)
- push_reg (regs, stack, E_A3_REGNUM);
+ push_reg (regs, &stack, E_A3_REGNUM);
if (save_mask & movm_other_bit)
{
- push_reg (regs, stack, E_D0_REGNUM);
- push_reg (regs, stack, E_D1_REGNUM);
- push_reg (regs, stack, E_A0_REGNUM);
- push_reg (regs, stack, E_A1_REGNUM);
- push_reg (regs, stack, E_MDR_REGNUM);
- push_reg (regs, stack, E_LIR_REGNUM);
- push_reg (regs, stack, E_LAR_REGNUM);
+ push_reg (regs, &stack, E_D0_REGNUM);
+ push_reg (regs, &stack, E_D1_REGNUM);
+ push_reg (regs, &stack, E_A0_REGNUM);
+ push_reg (regs, &stack, E_A1_REGNUM);
+ push_reg (regs, &stack, E_MDR_REGNUM);
+ push_reg (regs, &stack, E_LIR_REGNUM);
+ push_reg (regs, &stack, E_LAR_REGNUM);
/* The `other' bit leaves a blank area of four bytes at
the beginning of its block of saved registers, making
it 32 bytes long in total. */
rN = buf[0] & 0x0f;
fsM = (Y << 4) | sM;
- pv_area_store (stack, regs[translate_rreg (rN)], 4,
- regs[E_FS0_REGNUM + fsM]);
+ stack.store (regs[translate_rreg (rN)], 4,
+ regs[E_FS0_REGNUM + fsM]);
pc += 3;
}
sM = (buf[0] & 0xf0) >> 4;
fsM = (Y << 4) | sM;
- pv_area_store (stack, regs[E_SP_REGNUM], 4,
- regs[E_FS0_REGNUM + fsM]);
+ stack.store (regs[E_SP_REGNUM], 4,
+ regs[E_FS0_REGNUM + fsM]);
pc += 3;
}
Z = (buf[1] & 0x02) >> 1;
fsM = (Z << 4) | sM;
- pv_area_store (stack,
- pv_add (regs[translate_rreg (rN)],
- regs[translate_rreg (rI)]),
- 4, regs[E_FS0_REGNUM + fsM]);
+ stack.store (pv_add (regs[translate_rreg (rN)],
+ regs[translate_rreg (rI)]),
+ 4, regs[E_FS0_REGNUM + fsM]);
pc += 4;
}
fsM = (Y << 4) | sM;
d8 = extract_signed_integer (&buf[1], 1, byte_order);
- pv_area_store (stack,
- pv_add_constant (regs[translate_rreg (rN)], d8),
- 4, regs[E_FS0_REGNUM + fsM]);
+ stack.store (pv_add_constant (regs[translate_rreg (rN)], d8),
+ 4, regs[E_FS0_REGNUM + fsM]);
pc += 4;
}
fsM = (Y << 4) | sM;
d24 = extract_signed_integer (&buf[1], 3, byte_order);
- pv_area_store (stack,
- pv_add_constant (regs[translate_rreg (rN)], d24),
- 4, regs[E_FS0_REGNUM + fsM]);
+ stack.store (pv_add_constant (regs[translate_rreg (rN)], d24),
+ 4, regs[E_FS0_REGNUM + fsM]);
pc += 6;
}
fsM = (Y << 4) | sM;
d32 = extract_signed_integer (&buf[1], 4, byte_order);
- pv_area_store (stack,
- pv_add_constant (regs[translate_rreg (rN)], d32),
- 4, regs[E_FS0_REGNUM + fsM]);
+ stack.store (pv_add_constant (regs[translate_rreg (rN)], d32),
+ 4, regs[E_FS0_REGNUM + fsM]);
pc += 7;
}
fsM = (Y << 4) | sM;
d8 = extract_signed_integer (&buf[1], 1, byte_order);
- pv_area_store (stack,
- pv_add_constant (regs[E_SP_REGNUM], d8),
- 4, regs[E_FS0_REGNUM + fsM]);
+ stack.store (pv_add_constant (regs[E_SP_REGNUM], d8),
+ 4, regs[E_FS0_REGNUM + fsM]);
pc += 4;
}
fsM = (Y << 4) | sM;
d24 = extract_signed_integer (&buf[1], 3, byte_order);
- pv_area_store (stack,
- pv_add_constant (regs[E_SP_REGNUM], d24),
- 4, regs[E_FS0_REGNUM + fsM]);
+ stack.store (pv_add_constant (regs[E_SP_REGNUM], d24),
+ 4, regs[E_FS0_REGNUM + fsM]);
pc += 6;
}
fsM = (Y << 4) | sM;
d32 = extract_signed_integer (&buf[1], 4, byte_order);
- pv_area_store (stack,
- pv_add_constant (regs[E_SP_REGNUM], d32),
- 4, regs[E_FS0_REGNUM + fsM]);
+ stack.store (pv_add_constant (regs[E_SP_REGNUM], d32),
+ 4, regs[E_FS0_REGNUM + fsM]);
pc += 7;
}
rN_regnum = translate_rreg (rN);
- pv_area_store (stack, regs[rN_regnum], 4,
- regs[E_FS0_REGNUM + fsM]);
+ stack.store (regs[rN_regnum], 4,
+ regs[E_FS0_REGNUM + fsM]);
regs[rN_regnum] = pv_add_constant (regs[rN_regnum], 4);
pc += 3;
rN_regnum = translate_rreg (rN);
- pv_area_store (stack, regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]);
+ stack.store (regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]);
regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm8);
pc += 4;
rN_regnum = translate_rreg (rN);
- pv_area_store (stack, regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]);
+ stack.store (regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]);
regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm24);
pc += 6;
rN_regnum = translate_rreg (rN);
- pv_area_store (stack, regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]);
+ stack.store (regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]);
regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm32);
pc += 7;
}
/* Record where all the registers were saved. */
- pv_area_scan (stack, check_for_saved, (void *) result);
+ stack.scan (check_for_saved, (void *) result);
result->prologue_end = after_last_frame_setup_insn;
-
- do_cleanups (back_to);
}
/* Function: skip_prologue