/* Target-dependent code for Moxie.
- Copyright (C) 2009-2013 Free Software Foundation, Inc.
+ Copyright (C) 2009-2017 Free Software Foundation, Inc.
This file is part of GDB.
#include "gdbtypes.h"
#include "gdbcmd.h"
#include "gdbcore.h"
-#include "gdb_string.h"
#include "value.h"
#include "inferior.h"
#include "symfile.h"
#include "record.h"
#include "record-full.h"
-#include "gdb_assert.h"
-
#include "moxie-tdep.h"
+#include <algorithm>
/* Local functions. */
return sp & ~1;
}
-/* Implement the "breakpoint_from_pc" gdbarch method. */
-
-static const unsigned char *
-moxie_breakpoint_from_pc (struct gdbarch *gdbarch,
- CORE_ADDR *pcptr, int *lenptr)
-{
- static unsigned char breakpoint[] = { 0x35, 0x00 };
+constexpr gdb_byte moxie_break_insn[] = { 0x35, 0x00 };
- *lenptr = sizeof (breakpoint);
- return breakpoint;
-}
+typedef BP_MANIPULATION (moxie_break_insn) moxie_breakpoint;
/* Moxie register names. */
-char *moxie_register_names[] = {
+static const char *moxie_register_names[] = {
"$fp", "$sp", "$r0", "$r1", "$r2",
"$r3", "$r4", "$r5", "$r6", "$r7",
"$r8", "$r9", "$r10", "$r11", "$r12",
static void
moxie_store_return_value (struct type *type, struct regcache *regcache,
- const void *valbuf)
+ const gdb_byte *valbuf)
{
struct gdbarch *gdbarch = get_regcache_arch (regcache);
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
regcache_cooked_write_unsigned (regcache, RET1_REGNUM, regval);
if (len > 4)
{
- regval = extract_unsigned_integer ((gdb_byte *) valbuf + 4,
- len - 4, byte_order);
+ regval = extract_unsigned_integer (valbuf + 4, len - 4, byte_order);
regcache_cooked_write_unsigned (regcache, RET1_REGNUM + 1, regval);
}
}
CORE_ADDR post_prologue_pc
= skip_prologue_using_sal (gdbarch, func_addr);
if (post_prologue_pc != 0)
- return max (pc, post_prologue_pc);
+ return std::max (pc, post_prologue_pc);
else
{
/* Can't determine prologue from the symbol table, need to examine
plg_end = moxie_analyze_prologue (func_addr,
func_end, &cache, gdbarch);
/* Found a function. */
- sym = lookup_symbol (func_name, NULL, VAR_DOMAIN, NULL);
+ sym = lookup_symbol (func_name, NULL, VAR_DOMAIN, NULL).symbol;
/* Don't use line number debug info for assembly source
files. */
if (sym && SYMBOL_LANGUAGE (sym) != language_asm)
struct trad_frame_saved_reg *saved_regs;
};
+/* Read an unsigned integer from the inferior, and adjust
+ endianess. */
+static ULONGEST
+moxie_process_readu (CORE_ADDR addr, gdb_byte *buf,
+ int length, enum bfd_endian byte_order)
+{
+ if (target_read_memory (addr, buf, length))
+ {
+ if (record_debug)
+ printf_unfiltered (_("Process record: error reading memory at "
+ "addr 0x%s len = %d.\n"),
+ paddress (target_gdbarch (), addr), length);
+ return -1;
+ }
+
+ return extract_unsigned_integer (buf, length, byte_order);
+}
+
+
+/* Helper macro to extract the signed 10-bit offset from a 16-bit
+ branch instruction. */
+#define INST2OFFSET(o) ((((signed short)((o & ((1<<10)-1))<<6))>>6)<<1)
+
+/* Insert a single step breakpoint. */
+
+static std::vector<CORE_ADDR>
+moxie_software_single_step (struct regcache *regcache)
+{
+ struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ CORE_ADDR addr;
+ gdb_byte buf[4];
+ uint16_t inst;
+ uint32_t tmpu32;
+ ULONGEST fp;
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+ std::vector<CORE_ADDR> next_pcs;
+
+ addr = regcache_read_pc (regcache);
+
+ inst = (uint16_t) moxie_process_readu (addr, buf, 2, byte_order);
+
+ /* Decode instruction. */
+ if (inst & (1 << 15))
+ {
+ if (inst & (1 << 14))
+ {
+ /* This is a Form 3 instruction. */
+ int opcode = (inst >> 10 & 0xf);
+
+ switch (opcode)
+ {
+ case 0x00: /* beq */
+ case 0x01: /* bne */
+ case 0x02: /* blt */
+ case 0x03: /* bgt */
+ case 0x04: /* bltu */
+ case 0x05: /* bgtu */
+ case 0x06: /* bge */
+ case 0x07: /* ble */
+ case 0x08: /* bgeu */
+ case 0x09: /* bleu */
+ /* Insert breaks on both branches, because we can't currently tell
+ which way things will go. */
+ next_pcs.push_back (addr + 2);
+ next_pcs.push_back (addr + 2 + INST2OFFSET(inst));
+ break;
+ default:
+ {
+ /* Do nothing. */
+ break;
+ }
+ }
+ }
+ else
+ {
+ /* This is a Form 2 instruction. They are all 16 bits. */
+ next_pcs.push_back (addr + 2);
+ }
+ }
+ else
+ {
+ /* This is a Form 1 instruction. */
+ int opcode = inst >> 8;
+
+ switch (opcode)
+ {
+ /* 16-bit instructions. */
+ case 0x00: /* bad */
+ case 0x02: /* mov (register-to-register) */
+ case 0x05: /* add.l */
+ case 0x06: /* push */
+ case 0x07: /* pop */
+ case 0x0a: /* ld.l (register indirect) */
+ case 0x0b: /* st.l */
+ case 0x0e: /* cmp */
+ case 0x0f: /* nop */
+ case 0x10: /* sex.b */
+ case 0x11: /* sex.s */
+ case 0x12: /* zex.b */
+ case 0x13: /* zex.s */
+ case 0x14: /* umul.x */
+ case 0x15: /* mul.x */
+ case 0x16:
+ case 0x17:
+ case 0x18:
+ case 0x1c: /* ld.b (register indirect) */
+ case 0x1e: /* st.b */
+ case 0x21: /* ld.s (register indirect) */
+ case 0x23: /* st.s */
+ case 0x26: /* and */
+ case 0x27: /* lshr */
+ case 0x28: /* ashl */
+ case 0x29: /* sub.l */
+ case 0x2a: /* neg */
+ case 0x2b: /* or */
+ case 0x2c: /* not */
+ case 0x2d: /* ashr */
+ case 0x2e: /* xor */
+ case 0x2f: /* mul.l */
+ case 0x31: /* div.l */
+ case 0x32: /* udiv.l */
+ case 0x33: /* mod.l */
+ case 0x34: /* umod.l */
+ next_pcs.push_back (addr + 2);
+ break;
+
+ /* 32-bit instructions. */
+ case 0x0c: /* ldo.l */
+ case 0x0d: /* sto.l */
+ case 0x36: /* ldo.b */
+ case 0x37: /* sto.b */
+ case 0x38: /* ldo.s */
+ case 0x39: /* sto.s */
+ next_pcs.push_back (addr + 4);
+ break;
+
+ /* 48-bit instructions. */
+ case 0x01: /* ldi.l (immediate) */
+ case 0x08: /* lda.l */
+ case 0x09: /* sta.l */
+ case 0x1b: /* ldi.b (immediate) */
+ case 0x1d: /* lda.b */
+ case 0x1f: /* sta.b */
+ case 0x20: /* ldi.s (immediate) */
+ case 0x22: /* lda.s */
+ case 0x24: /* sta.s */
+ next_pcs.push_back (addr + 6);
+ break;
+
+ /* Control flow instructions. */
+ case 0x03: /* jsra */
+ case 0x1a: /* jmpa */
+ next_pcs.push_back (moxie_process_readu (addr + 2, buf, 4,
+ byte_order));
+ break;
+
+ case 0x04: /* ret */
+ regcache_cooked_read_unsigned (regcache, MOXIE_FP_REGNUM, &fp);
+ next_pcs.push_back (moxie_process_readu (fp + 4, buf, 4, byte_order));
+ break;
+
+ case 0x19: /* jsr */
+ case 0x25: /* jmp */
+ regcache_raw_read (regcache,
+ (inst >> 4) & 0xf, (gdb_byte *) & tmpu32);
+ next_pcs.push_back (tmpu32);
+ break;
+
+ case 0x30: /* swi */
+ case 0x35: /* brk */
+ /* Unsupported, for now. */
+ break;
+ }
+ }
+
+ return next_pcs;
+}
+
/* Implement the "read_pc" gdbarch method. */
static CORE_ADDR
static void
moxie_extract_return_value (struct type *type, struct regcache *regcache,
- void *dst)
+ gdb_byte *dst)
{
struct gdbarch *gdbarch = get_regcache_arch (regcache);
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
- bfd_byte *valbuf = dst;
int len = TYPE_LENGTH (type);
ULONGEST tmp;
/* By using store_unsigned_integer we avoid having to do
anything special for small big-endian values. */
regcache_cooked_read_unsigned (regcache, RET1_REGNUM, &tmp);
- store_unsigned_integer (valbuf, (len > 4 ? len - 4 : len), byte_order, tmp);
+ store_unsigned_integer (dst, (len > 4 ? len - 4 : len), byte_order, tmp);
/* Ignore return values more than 8 bytes in size because the moxie
returns anything more than 8 bytes in the stack. */
if (len > 4)
{
regcache_cooked_read_unsigned (regcache, RET1_REGNUM + 1, &tmp);
- store_unsigned_integer (valbuf + len - 4, 4, byte_order, tmp);
+ store_unsigned_integer (dst + len - 4, 4, byte_order, tmp);
}
}
int i;
if (*this_cache)
- return *this_cache;
+ return (struct moxie_frame_cache *) *this_cache;
cache = moxie_alloc_frame_cache ();
*this_cache = cache;
return frame_id_build (sp, get_frame_pc (this_frame));
}
-/* Read an unsigned integer from the inferior, and adjust
- endianess. */
-static ULONGEST
-moxie_process_readu (CORE_ADDR addr, gdb_byte *buf,
- int length, enum bfd_endian byte_order)
-{
- if (target_read_memory (addr, buf, length))
- {
- if (record_debug)
- printf_unfiltered (_("Process record: error reading memory at "
- "addr 0x%s len = %d.\n"),
- paddress (target_gdbarch (), addr), length);
- return -1;
- }
-
- return extract_unsigned_integer (buf, length, byte_order);
-}
-
/* Parse the current instruction and record the values of the registers and
memory that will be changed in current instruction to "record_arch_list".
Return -1 if something wrong. */
case 0x0d: /* sto.l */
{
int reg = (inst >> 4) & 0xf;
- uint32_t offset = (uint32_t) moxie_process_readu (addr+2, buf, 4,
- byte_order);
+ uint32_t offset = (((int16_t) moxie_process_readu (addr+2, buf, 2,
+ byte_order)) << 16 ) >> 16;
regcache_raw_read (regcache, reg, (gdb_byte *) & tmpu32);
tmpu32 = extract_unsigned_integer ((gdb_byte *) & tmpu32,
4, byte_order);
return -1;
}
break;
- case 0x0f:
- case 0x10:
- case 0x11:
- case 0x12:
- case 0x13:
- case 0x14:
- case 0x15:
+ case 0x0f: /* nop */
+ {
+ /* Do nothing. */
+ break;
+ }
+ case 0x10: /* sex.b */
+ case 0x11: /* sex.s */
+ case 0x12: /* zex.b */
+ case 0x13: /* zex.s */
+ case 0x14: /* umul.x */
+ case 0x15: /* mul.x */
+ {
+ int reg = (inst >> 4) & 0xf;
+ if (record_full_arch_list_add_reg (regcache, reg))
+ return -1;
+ }
+ break;
case 0x16:
case 0x17:
case 0x18:
case 0x26: /* and */
case 0x27: /* lshr */
case 0x28: /* ashl */
- case 0x29: /* sub.l */
+ case 0x29: /* sub */
case 0x2a: /* neg */
case 0x2b: /* or */
case 0x2c: /* not */
case 0x2d: /* ashr */
case 0x2e: /* xor */
- case 0x2f: /* mul.l */
+ case 0x2f: /* mul */
{
int reg = (inst >> 4) & 0xf;
if (record_full_arch_list_add_reg (regcache, reg))
case 0x37: /* sto.b */
{
int reg = (inst >> 4) & 0xf;
- uint32_t offset = (uint32_t) moxie_process_readu (addr+2, buf, 4,
- byte_order);
+ uint32_t offset = (((int16_t) moxie_process_readu (addr+2, buf, 2,
+ byte_order)) << 16 ) >> 16;
regcache_raw_read (regcache, reg, (gdb_byte *) & tmpu32);
tmpu32 = extract_unsigned_integer ((gdb_byte *) & tmpu32,
4, byte_order);
case 0x39: /* sto.s */
{
int reg = (inst >> 4) & 0xf;
- uint32_t offset = (uint32_t) moxie_process_readu (addr+2, buf, 4,
- byte_order);
+ uint32_t offset = (((int16_t) moxie_process_readu (addr+2, buf, 2,
+ byte_order)) << 16 ) >> 16;
regcache_raw_read (regcache, reg, (gdb_byte *) & tmpu32);
tmpu32 = extract_unsigned_integer ((gdb_byte *) & tmpu32,
4, byte_order);
return arches->gdbarch;
/* Allocate space for the new architecture. */
- tdep = XMALLOC (struct gdbarch_tdep);
+ tdep = XCNEW (struct gdbarch_tdep);
gdbarch = gdbarch_alloc (&info, tdep);
+ set_gdbarch_wchar_bit (gdbarch, 32);
+ set_gdbarch_wchar_signed (gdbarch, 0);
+
set_gdbarch_read_pc (gdbarch, moxie_read_pc);
set_gdbarch_write_pc (gdbarch, moxie_write_pc);
set_gdbarch_unwind_sp (gdbarch, moxie_unwind_sp);
set_gdbarch_skip_prologue (gdbarch, moxie_skip_prologue);
set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
- set_gdbarch_breakpoint_from_pc (gdbarch, moxie_breakpoint_from_pc);
+ set_gdbarch_breakpoint_kind_from_pc (gdbarch,
+ moxie_breakpoint::kind_from_pc);
+ set_gdbarch_sw_breakpoint_from_kind (gdbarch,
+ moxie_breakpoint::bp_from_kind);
set_gdbarch_frame_align (gdbarch, moxie_frame_align);
frame_base_set_default (gdbarch, &moxie_frame_base);
set_gdbarch_unwind_pc (gdbarch, moxie_unwind_pc);
- set_gdbarch_print_insn (gdbarch, print_insn_moxie);
-
/* Hook in ABI-specific overrides, if they have been registered. */
gdbarch_init_osabi (info, gdbarch);
/* Hook in the default unwinders. */
frame_unwind_append_unwinder (gdbarch, &moxie_frame_unwind);
+ /* Single stepping. */
+ set_gdbarch_software_single_step (gdbarch, moxie_software_single_step);
+
/* Support simple overlay manager. */
set_gdbarch_overlay_update (gdbarch, simple_overlay_update);
projects / deliverable / binutils-gdb.git / blobdiff