/* Target-dependent code for PowerPC systems using the SVR4 ABI
for GDB, the GNU debugger.
- Copyright (C) 2000, 2001, 2002, 2003, 2005, 2007, 2008
- Free Software Foundation, Inc.
+ Copyright (C) 2000-2013 Free Software Foundation, Inc.
This file is part of GDB.
#include "target.h"
#include "objfiles.h"
#include "infcall.h"
+#include "dwarf2.h"
-/* Pass the arguments in either registers, or in the stack. Using the
+
+/* Check whether FTPYE is a (pointer to) function type that should use
+ the OpenCL vector ABI. */
+
+static int
+ppc_sysv_use_opencl_abi (struct type *ftype)
+{
+ ftype = check_typedef (ftype);
+
+ if (TYPE_CODE (ftype) == TYPE_CODE_PTR)
+ ftype = check_typedef (TYPE_TARGET_TYPE (ftype));
+
+ return (TYPE_CODE (ftype) == TYPE_CODE_FUNC
+ && TYPE_CALLING_CONVENTION (ftype) == DW_CC_GDB_IBM_OpenCL);
+}
+
+/* Pass the arguments in either registers, or in the stack. Using the
ppc sysv ABI, the first eight words of the argument list (that might
be less than eight parameters if some parameters occupy more than one
word) are passed in r3..r10 registers. float and double parameters are
- passed in fpr's, in addition to that. Rest of the parameters if any
- are passed in user stack.
+ passed in fpr's, in addition to that. Rest of the parameters if any
+ are passed in user stack.
If the function is returning a structure, then the return address is passed
in r3, then the first 7 words of the parametes can be passed in registers,
- starting from r4. */
+ starting from r4. */
CORE_ADDR
ppc_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
int struct_return, CORE_ADDR struct_addr)
{
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+ int opencl_abi = ppc_sysv_use_opencl_abi (value_type (function));
ULONGEST saved_sp;
int argspace = 0; /* 0 is an initial wrong guess. */
int write_pass;
}
else
{
- /* SysV ABI converts floats to doubles before
- writing them to an 8 byte aligned stack location. */
- argoffset = align_up (argoffset, 8);
+ /* The SysV ABI tells us to convert floats to
+ doubles before writing them to an 8 byte aligned
+ stack location. Unfortunately GCC does not do
+ that, and stores floats into 4 byte aligned
+ locations without converting them to doubles.
+ Since there is no know compiler that actually
+ follows the ABI here, we implement the GCC
+ convention. */
+
+ /* Align to 4 bytes or 8 bytes depending on the type of
+ the argument (float or double). */
+ argoffset = align_up (argoffset, len);
if (write_pass)
- {
- char memval[8];
- convert_typed_floating (val, type, memval,
- builtin_type_ieee_double);
write_memory (sp + argoffset, val, len);
- }
- argoffset += 8;
+ argoffset += len;
}
}
else if (TYPE_CODE (type) == TYPE_CODE_FLT
}
else if (len == 8
&& (TYPE_CODE (type) == TYPE_CODE_INT /* long long */
- || TYPE_CODE (type) == TYPE_CODE_FLT)) /* double */
+ || TYPE_CODE (type) == TYPE_CODE_FLT /* double */
+ || (TYPE_CODE (type) == TYPE_CODE_DECFLOAT
+ && tdep->soft_float)))
{
- /* "long long" or soft-float "double" passed in an odd/even
- register pair with the low addressed word in the odd
- register and the high addressed word in the even
- register, or when the registers run out an 8 byte
- aligned stack location. */
+ /* "long long" or soft-float "double" or "_Decimal64"
+ passed in an odd/even register pair with the low
+ addressed word in the odd register and the high
+ addressed word in the even register, or when the
+ registers run out an 8 byte aligned stack
+ location. */
if (greg > 9)
{
/* Just in case GREG was 10. */
greg += 2;
}
}
- else if (len == 16 && TYPE_CODE (type) == TYPE_CODE_FLT
- && (gdbarch_long_double_format (gdbarch)
- == floatformats_ibm_long_double))
+ else if (len == 16
+ && ((TYPE_CODE (type) == TYPE_CODE_FLT
+ && (gdbarch_long_double_format (gdbarch)
+ == floatformats_ibm_long_double))
+ || (TYPE_CODE (type) == TYPE_CODE_DECFLOAT
+ && tdep->soft_float)))
{
- /* Soft-float IBM long double passed in four consecutive
- registers, or on the stack. The registers are not
- necessarily odd/even pairs. */
+ /* Soft-float IBM long double or _Decimal128 passed in
+ four consecutive registers, or on the stack. The
+ registers are not necessarily odd/even pairs. */
if (greg > 7)
{
greg = 11;
greg += 4;
}
}
+ else if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && len <= 8
+ && !tdep->soft_float)
+ {
+ /* 32-bit and 64-bit decimal floats go in f1 .. f8. They can
+ end up in memory. */
+
+ if (freg <= 8)
+ {
+ if (write_pass)
+ {
+ gdb_byte regval[MAX_REGISTER_SIZE];
+ const gdb_byte *p;
+
+ /* 32-bit decimal floats are right aligned in the
+ doubleword. */
+ if (TYPE_LENGTH (type) == 4)
+ {
+ memcpy (regval + 4, val, 4);
+ p = regval;
+ }
+ else
+ p = val;
+
+ regcache_cooked_write (regcache,
+ tdep->ppc_fp0_regnum + freg, p);
+ }
+
+ freg++;
+ }
+ else
+ {
+ argoffset = align_up (argoffset, len);
+
+ if (write_pass)
+ /* Write value in the stack's parameter save area. */
+ write_memory (sp + argoffset, val, len);
+
+ argoffset += len;
+ }
+ }
+ else if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && len == 16
+ && !tdep->soft_float)
+ {
+ /* 128-bit decimal floats go in f2 .. f7, always in even/odd
+ pairs. They can end up in memory, using two doublewords. */
+
+ if (freg <= 6)
+ {
+ /* Make sure freg is even. */
+ freg += freg & 1;
+
+ if (write_pass)
+ {
+ regcache_cooked_write (regcache,
+ tdep->ppc_fp0_regnum + freg, val);
+ regcache_cooked_write (regcache,
+ tdep->ppc_fp0_regnum + freg + 1, val + 8);
+ }
+ }
+ else
+ {
+ argoffset = align_up (argoffset, 8);
+
+ if (write_pass)
+ write_memory (sp + argoffset, val, 16);
+
+ argoffset += 16;
+ }
+
+ /* If a 128-bit decimal float goes to the stack because only f7
+ and f8 are free (thus there's no even/odd register pair
+ available), these registers should be marked as occupied.
+ Hence we increase freg even when writing to memory. */
+ freg += 2;
+ }
+ else if (len < 16
+ && TYPE_CODE (type) == TYPE_CODE_ARRAY
+ && TYPE_VECTOR (type)
+ && opencl_abi)
+ {
+ /* OpenCL vectors shorter than 16 bytes are passed as if
+ a series of independent scalars. */
+ struct type *eltype = check_typedef (TYPE_TARGET_TYPE (type));
+ int i, nelt = TYPE_LENGTH (type) / TYPE_LENGTH (eltype);
+
+ for (i = 0; i < nelt; i++)
+ {
+ const gdb_byte *elval = val + i * TYPE_LENGTH (eltype);
+
+ if (TYPE_CODE (eltype) == TYPE_CODE_FLT && !tdep->soft_float)
+ {
+ if (freg <= 8)
+ {
+ if (write_pass)
+ {
+ int regnum = tdep->ppc_fp0_regnum + freg;
+ gdb_byte regval[MAX_REGISTER_SIZE];
+ struct type *regtype
+ = register_type (gdbarch, regnum);
+ convert_typed_floating (elval, eltype,
+ regval, regtype);
+ regcache_cooked_write (regcache, regnum, regval);
+ }
+ freg++;
+ }
+ else
+ {
+ argoffset = align_up (argoffset, len);
+ if (write_pass)
+ write_memory (sp + argoffset, val, len);
+ argoffset += len;
+ }
+ }
+ else if (TYPE_LENGTH (eltype) == 8)
+ {
+ if (greg > 9)
+ {
+ /* Just in case GREG was 10. */
+ greg = 11;
+ argoffset = align_up (argoffset, 8);
+ if (write_pass)
+ write_memory (sp + argoffset, elval,
+ TYPE_LENGTH (eltype));
+ argoffset += 8;
+ }
+ else
+ {
+ /* Must start on an odd register - r3/r4 etc. */
+ if ((greg & 1) == 0)
+ greg++;
+ if (write_pass)
+ {
+ int regnum = tdep->ppc_gp0_regnum + greg;
+ regcache_cooked_write (regcache,
+ regnum + 0, elval + 0);
+ regcache_cooked_write (regcache,
+ regnum + 1, elval + 4);
+ }
+ greg += 2;
+ }
+ }
+ else
+ {
+ gdb_byte word[MAX_REGISTER_SIZE];
+ store_unsigned_integer (word, tdep->wordsize, byte_order,
+ unpack_long (eltype, elval));
+
+ if (greg <= 10)
+ {
+ if (write_pass)
+ regcache_cooked_write (regcache,
+ tdep->ppc_gp0_regnum + greg,
+ word);
+ greg++;
+ }
+ else
+ {
+ argoffset = align_up (argoffset, tdep->wordsize);
+ if (write_pass)
+ write_memory (sp + argoffset, word, tdep->wordsize);
+ argoffset += tdep->wordsize;
+ }
+ }
+ }
+ }
+ else if (len >= 16
+ && TYPE_CODE (type) == TYPE_CODE_ARRAY
+ && TYPE_VECTOR (type)
+ && opencl_abi)
+ {
+ /* OpenCL vectors 16 bytes or longer are passed as if
+ a series of AltiVec vectors. */
+ int i;
+
+ for (i = 0; i < len / 16; i++)
+ {
+ const gdb_byte *elval = val + i * 16;
+
+ if (vreg <= 13)
+ {
+ if (write_pass)
+ regcache_cooked_write (regcache,
+ tdep->ppc_vr0_regnum + vreg,
+ elval);
+ vreg++;
+ }
+ else
+ {
+ argoffset = align_up (argoffset, 16);
+ if (write_pass)
+ write_memory (sp + argoffset, elval, 16);
+ argoffset += 16;
+ }
+ }
+ }
else if (len == 16
&& TYPE_CODE (type) == TYPE_CODE_ARRAY
&& TYPE_VECTOR (type)
|| TYPE_CODE (type) == TYPE_CODE_UNION)
{
/* Structs and large values are put in an
- aligned stack slot ... */
+ aligned stack slot ... */
if (TYPE_CODE (type) == TYPE_CODE_ARRAY
&& TYPE_VECTOR (type)
&& len >= 16)
write_memory (sp + structoffset, val, len);
/* ... and then a "word" pointing to that address is
passed as the parameter. */
- store_unsigned_integer (word, tdep->wordsize,
+ store_unsigned_integer (word, tdep->wordsize, byte_order,
sp + structoffset);
structoffset += len;
}
else if (TYPE_CODE (type) == TYPE_CODE_INT)
/* Sign or zero extend the "int" into a "word". */
- store_unsigned_integer (word, tdep->wordsize,
+ store_unsigned_integer (word, tdep->wordsize, byte_order,
unpack_long (type, val));
else
/* Always goes in the low address. */
/* The psABI says that "A caller of a function that takes a
variable argument list shall set condition register bit 6 to
1 if it passes one or more arguments in the floating-point
- registers. It is strongly recommended that the caller set the
+ registers. It is strongly recommended that the caller set the
bit to 0 otherwise..." Doing this for normal functions too
shouldn't hurt. */
if (write_pass)
regcache_cooked_write_signed (regcache, gdbarch_sp_regnum (gdbarch), sp);
/* Write the backchain (it occupies WORDSIZED bytes). */
- write_memory_signed_integer (sp, tdep->wordsize, saved_sp);
+ write_memory_signed_integer (sp, tdep->wordsize, byte_order, saved_sp);
/* Point the inferior function call's return address at the dummy's
breakpoint. */
return sp;
}
+/* Handle the return-value conventions for Decimal Floating Point values
+ in both ppc32 and ppc64, which are the same. */
+static int
+get_decimal_float_return_value (struct gdbarch *gdbarch, struct type *valtype,
+ struct regcache *regcache, gdb_byte *readbuf,
+ const gdb_byte *writebuf)
+{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
+ gdb_assert (TYPE_CODE (valtype) == TYPE_CODE_DECFLOAT);
+
+ /* 32-bit and 64-bit decimal floats in f1. */
+ if (TYPE_LENGTH (valtype) <= 8)
+ {
+ if (writebuf != NULL)
+ {
+ gdb_byte regval[MAX_REGISTER_SIZE];
+ const gdb_byte *p;
+
+ /* 32-bit decimal float is right aligned in the doubleword. */
+ if (TYPE_LENGTH (valtype) == 4)
+ {
+ memcpy (regval + 4, writebuf, 4);
+ p = regval;
+ }
+ else
+ p = writebuf;
+
+ regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, p);
+ }
+ if (readbuf != NULL)
+ {
+ regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, readbuf);
+
+ /* Left align 32-bit decimal float. */
+ if (TYPE_LENGTH (valtype) == 4)
+ memcpy (readbuf, readbuf + 4, 4);
+ }
+ }
+ /* 128-bit decimal floats in f2,f3. */
+ else if (TYPE_LENGTH (valtype) == 16)
+ {
+ if (writebuf != NULL || readbuf != NULL)
+ {
+ int i;
+
+ for (i = 0; i < 2; i++)
+ {
+ if (writebuf != NULL)
+ regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 2 + i,
+ writebuf + i * 8);
+ if (readbuf != NULL)
+ regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 2 + i,
+ readbuf + i * 8);
+ }
+ }
+ }
+ else
+ /* Can't happen. */
+ internal_error (__FILE__, __LINE__, _("Unknown decimal float size."));
+
+ return RETURN_VALUE_REGISTER_CONVENTION;
+}
+
/* Handle the return-value conventions specified by the SysV 32-bit
PowerPC ABI (including all the supplements):
when returned in general-purpose registers. */
static enum return_value_convention
-do_ppc_sysv_return_value (struct gdbarch *gdbarch, struct type *type,
- struct regcache *regcache, gdb_byte *readbuf,
- const gdb_byte *writebuf, int broken_gcc)
+do_ppc_sysv_return_value (struct gdbarch *gdbarch, struct type *func_type,
+ struct type *type, struct regcache *regcache,
+ gdb_byte *readbuf, const gdb_byte *writebuf,
+ int broken_gcc)
{
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+ int opencl_abi = func_type? ppc_sysv_use_opencl_abi (func_type) : 0;
+
gdb_assert (tdep->wordsize == 4);
+
if (TYPE_CODE (type) == TYPE_CODE_FLT
&& TYPE_LENGTH (type) <= 8
&& !tdep->soft_float)
if (TYPE_CODE (type) == TYPE_CODE_FLT
&& TYPE_LENGTH (type) == 16
&& !tdep->soft_float
- && (gdbarch_long_double_format (gdbarch) == floatformats_ibm_long_double))
+ && (gdbarch_long_double_format (gdbarch)
+ == floatformats_ibm_long_double))
{
/* IBM long double stored in f1 and f2. */
if (readbuf)
}
return RETURN_VALUE_REGISTER_CONVENTION;
}
- if (TYPE_CODE (type) == TYPE_CODE_FLT
- && TYPE_LENGTH (type) == 16
- && (gdbarch_long_double_format (gdbarch) == floatformats_ibm_long_double))
+ if (TYPE_LENGTH (type) == 16
+ && ((TYPE_CODE (type) == TYPE_CODE_FLT
+ && (gdbarch_long_double_format (gdbarch)
+ == floatformats_ibm_long_double))
+ || (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && tdep->soft_float)))
{
- /* Soft-float IBM long double stored in r3, r4, r5, r6. */
+ /* Soft-float IBM long double or _Decimal128 stored in r3, r4,
+ r5, r6. */
if (readbuf)
{
regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, readbuf);
return RETURN_VALUE_REGISTER_CONVENTION;
}
if ((TYPE_CODE (type) == TYPE_CODE_INT && TYPE_LENGTH (type) == 8)
- || (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) == 8))
+ || (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) == 8)
+ || (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && TYPE_LENGTH (type) == 8
+ && tdep->soft_float))
{
if (readbuf)
{
- /* A long long, or a double stored in the 32 bit r3/r4. */
+ /* A long long, double or _Decimal64 stored in the 32 bit
+ r3/r4. */
regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
readbuf + 0);
regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
}
if (writebuf)
{
- /* A long long, or a double stored in the 32 bit r3/r4. */
+ /* A long long, double or _Decimal64 stored in the 32 bit
+ r3/r4. */
regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
writebuf + 0);
regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
}
return RETURN_VALUE_REGISTER_CONVENTION;
}
+ if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && !tdep->soft_float)
+ return get_decimal_float_return_value (gdbarch, type, regcache, readbuf,
+ writebuf);
else if ((TYPE_CODE (type) == TYPE_CODE_INT
|| TYPE_CODE (type) == TYPE_CODE_CHAR
|| TYPE_CODE (type) == TYPE_CODE_BOOL
ULONGEST regval;
regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
®val);
- store_unsigned_integer (readbuf, TYPE_LENGTH (type), regval);
+ store_unsigned_integer (readbuf, TYPE_LENGTH (type), byte_order,
+ regval);
}
if (writebuf)
{
}
return RETURN_VALUE_REGISTER_CONVENTION;
}
+ /* OpenCL vectors < 16 bytes are returned as distinct
+ scalars in f1..f2 or r3..r10. */
+ if (TYPE_CODE (type) == TYPE_CODE_ARRAY
+ && TYPE_VECTOR (type)
+ && TYPE_LENGTH (type) < 16
+ && opencl_abi)
+ {
+ struct type *eltype = check_typedef (TYPE_TARGET_TYPE (type));
+ int i, nelt = TYPE_LENGTH (type) / TYPE_LENGTH (eltype);
+
+ for (i = 0; i < nelt; i++)
+ {
+ int offset = i * TYPE_LENGTH (eltype);
+
+ if (TYPE_CODE (eltype) == TYPE_CODE_FLT)
+ {
+ int regnum = tdep->ppc_fp0_regnum + 1 + i;
+ gdb_byte regval[MAX_REGISTER_SIZE];
+ struct type *regtype = register_type (gdbarch, regnum);
+
+ if (writebuf != NULL)
+ {
+ convert_typed_floating (writebuf + offset, eltype,
+ regval, regtype);
+ regcache_cooked_write (regcache, regnum, regval);
+ }
+ if (readbuf != NULL)
+ {
+ regcache_cooked_read (regcache, regnum, regval);
+ convert_typed_floating (regval, regtype,
+ readbuf + offset, eltype);
+ }
+ }
+ else
+ {
+ int regnum = tdep->ppc_gp0_regnum + 3 + i;
+ ULONGEST regval;
+
+ if (writebuf != NULL)
+ {
+ regval = unpack_long (eltype, writebuf + offset);
+ regcache_cooked_write_unsigned (regcache, regnum, regval);
+ }
+ if (readbuf != NULL)
+ {
+ regcache_cooked_read_unsigned (regcache, regnum, ®val);
+ store_unsigned_integer (readbuf + offset,
+ TYPE_LENGTH (eltype), byte_order,
+ regval);
+ }
+ }
+ }
+
+ return RETURN_VALUE_REGISTER_CONVENTION;
+ }
+ /* OpenCL vectors >= 16 bytes are returned in v2..v9. */
+ if (TYPE_CODE (type) == TYPE_CODE_ARRAY
+ && TYPE_VECTOR (type)
+ && TYPE_LENGTH (type) >= 16
+ && opencl_abi)
+ {
+ int n_regs = TYPE_LENGTH (type) / 16;
+ int i;
+
+ for (i = 0; i < n_regs; i++)
+ {
+ int offset = i * 16;
+ int regnum = tdep->ppc_vr0_regnum + 2 + i;
+
+ if (writebuf != NULL)
+ regcache_cooked_write (regcache, regnum, writebuf + offset);
+ if (readbuf != NULL)
+ regcache_cooked_read (regcache, regnum, readbuf + offset);
+ }
+
+ return RETURN_VALUE_REGISTER_CONVENTION;
+ }
if (TYPE_LENGTH (type) == 16
&& TYPE_CODE (type) == TYPE_CODE_ARRAY
&& TYPE_VECTOR (type)
}
enum return_value_convention
-ppc_sysv_abi_return_value (struct gdbarch *gdbarch, struct type *valtype,
- struct regcache *regcache, gdb_byte *readbuf,
- const gdb_byte *writebuf)
+ppc_sysv_abi_return_value (struct gdbarch *gdbarch, struct value *function,
+ struct type *valtype, struct regcache *regcache,
+ gdb_byte *readbuf, const gdb_byte *writebuf)
{
- return do_ppc_sysv_return_value (gdbarch, valtype, regcache, readbuf,
- writebuf, 0);
+ return do_ppc_sysv_return_value (gdbarch,
+ function ? value_type (function) : NULL,
+ valtype, regcache, readbuf, writebuf, 0);
}
enum return_value_convention
ppc_sysv_abi_broken_return_value (struct gdbarch *gdbarch,
+ struct value *function,
struct type *valtype,
struct regcache *regcache,
gdb_byte *readbuf, const gdb_byte *writebuf)
{
- return do_ppc_sysv_return_value (gdbarch, valtype, regcache, readbuf,
- writebuf, 1);
+ return do_ppc_sysv_return_value (gdbarch,
+ function ? value_type (function) : NULL,
+ valtype, regcache, readbuf, writebuf, 1);
}
/* The helper function for 64-bit SYSV push_dummy_call. Converts the
struct obj_section *dot_fn_section;
struct minimal_symbol *dot_fn;
struct minimal_symbol *fn;
- CORE_ADDR toc;
/* Find the minimal symbol that corresponds to CODE_ADDR (should
have a name of the form ".FN"). */
dot_fn = lookup_minimal_symbol_by_pc (code_addr);
return 1;
}
-/* Pass the arguments in either registers, or in the stack. Using the
+/* Push a float in either registers, or in the stack. Using the ppc 64 bit
+ SysV ABI.
+
+ This implements a dumbed down version of the ABI. It always writes
+ values to memory, GPR and FPR, even when not necessary. Doing this
+ greatly simplifies the logic. */
+
+static void
+ppc64_sysv_abi_push_float (struct gdbarch *gdbarch, struct regcache *regcache,
+ struct gdbarch_tdep *tdep, struct type *type,
+ const bfd_byte *val, int freg, int greg,
+ CORE_ADDR gparam)
+{
+ gdb_byte regval[MAX_REGISTER_SIZE];
+ const gdb_byte *p;
+
+ if (TYPE_LENGTH (type) <= 8)
+ {
+ /* Version 1.7 of the 64-bit PowerPC ELF ABI says:
+
+ "Single precision floating point values are mapped to
+ the first word in a single doubleword."
+
+ And version 1.9 says:
+
+ "Single precision floating point values are mapped to
+ the second word in a single doubleword."
+
+ GDB then writes single precision floating point values
+ at both words in a doubleword, to support both ABIs. */
+ if (TYPE_LENGTH (type) == 4)
+ {
+ memcpy (regval, val, 4);
+ memcpy (regval + 4, val, 4);
+ p = regval;
+ }
+ else
+ p = val;
+
+ /* Write value in the stack's parameter save area. */
+ write_memory (gparam, p, 8);
+
+ /* Floats and Doubles go in f1 .. f13. They also consume a left aligned
+ GREG, and can end up in memory. */
+ if (freg <= 13)
+ {
+ struct type *regtype;
+
+ regtype = register_type (gdbarch, tdep->ppc_fp0_regnum + freg);
+ convert_typed_floating (val, type, regval, regtype);
+ regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + freg, regval);
+ }
+ if (greg <= 10)
+ regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + greg, regval);
+ }
+ else
+ {
+ /* IBM long double stored in two doublewords of the
+ parameter save area and corresponding registers. */
+ if (!tdep->soft_float && freg <= 13)
+ {
+ regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + freg, val);
+ if (freg <= 12)
+ regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + freg + 1,
+ val + 8);
+ }
+ if (greg <= 10)
+ {
+ regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + greg, val);
+ if (greg <= 9)
+ regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + greg + 1,
+ val + 8);
+ }
+ write_memory (gparam, val, TYPE_LENGTH (type));
+ }
+}
+
+/* Pass the arguments in either registers, or in the stack. Using the
ppc 64 bit SysV ABI.
This implements a dumbed down version of the ABI. It always writes
values to memory, GPR and FPR, even when not necessary. Doing this
- greatly simplifies the logic. */
+ greatly simplifies the logic. */
CORE_ADDR
-ppc64_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
+ppc64_sysv_abi_push_dummy_call (struct gdbarch *gdbarch,
+ struct value *function,
struct regcache *regcache, CORE_ADDR bp_addr,
int nargs, struct value **args, CORE_ADDR sp,
int struct_return, CORE_ADDR struct_addr)
{
CORE_ADDR func_addr = find_function_addr (function, NULL);
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+ int opencl_abi = ppc_sysv_use_opencl_abi (value_type (function));
ULONGEST back_chain;
/* See for-loop comment below. */
int write_pass;
- /* Size of the Altivec's vector parameter region, the final value is
+ /* Size of the by-reference parameter copy region, the final value is
computed in the for-loop below. */
- LONGEST vparam_size = 0;
+ LONGEST refparam_size = 0;
/* Size of the general parameter region, the final value is computed
in the for-loop below. */
LONGEST gparam_size = 0;
/* Kevin writes ... I don't mind seeing tdep->wordsize used in the
- calls to align_up(), align_down(), etc. because this makes it
+ calls to align_up(), align_down(), etc. because this makes it
easier to reuse this code (in a copy/paste sense) in the future,
but it is a 64-bit ABI and asserting that the wordsize is 8 bytes
at some point makes it easier to verify that this function is
/* Next available vector register for vector arguments. */
int vreg = 2;
/* The address, at which the next general purpose parameter
- (integer, struct, float, ...) should be saved. */
+ (integer, struct, float, vector, ...) should be saved. */
CORE_ADDR gparam;
- /* Address, at which the next Altivec vector parameter should be
- saved. */
- CORE_ADDR vparam;
+ /* The address, at which the next by-reference parameter
+ (non-Altivec vector, variably-sized type) should be saved. */
+ CORE_ADDR refparam;
if (!write_pass)
{
- /* During the first pass, GPARAM and VPARAM are more like
+ /* During the first pass, GPARAM and REFPARAM are more like
offsets (start address zero) than addresses. That way
- the accumulate the total stack space each region
+ they accumulate the total stack space each region
requires. */
gparam = 0;
- vparam = 0;
+ refparam = 0;
}
else
{
/* Decrement the stack pointer making space for the Altivec
- and general on-stack parameters. Set vparam and gparam
+ and general on-stack parameters. Set refparam and gparam
to their corresponding regions. */
- vparam = align_down (sp - vparam_size, 16);
- gparam = align_down (vparam - gparam_size, 16);
+ refparam = align_down (sp - refparam_size, 16);
+ gparam = align_down (refparam - gparam_size, 16);
/* Add in space for the TOC, link editor double word,
compiler double word, LR save area, CR save area. */
sp = align_down (gparam - 48, 16);
struct value *arg = args[argno];
struct type *type = check_typedef (value_type (arg));
const bfd_byte *val = value_contents (arg);
+
if (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) <= 8)
{
- /* Floats and Doubles go in f1 .. f13. They also
- consume a left aligned GREG,, and can end up in
- memory. */
if (write_pass)
+ ppc64_sysv_abi_push_float (gdbarch, regcache, tdep, type,
+ val, freg, greg, gparam);
+
+ freg++;
+ greg++;
+ /* Always consume parameter stack space. */
+ gparam = align_up (gparam + 8, tdep->wordsize);
+ }
+ else if (TYPE_CODE (type) == TYPE_CODE_FLT
+ && TYPE_LENGTH (type) == 16
+ && (gdbarch_long_double_format (gdbarch)
+ == floatformats_ibm_long_double))
+ {
+ if (write_pass)
+ ppc64_sysv_abi_push_float (gdbarch, regcache, tdep, type,
+ val, freg, greg, gparam);
+ freg += 2;
+ greg += 2;
+ gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
+ }
+ else if (TYPE_CODE (type) == TYPE_CODE_COMPLEX
+ && (TYPE_LENGTH (type) == 8 || TYPE_LENGTH (type) == 16))
+ {
+ int i;
+
+ for (i = 0; i < 2; i++)
{
- if (freg <= 13)
+ if (write_pass)
{
- gdb_byte regval[MAX_REGISTER_SIZE];
- struct type *regtype
- = register_type (gdbarch, tdep->ppc_fp0_regnum);
- convert_typed_floating (val, type, regval, regtype);
- regcache_cooked_write (regcache,
- tdep->ppc_fp0_regnum + freg,
- regval);
+ struct type *target_type;
+
+ target_type = check_typedef (TYPE_TARGET_TYPE (type));
+ ppc64_sysv_abi_push_float (gdbarch, regcache, tdep,
+ target_type, val + i *
+ TYPE_LENGTH (target_type),
+ freg, greg, gparam);
}
- if (greg <= 10)
+ freg++;
+ greg++;
+ /* Always consume parameter stack space. */
+ gparam = align_up (gparam + 8, tdep->wordsize);
+ }
+ }
+ else if (TYPE_CODE (type) == TYPE_CODE_COMPLEX
+ && TYPE_LENGTH (type) == 32
+ && (gdbarch_long_double_format (gdbarch)
+ == floatformats_ibm_long_double))
+ {
+ int i;
+
+ for (i = 0; i < 2; i++)
+ {
+ struct type *target_type;
+
+ target_type = check_typedef (TYPE_TARGET_TYPE (type));
+ if (write_pass)
+ ppc64_sysv_abi_push_float (gdbarch, regcache, tdep,
+ target_type, val + i *
+ TYPE_LENGTH (target_type),
+ freg, greg, gparam);
+ freg += 2;
+ greg += 2;
+ gparam = align_up (gparam + TYPE_LENGTH (target_type),
+ tdep->wordsize);
+ }
+ }
+ else if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT
+ && TYPE_LENGTH (type) <= 8)
+ {
+ /* 32-bit and 64-bit decimal floats go in f1 .. f13. They can
+ end up in memory. */
+ if (write_pass)
+ {
+ gdb_byte regval[MAX_REGISTER_SIZE];
+ const gdb_byte *p;
+
+ /* 32-bit decimal floats are right aligned in the
+ doubleword. */
+ if (TYPE_LENGTH (type) == 4)
{
- /* The ABI states "Single precision floating
- point values are mapped to the first word in
- a single doubleword" and "... floating point
- values mapped to the first eight doublewords
- of the parameter save area are also passed in
- general registers").
-
- This code interprets that to mean: store it,
- left aligned, in the general register. */
- gdb_byte regval[MAX_REGISTER_SIZE];
- memset (regval, 0, sizeof regval);
- memcpy (regval, val, TYPE_LENGTH (type));
- regcache_cooked_write (regcache,
- tdep->ppc_gp0_regnum + greg,
- regval);
+ memcpy (regval + 4, val, 4);
+ p = regval;
}
- write_memory (gparam, val, TYPE_LENGTH (type));
+ else
+ p = val;
+
+ /* Write value in the stack's parameter save area. */
+ write_memory (gparam, p, 8);
+
+ if (freg <= 13)
+ regcache_cooked_write (regcache,
+ tdep->ppc_fp0_regnum + freg, p);
}
- /* Always consume parameter stack space. */
+
freg++;
greg++;
- gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
+ /* Always consume parameter stack space. */
+ gparam = align_up (gparam + 8, tdep->wordsize);
}
- else if (TYPE_CODE (type) == TYPE_CODE_FLT
- && TYPE_LENGTH (type) == 16
- && (gdbarch_long_double_format (gdbarch)
- == floatformats_ibm_long_double))
+ else if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT &&
+ TYPE_LENGTH (type) == 16)
{
- /* IBM long double stored in two doublewords of the
- parameter save area and corresponding registers. */
+ /* 128-bit decimal floats go in f2 .. f12, always in even/odd
+ pairs. They can end up in memory, using two doublewords. */
if (write_pass)
{
- if (!tdep->soft_float && freg <= 13)
+ if (freg <= 12)
{
+ /* Make sure freg is even. */
+ freg += freg & 1;
regcache_cooked_write (regcache,
- tdep->ppc_fp0_regnum + freg,
- val);
- if (freg <= 12)
- regcache_cooked_write (regcache,
- tdep->ppc_fp0_regnum + freg + 1,
- val + 8);
- }
- if (greg <= 10)
- {
+ tdep->ppc_fp0_regnum + freg, val);
regcache_cooked_write (regcache,
- tdep->ppc_gp0_regnum + greg,
- val);
- if (greg <= 9)
- regcache_cooked_write (regcache,
- tdep->ppc_gp0_regnum + greg + 1,
- val + 8);
+ tdep->ppc_fp0_regnum + freg + 1, val + 8);
}
+
write_memory (gparam, val, TYPE_LENGTH (type));
}
+
freg += 2;
greg += 2;
gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
}
- else if (TYPE_LENGTH (type) == 16 && TYPE_VECTOR (type)
+ else if (TYPE_LENGTH (type) < 16
&& TYPE_CODE (type) == TYPE_CODE_ARRAY
- && tdep->ppc_vr0_regnum >= 0)
+ && TYPE_VECTOR (type)
+ && opencl_abi)
{
- /* In the Altivec ABI, vectors go in the vector
- registers v2 .. v13, or when that runs out, a vector
- annex which goes above all the normal parameters.
- NOTE: cagney/2003-09-21: This is a guess based on the
- PowerOpen Altivec ABI. */
- if (vreg <= 13)
+ /* OpenCL vectors shorter than 16 bytes are passed as if
+ a series of independent scalars. */
+ struct type *eltype = check_typedef (TYPE_TARGET_TYPE (type));
+ int i, nelt = TYPE_LENGTH (type) / TYPE_LENGTH (eltype);
+
+ for (i = 0; i < nelt; i++)
+ {
+ const gdb_byte *elval = val + i * TYPE_LENGTH (eltype);
+
+ if (TYPE_CODE (eltype) == TYPE_CODE_FLT)
+ {
+ if (write_pass)
+ {
+ gdb_byte regval[MAX_REGISTER_SIZE];
+ const gdb_byte *p;
+
+ if (TYPE_LENGTH (eltype) == 4)
+ {
+ memcpy (regval, elval, 4);
+ memcpy (regval + 4, elval, 4);
+ p = regval;
+ }
+ else
+ p = elval;
+
+ write_memory (gparam, p, 8);
+
+ if (freg <= 13)
+ {
+ int regnum = tdep->ppc_fp0_regnum + freg;
+ struct type *regtype
+ = register_type (gdbarch, regnum);
+
+ convert_typed_floating (elval, eltype,
+ regval, regtype);
+ regcache_cooked_write (regcache, regnum, regval);
+ }
+
+ if (greg <= 10)
+ regcache_cooked_write (regcache,
+ tdep->ppc_gp0_regnum + greg,
+ regval);
+ }
+
+ freg++;
+ greg++;
+ gparam = align_up (gparam + 8, tdep->wordsize);
+ }
+ else
+ {
+ if (write_pass)
+ {
+ ULONGEST word = unpack_long (eltype, elval);
+ if (greg <= 10)
+ regcache_cooked_write_unsigned
+ (regcache, tdep->ppc_gp0_regnum + greg, word);
+
+ write_memory_unsigned_integer
+ (gparam, tdep->wordsize, byte_order, word);
+ }
+
+ greg++;
+ gparam = align_up (gparam + TYPE_LENGTH (eltype),
+ tdep->wordsize);
+ }
+ }
+ }
+ else if (TYPE_LENGTH (type) >= 16
+ && TYPE_CODE (type) == TYPE_CODE_ARRAY
+ && TYPE_VECTOR (type)
+ && opencl_abi)
+ {
+ /* OpenCL vectors 16 bytes or longer are passed as if
+ a series of AltiVec vectors. */
+ int i;
+
+ for (i = 0; i < TYPE_LENGTH (type) / 16; i++)
{
+ const gdb_byte *elval = val + i * 16;
+
+ gparam = align_up (gparam, 16);
+ greg += greg & 1;
+
if (write_pass)
+ {
+ if (vreg <= 13)
+ regcache_cooked_write (regcache,
+ tdep->ppc_vr0_regnum + vreg,
+ elval);
+
+ write_memory (gparam, elval, 16);
+ }
+
+ greg += 2;
+ vreg++;
+ gparam += 16;
+ }
+ }
+ else if (TYPE_LENGTH (type) == 16 && TYPE_VECTOR (type)
+ && TYPE_CODE (type) == TYPE_CODE_ARRAY
+ && tdep->vector_abi == POWERPC_VEC_ALTIVEC)
+ {
+ /* In the Altivec ABI, vectors go in the vector registers
+ v2 .. v13, as well as the parameter area -- always at
+ 16-byte aligned addresses. */
+
+ gparam = align_up (gparam, 16);
+ greg += greg & 1;
+
+ if (write_pass)
+ {
+ if (vreg <= 13)
regcache_cooked_write (regcache,
tdep->ppc_vr0_regnum + vreg, val);
- vreg++;
+
+ write_memory (gparam, val, TYPE_LENGTH (type));
}
- else
+
+ greg += 2;
+ vreg++;
+ gparam += 16;
+ }
+ else if (TYPE_LENGTH (type) >= 16 && TYPE_VECTOR (type)
+ && TYPE_CODE (type) == TYPE_CODE_ARRAY)
+ {
+ /* Non-Altivec vectors are passed by reference. */
+
+ /* Copy value onto the stack ... */
+ refparam = align_up (refparam, 16);
+ if (write_pass)
+ write_memory (refparam, val, TYPE_LENGTH (type));
+
+ /* ... and pass a pointer to the copy as parameter. */
+ if (write_pass)
{
- if (write_pass)
- write_memory (vparam, val, TYPE_LENGTH (type));
- vparam = align_up (vparam + TYPE_LENGTH (type), 16);
+ if (greg <= 10)
+ regcache_cooked_write_unsigned (regcache,
+ tdep->ppc_gp0_regnum +
+ greg, refparam);
+ write_memory_unsigned_integer (gparam, tdep->wordsize,
+ byte_order, refparam);
}
+ greg++;
+ gparam = align_up (gparam + tdep->wordsize, tdep->wordsize);
+ refparam = align_up (refparam + TYPE_LENGTH (type), tdep->wordsize);
}
else if ((TYPE_CODE (type) == TYPE_CODE_INT
|| TYPE_CODE (type) == TYPE_CODE_ENUM
- || TYPE_CODE (type) == TYPE_CODE_PTR)
+ || TYPE_CODE (type) == TYPE_CODE_BOOL
+ || TYPE_CODE (type) == TYPE_CODE_CHAR
+ || TYPE_CODE (type) == TYPE_CODE_PTR
+ || TYPE_CODE (type) == TYPE_CODE_REF)
&& TYPE_LENGTH (type) <= 8)
{
/* Scalars and Pointers get sign[un]extended and go in
/* Convert any function code addresses into
descriptors. */
if (TYPE_CODE (type) == TYPE_CODE_PTR
- && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)
+ || TYPE_CODE (type) == TYPE_CODE_REF)
{
- CORE_ADDR desc = word;
- convert_code_addr_to_desc_addr (word, &desc);
- word = desc;
+ struct type *target_type;
+ target_type = check_typedef (TYPE_TARGET_TYPE (type));
+
+ if (TYPE_CODE (target_type) == TYPE_CODE_FUNC
+ || TYPE_CODE (target_type) == TYPE_CODE_METHOD)
+ {
+ CORE_ADDR desc = word;
+ convert_code_addr_to_desc_addr (word, &desc);
+ word = desc;
+ }
}
if (greg <= 10)
regcache_cooked_write_unsigned (regcache,
tdep->ppc_gp0_regnum +
greg, word);
write_memory_unsigned_integer (gparam, tdep->wordsize,
- word);
+ byte_order, word);
}
greg++;
gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
greg++;
}
if (write_pass)
- /* WARNING: cagney/2003-09-21: Strictly speaking, this
- isn't necessary, unfortunately, GCC appears to get
- "struct convention" parameter passing wrong putting
- odd sized structures in memory instead of in a
- register. Work around this by always writing the
- value to memory. Fortunately, doing this
- simplifies the code. */
- write_memory (gparam, val, TYPE_LENGTH (type));
+ {
+ /* WARNING: cagney/2003-09-21: Strictly speaking, this
+ isn't necessary, unfortunately, GCC appears to get
+ "struct convention" parameter passing wrong putting
+ odd sized structures in memory instead of in a
+ register. Work around this by always writing the
+ value to memory. Fortunately, doing this
+ simplifies the code. */
+ int len = TYPE_LENGTH (type);
+ if (len < tdep->wordsize)
+ write_memory (gparam + tdep->wordsize - len, val, len);
+ else
+ write_memory (gparam, val, len);
+ }
if (freg <= 13
&& TYPE_CODE (type) == TYPE_CODE_STRUCT
&& TYPE_NFIELDS (type) == 1
if (!write_pass)
{
/* Save the true region sizes ready for the second pass. */
- vparam_size = vparam;
+ refparam_size = refparam;
/* Make certain that the general parameter save area is at
least the minimum 8 registers (or doublewords) in size. */
if (greg < 8)
regcache_cooked_write_signed (regcache, gdbarch_sp_regnum (gdbarch), sp);
/* Write the backchain (it occupies WORDSIZED bytes). */
- write_memory_signed_integer (sp, tdep->wordsize, back_chain);
+ write_memory_signed_integer (sp, tdep->wordsize, byte_order, back_chain);
/* Point the inferior function call's return address at the dummy's
breakpoint. */
regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
/* Use the func_addr to find the descriptor, and use that to find
- the TOC. */
+ the TOC. If we're calling via a function pointer, the pointer
+ itself identifies the descriptor. */
{
- CORE_ADDR desc_addr;
- if (convert_code_addr_to_desc_addr (func_addr, &desc_addr))
+ struct type *ftype = check_typedef (value_type (function));
+ CORE_ADDR desc_addr = value_as_address (function);
+
+ if (TYPE_CODE (ftype) == TYPE_CODE_PTR
+ || convert_code_addr_to_desc_addr (func_addr, &desc_addr))
{
/* The TOC is the second double word in the descriptor. */
CORE_ADDR toc =
read_memory_unsigned_integer (desc_addr + tdep->wordsize,
- tdep->wordsize);
+ tdep->wordsize, byte_order);
regcache_cooked_write_unsigned (regcache,
tdep->ppc_gp0_regnum + 2, toc);
}
location; when READBUF is non-NULL, fill the buffer from the
corresponding register return-value location. */
enum return_value_convention
-ppc64_sysv_abi_return_value (struct gdbarch *gdbarch, struct type *valtype,
- struct regcache *regcache, gdb_byte *readbuf,
- const gdb_byte *writebuf)
+ppc64_sysv_abi_return_value (struct gdbarch *gdbarch, struct value *function,
+ struct type *valtype, struct regcache *regcache,
+ gdb_byte *readbuf, const gdb_byte *writebuf)
{
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+ struct type *func_type = function ? value_type (function) : NULL;
+ int opencl_abi = func_type? ppc_sysv_use_opencl_abi (func_type) : 0;
/* This function exists to support a calling convention that
requires floating-point registers. It shouldn't be used on
}
return RETURN_VALUE_REGISTER_CONVENTION;
}
+ if (TYPE_CODE (valtype) == TYPE_CODE_DECFLOAT)
+ return get_decimal_float_return_value (gdbarch, valtype, regcache, readbuf,
+ writebuf);
/* Integers in r3. */
if ((TYPE_CODE (valtype) == TYPE_CODE_INT
- || TYPE_CODE (valtype) == TYPE_CODE_ENUM)
+ || TYPE_CODE (valtype) == TYPE_CODE_ENUM
+ || TYPE_CODE (valtype) == TYPE_CODE_CHAR
+ || TYPE_CODE (valtype) == TYPE_CODE_BOOL)
&& TYPE_LENGTH (valtype) <= 8)
{
if (writebuf != NULL)
ULONGEST regval;
regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
®val);
- store_unsigned_integer (readbuf, TYPE_LENGTH (valtype), regval);
+ store_unsigned_integer (readbuf, TYPE_LENGTH (valtype), byte_order,
+ regval);
}
return RETURN_VALUE_REGISTER_CONVENTION;
}
/* All pointers live in r3. */
- if (TYPE_CODE (valtype) == TYPE_CODE_PTR)
+ if (TYPE_CODE (valtype) == TYPE_CODE_PTR
+ || TYPE_CODE (valtype) == TYPE_CODE_REF)
{
/* All pointers live in r3. */
if (writebuf != NULL)
regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, readbuf);
return RETURN_VALUE_REGISTER_CONVENTION;
}
+ /* OpenCL vectors < 16 bytes are returned as distinct
+ scalars in f1..f2 or r3..r10. */
+ if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY
+ && TYPE_VECTOR (valtype)
+ && TYPE_LENGTH (valtype) < 16
+ && opencl_abi)
+ {
+ struct type *eltype = check_typedef (TYPE_TARGET_TYPE (valtype));
+ int i, nelt = TYPE_LENGTH (valtype) / TYPE_LENGTH (eltype);
+
+ for (i = 0; i < nelt; i++)
+ {
+ int offset = i * TYPE_LENGTH (eltype);
+
+ if (TYPE_CODE (eltype) == TYPE_CODE_FLT)
+ {
+ int regnum = tdep->ppc_fp0_regnum + 1 + i;
+ gdb_byte regval[MAX_REGISTER_SIZE];
+ struct type *regtype = register_type (gdbarch, regnum);
+
+ if (writebuf != NULL)
+ {
+ convert_typed_floating (writebuf + offset, eltype,
+ regval, regtype);
+ regcache_cooked_write (regcache, regnum, regval);
+ }
+ if (readbuf != NULL)
+ {
+ regcache_cooked_read (regcache, regnum, regval);
+ convert_typed_floating (regval, regtype,
+ readbuf + offset, eltype);
+ }
+ }
+ else
+ {
+ int regnum = tdep->ppc_gp0_regnum + 3 + i;
+ ULONGEST regval;
+
+ if (writebuf != NULL)
+ {
+ regval = unpack_long (eltype, writebuf + offset);
+ regcache_cooked_write_unsigned (regcache, regnum, regval);
+ }
+ if (readbuf != NULL)
+ {
+ regcache_cooked_read_unsigned (regcache, regnum, ®val);
+ store_unsigned_integer (readbuf + offset,
+ TYPE_LENGTH (eltype), byte_order,
+ regval);
+ }
+ }
+ }
+
+ return RETURN_VALUE_REGISTER_CONVENTION;
+ }
+ /* OpenCL vectors >= 16 bytes are returned in v2..v9. */
+ if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY
+ && TYPE_VECTOR (valtype)
+ && TYPE_LENGTH (valtype) >= 16
+ && opencl_abi)
+ {
+ int n_regs = TYPE_LENGTH (valtype) / 16;
+ int i;
+
+ for (i = 0; i < n_regs; i++)
+ {
+ int offset = i * 16;
+ int regnum = tdep->ppc_vr0_regnum + 2 + i;
+
+ if (writebuf != NULL)
+ regcache_cooked_write (regcache, regnum, writebuf + offset);
+ if (readbuf != NULL)
+ regcache_cooked_read (regcache, regnum, readbuf + offset);
+ }
+
+ return RETURN_VALUE_REGISTER_CONVENTION;
+ }
/* Array type has more than one use. */
if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY)
{
}
/* A VMX vector is returned in v2. */
if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY
- && TYPE_VECTOR (valtype) && tdep->ppc_vr0_regnum >= 0)
+ && TYPE_VECTOR (valtype)
+ && tdep->vector_abi == POWERPC_VEC_ALTIVEC)
{
if (readbuf)
regcache_cooked_read (regcache, tdep->ppc_vr0_regnum + 2, readbuf);
if (writebuf)
- regcache_cooked_write (regcache, tdep->ppc_vr0_regnum + 2, writebuf);
+ regcache_cooked_write (regcache, tdep->ppc_vr0_regnum + 2,
+ writebuf);
return RETURN_VALUE_REGISTER_CONVENTION;
}
}
gdb_byte regval[MAX_REGISTER_SIZE];
struct type *regtype =
register_type (gdbarch, tdep->ppc_fp0_regnum);
+ struct type *target_type;
+ target_type = check_typedef (TYPE_TARGET_TYPE (valtype));
if (writebuf != NULL)
{
convert_typed_floating ((const bfd_byte *) writebuf +
- i * (TYPE_LENGTH (valtype) / 2),
- valtype, regval, regtype);
+ i * TYPE_LENGTH (target_type),
+ target_type, regval, regtype);
regcache_cooked_write (regcache,
tdep->ppc_fp0_regnum + 1 + i,
regval);
regval);
convert_typed_floating (regval, regtype,
(bfd_byte *) readbuf +
- i * (TYPE_LENGTH (valtype) / 2),
- valtype);
+ i * TYPE_LENGTH (target_type),
+ target_type);
}
}
}
return RETURN_VALUE_STRUCT_CONVENTION;
}
-CORE_ADDR
-ppc64_sysv_abi_adjust_breakpoint_address (struct gdbarch *gdbarch,
- CORE_ADDR bpaddr)
-{
- /* PPC64 SYSV specifies that the minimal-symbol "FN" should point at
- a function-descriptor while the corresponding minimal-symbol
- ".FN" should point at the entry point. Consequently, a command
- like "break FN" applied to an object file with only minimal
- symbols, will insert the breakpoint into the descriptor at "FN"
- and not the function at ".FN". Avoid this confusion by adjusting
- any attempt to set a descriptor breakpoint into a corresponding
- function breakpoint. Note that GDB warns the user when this
- adjustment is applied - that's ok as otherwise the user will have
- no way of knowing why their breakpoint at "FN" resulted in the
- program stopping at ".FN". */
- return gdbarch_convert_from_func_ptr_addr (gdbarch, bpaddr, ¤t_target);
-}
projects / deliverable / binutils-gdb.git / blobdiff