* configure.host: Add x86_64-*-freebsd*.

[deliverable/binutils-gdb.git] / gdb / remote-mips.c

diff --git a/gdb/remote-mips.c b/gdb/remote-mips.c
index a23f72d4606629f59f970fc002142113808e5cda..96f39728f5414228f1129ec097dfb7900bb190e2 100644 (file)
--- a/gdb/remote-mips.c
+++ b/gdb/remote-mips.c
@@ -536,7 +536,7 @@ fputs_readable (const char *string, struct ui_file *file)
    timed out.  TIMEOUT specifies timeout value in seconds.
  */
 
-int
+static int
 mips_expect_timeout (const char *string, int timeout)
 {
   const char *p = string;
@@ -592,7 +592,7 @@ mips_expect_timeout (const char *string, int timeout)
    mips_expect_timeout if a different timeout value is needed.
  */
 
-int
+static int
 mips_expect (const char *string)
 {
   return mips_expect_timeout (string, remote_timeout);
@@ -600,7 +600,7 @@ mips_expect (const char *string)
 
 /* Read the required number of characters into the given buffer (which
    is assumed to be large enough). The only failure is a timeout. */
-int
+static int
 mips_getstring (char *string, int n)
 {
   char *p = string;
@@ -1721,7 +1721,7 @@ mips_resume (ptid_t ptid, int step, enum target_signal siggnal)
 
 /* Return the signal corresponding to SIG, where SIG is the number which
    the MIPS protocol uses for the signal.  */
-enum target_signal
+static enum target_signal
 mips_signal_from_protocol (int sig)
 {
   /* We allow a few more signals than the IDT board actually returns, on
@@ -1791,7 +1791,7 @@ mips_wait (ptid_t ptid, struct target_waitstatus *status)
                    &rpc, &rfp, &rsp, flags);
   if (nfields >= 3)
     {
-      char *buf = alloca (max_register_size (current_gdbarch));
+      char buf[MAX_REGISTER_SIZE];
 
       store_unsigned_integer (buf, REGISTER_RAW_SIZE (PC_REGNUM), rpc);
       supply_register (PC_REGNUM, buf);
@@ -1802,8 +1802,8 @@ mips_wait (ptid_t ptid, struct target_waitstatus *status)
       store_unsigned_integer (buf, REGISTER_RAW_SIZE (SP_REGNUM), rsp);
       supply_register (SP_REGNUM, buf);
 
-      store_unsigned_integer (buf, REGISTER_RAW_SIZE (FP_REGNUM), 0);
-      supply_register (FP_REGNUM, buf);
+      store_unsigned_integer (buf, REGISTER_RAW_SIZE (DEPRECATED_FP_REGNUM), 0);
+      supply_register (DEPRECATED_FP_REGNUM, buf);
 
       if (nfields == 9)
        {
@@ -1943,9 +1943,9 @@ mips_fetch_registers (int regno)
       return;
     }
 
-  if (regno == FP_REGNUM || regno == ZERO_REGNUM)
-    /* FP_REGNUM on the mips is a hack which is just supposed to read
-       zero (see also mips-nat.c).  */
+  if (regno == DEPRECATED_FP_REGNUM || regno == ZERO_REGNUM)
+    /* DEPRECATED_FP_REGNUM on the mips is a hack which is just
+       supposed to read zero (see also mips-nat.c).  */
     val = 0;
   else
     {
@@ -1972,7 +1972,7 @@ mips_fetch_registers (int regno)
     }
 
   {
-    char *buf = alloca (max_register_size (current_gdbarch));
+    char buf[MAX_REGISTER_SIZE];
 
     /* We got the number the register holds, but gdb expects to see a
        value in the target byte ordering.  */
@@ -2251,13 +2251,13 @@ mips_mourn_inferior (void)
 /* We can write a breakpoint and read the shadow contents in one
    operation.  */
 
-/* Insert a breakpoint.  On targets that don't have built-in breakpoint
-   support, we read the contents of the target location and stash it,
-   then overwrite it with a breakpoint instruction.  ADDR is the target
-   location in the target machine.  CONTENTS_CACHE is a pointer to 
-   memory allocated for saving the target contents.  It is guaranteed
-   by the caller to be long enough to save sizeof BREAKPOINT bytes (this
-   is accomplished via BREAKPOINT_MAX).  */
+/* Insert a breakpoint.  On targets that don't have built-in
+   breakpoint support, we read the contents of the target location and
+   stash it, then overwrite it with a breakpoint instruction.  ADDR is
+   the target location in the target machine.  CONTENTS_CACHE is a
+   pointer to memory allocated for saving the target contents.  It is
+   guaranteed by the caller to be long enough to save the breakpoint
+   length returned by BREAKPOINT_FROM_PC.  */
 
 static int
 mips_insert_breakpoint (CORE_ADDR addr, char *contents_cache)
@@ -2437,7 +2437,7 @@ calculate_mask (CORE_ADDR addr, int len)
 /* Insert a hardware breakpoint.  This works only on LSI targets, which
    implement ordinary breakpoints using hardware facilities.  */
 
-int
+static int
 remote_mips_insert_hw_breakpoint (CORE_ADDR addr, char *contents_cache)
 {
   if (strcmp (target_shortname, "lsi") == 0)
@@ -2450,7 +2450,7 @@ remote_mips_insert_hw_breakpoint (CORE_ADDR addr, char *contents_cache)
 /* Remove a hardware breakpoint.  This works only on LSI targets, which
    implement ordinary breakpoints using hardware facilities.  */
 
-int
+static int
 remote_mips_remove_hw_breakpoint (CORE_ADDR addr, char *contents_cache)
 {
   if (strcmp (target_shortname, "lsi") == 0)
@@ -3477,6 +3477,8 @@ pmon_command (char *args, int from_tty)
   printf_filtered ("Received packet: %s\n", buf);
 }
 \f
+extern initialize_file_ftype _initialize_remote_mips; /* -Wmissing-prototypes */
+
 void
 _initialize_remote_mips (void)
 {