{
/* For moment treat a `does not exist' register the same way
as an ``unavailable'' register. */
- char *buf = alloca (MAX_REGISTER_RAW_SIZE);
+ char buf[MAX_REGISTER_SIZE];
int nr_bytes;
- memset (buf, 0, MAX_REGISTER_RAW_SIZE);
+ memset (buf, 0, MAX_REGISTER_SIZE);
supply_register (regno, buf);
set_register_cached (regno, -1);
break;
default:
{
static int warn_user = 1;
- char *buf = alloca (MAX_REGISTER_RAW_SIZE);
+ char buf[MAX_REGISTER_SIZE];
int nr_bytes;
gdb_assert (regno >= 0 && regno < NUM_REGS);
- memset (buf, 0, MAX_REGISTER_RAW_SIZE);
+ memset (buf, 0, MAX_REGISTER_SIZE);
nr_bytes = sim_fetch_register (gdbsim_desc,
REGISTER_SIM_REGNO (regno),
buf, REGISTER_RAW_SIZE (regno));
warn_user = 0;
}
/* FIXME: cagney/2002-05-27: Should check `nr_bytes == 0'
- indicatingthat GDB and the SIM have different ideas about
+ indicating that GDB and the SIM have different ideas about
which registers are fetchable. */
/* Else if (nr_bytes < 0): an old simulator, that doesn't
think to return the register size. Just assume all is ok. */
}
else if (REGISTER_SIM_REGNO (regno) >= 0)
{
- char tmp[MAX_REGISTER_RAW_SIZE];
+ char tmp[MAX_REGISTER_SIZE];
int nr_bytes;
deprecated_read_register_gen (regno, tmp);
nr_bytes = sim_store_register (gdbsim_desc,
internal_error (__FILE__, __LINE__,
"Register size different to expected");
/* FIXME: cagney/2002-05-27: Should check `nr_bytes == 0'
- indicatingthat GDB and the SIM have different ideas about
+ indicating that GDB and the SIM have different ideas about
which registers are fetchable. */
if (sr_get_debug ())
{
static int
gdbsim_insert_breakpoint (CORE_ADDR addr, char *contents_cache)
{
-#ifdef SIM_HAS_BREAKPOINTS
- SIM_RC retcode;
-
- retcode = sim_set_breakpoint (gdbsim_desc, addr);
-
- switch (retcode)
- {
- case SIM_RC_OK:
- return 0;
- case SIM_RC_INSUFFICIENT_RESOURCES:
- return ENOMEM;
- default:
- return EIO;
- }
-#else
return memory_insert_breakpoint (addr, contents_cache);
-#endif
}
static int
gdbsim_remove_breakpoint (CORE_ADDR addr, char *contents_cache)
{
-#ifdef SIM_HAS_BREAKPOINTS
- SIM_RC retcode;
-
- retcode = sim_clear_breakpoint (gdbsim_desc, addr);
-
- switch (retcode)
- {
- case SIM_RC_OK:
- case SIM_RC_UNKNOWN_BREAKPOINT:
- return 0;
- case SIM_RC_INSUFFICIENT_RESOURCES:
- return ENOMEM;
- default:
- return EIO;
- }
-#else
return memory_remove_breakpoint (addr, contents_cache);
-#endif
}
/* Pass the command argument through to the simulator verbatim. The