static void
gdbsim_fetch_register (regno)
-int regno;
+ int regno;
{
+ static int warn_user = 1;
if (regno == -1)
{
for (regno = 0; regno < NUM_REGS; regno++)
gdbsim_fetch_register (regno);
}
- else
+ else if (reg_names[regno] != NULL && *reg_names[regno] != '\0')
{
char buf[MAX_REGISTER_RAW_SIZE];
-
- sim_fetch_register (gdbsim_desc, regno, buf);
+ int nr_bytes = sim_fetch_register (gdbsim_desc, regno, buf, REGISTER_RAW_SIZE (regno));
+ if (nr_bytes == 0)
+ /* register not applicable, supply zero's */
+ memset (buf, 0, MAX_REGISTER_RAW_SIZE);
+ else if (nr_bytes > 0 && nr_bytes != REGISTER_RAW_SIZE (regno)
+ && warn_user)
+ {
+ printf_unfiltered ("Size of register %s (%d) incorrect (%d instead of %d))",
+ reg_names [regno], regno,
+ nr_bytes, REGISTER_RAW_SIZE (regno));
+ warn_user = 0;
+ }
supply_register (regno, buf);
if (sr_get_debug ())
{
static void
gdbsim_store_register (regno)
-int regno;
+ int regno;
{
if (regno == -1)
{
for (regno = 0; regno < NUM_REGS; regno++)
gdbsim_store_register (regno);
}
- else
+ else if (reg_names[regno] != NULL && *reg_names[regno] != '\0')
{
- /* FIXME: Until read_register() returns LONGEST, we have this. */
char tmp[MAX_REGISTER_RAW_SIZE];
+ int nr_bytes;
read_register_gen (regno, tmp);
- sim_store_register (gdbsim_desc, regno, tmp);
+ nr_bytes = sim_store_register (gdbsim_desc, regno, tmp, REGISTER_RAW_SIZE (regno));
+ if (nr_bytes > 0 && nr_bytes != REGISTER_RAW_SIZE (regno))
+ fatal ("Register size different to expected");
if (sr_get_debug ())
{
printf_filtered ("gdbsim_store_register: %d", regno);
inferior_pid = 42;
insert_breakpoints (); /* Needed to get correct instruction in cache */
+ clear_proceed_status ();
+
/* NB: Entry point already set by sim_create_inferior. */
proceed ((CORE_ADDR)-1, TARGET_SIGNAL_DEFAULT, 0);
}
if (gdbsim_desc != NULL)
unpush_target (&gdbsim_ops);
- len = 7 + 1 + (args ? strlen (args) : 0) + 50;
+ len = (7 + 1 /* gdbsim */
+ + strlen (" -E little")
+ + strlen (" --architecture=xxxxxxxxxx")
+ + (args ? strlen (args) : 0)
+ + 50) /* slack */;
arg_buf = (char *) alloca (len);
- sprintf (arg_buf, "gdbsim%s%s",
- args ? " " : "", args ? args : "");
+ strcpy (arg_buf, "gdbsim"); /* 7 */
+ /* Specify the byte order for the target when it is both selectable
+ and explicitly specified by the user (not auto detected). */
#ifdef TARGET_BYTE_ORDER_SELECTABLE
- /* Since GDB always closes the target and updates byte-order when
- opening a new file, TARGET_BYTE_ORDER is normally correct. */
- if (TARGET_BYTE_ORDER == BIG_ENDIAN)
- strcat (arg_buf, " -E big");
- else
- strcat (arg_buf, " -E little");
+ if (!target_byte_order_auto)
+ {
+ switch (TARGET_BYTE_ORDER)
+ {
+ case BIG_ENDIAN:
+ strcat (arg_buf, " -E big");
+ break;
+ case LITTLE_ENDIAN:
+ strcat (arg_buf, " -E little");
+ break;
+ default:
+ fatal ("Value of TARGET_BYTE_ORDER unknown");
+ }
+ }
#endif
+ /* Specify the architecture of the target when it has been
+ explicitly specified */
+ if (!target_architecture_auto)
+ {
+ strcat (arg_buf, " --architecture=");
+ strcat (arg_buf, target_architecture->printable_name);
+ }
+ /* finally, any explicit args */
+ if (args)
+ {
+ strcat (arg_buf, " "); /* 1 */
+ strcat (arg_buf, args);
+ }
argv = buildargv (arg_buf);
if (argv == NULL)
error ("Insufficient memory available to allocate simulator arg list.");
just as `wait' would. */
static void
-gdbsim_cntrl_c (int signo)
+gdbsim_cntrl_c (signo)
+ int signo;
{
gdbsim_stop ();
}
if (sr_get_debug ())
printf_filtered ("gdbsim_wait\n");
+#if defined (HAVE_SIGACTION) && defined (SA_RESTART)
+ {
+ struct sigaction sa, osa;
+ sa.sa_handler = gdbsim_cntrl_c;
+ sigemptyset (&sa.sa_mask);
+ sa.sa_flags = 0;
+ sigaction (SIGINT, &sa, &osa);
+ prev_sigint = osa.sa_handler;
+ }
+#else
prev_sigint = signal (SIGINT, gdbsim_cntrl_c);
+#endif
sim_resume (gdbsim_desc, resume_step,
target_signal_to_host (resume_siggnal));
signal (SIGINT, prev_sigint);
generic_mourn_inferior ();
}
+static int
+gdbsim_insert_breakpoint (addr, contents_cache)
+ CORE_ADDR addr;
+ char *contents_cache;
+{
+#ifdef SIM_HAS_BREAKPOINTS
+ SIM_RC retcode;
+
+ retcode = sim_set_breakpoint (gdbsim_desc, addr);
+
+ switch (retcode)
+ {
+ case SIM_RC_OK:
+ return 0;
+ case SIM_RC_INSUFFICIENT_RESOURCES:
+ return ENOMEM;
+ default:
+ return EIO;
+ }
+#else
+ return memory_insert_breakpoint (addr, contents_cache);
+#endif
+}
+
+static int
+gdbsim_remove_breakpoint (addr, contents_cache)
+ CORE_ADDR addr;
+ char *contents_cache;
+{
+#ifdef SIM_HAS_BREAKPOINTS
+ SIM_RC retcode;
+
+ retcode = sim_clear_breakpoint (gdbsim_desc, addr);
+
+ switch (retcode)
+ {
+ case SIM_RC_OK:
+ case SIM_RC_UNKNOWN_BREAKPOINT:
+ return 0;
+ case SIM_RC_INSUFFICIENT_RESOURCES:
+ return ENOMEM;
+ default:
+ return EIO;
+ }
+#else
+ return memory_remove_breakpoint (addr, contents_cache);
+#endif
+}
+
/* Pass the command argument through to the simulator verbatim. The
simulator must do any command interpretation work. */
gdbsim_prepare_to_store, /* to_prepare_to_store */
gdbsim_xfer_inferior_memory, /* to_xfer_memory */
gdbsim_files_info, /* to_files_info */
- memory_insert_breakpoint, /* to_insert_breakpoint */
- memory_remove_breakpoint, /* to_remove_breakpoint */
+ gdbsim_insert_breakpoint, /* to_insert_breakpoint */
+ gdbsim_remove_breakpoint, /* to_remove_breakpoint */
NULL, /* to_terminal_init */
NULL, /* to_terminal_inferior */
NULL, /* to_terminal_ours_for_output */
projects / deliverable / binutils-gdb.git / blobdiff