/* Target-dependent code for the Renesas RL78 for GDB, the GNU debugger.
- Copyright (C) 2011-2016 Free Software Foundation, Inc.
+ Copyright (C) 2011-2021 Free Software Foundation, Inc.
Contributed by Red Hat, Inc.
#include "frame-base.h"
#include "value.h"
#include "gdbcore.h"
-#include "dwarf2-frame.h"
+#include "dwarf2/frame.h"
#include "reggroups.h"
#include "elf/rl78.h"
int elf_flags;
struct type *rl78_void,
- *rl78_uint8,
+ *rl78_uint8,
*rl78_int8,
*rl78_uint16,
*rl78_int16,
if (tdep->rl78_psw_type == NULL)
{
tdep->rl78_psw_type = arch_flags_type (gdbarch,
- "builtin_type_rl78_psw", 1);
+ "builtin_type_rl78_psw", 8);
append_flags_type_flag (tdep->rl78_psw_type, 0, "CY");
append_flags_type_flag (tdep->rl78_psw_type, 1, "ISP0");
append_flags_type_flag (tdep->rl78_psw_type, 2, "ISP1");
else if (reg_nr == RL78_PSW_REGNUM)
return rl78_psw_type (gdbarch);
else if (reg_nr <= RL78_MEM_REGNUM
- || (RL78_X_REGNUM <= reg_nr && reg_nr <= RL78_H_REGNUM)
+ || (RL78_X_REGNUM <= reg_nr && reg_nr <= RL78_H_REGNUM)
|| (RL78_BANK0_R0_REGNUM <= reg_nr
&& reg_nr <= RL78_BANK3_R7_REGNUM))
return tdep->rl78_int8;
else if (reg_nr == RL78_SP_REGNUM
- || (RL78_BANK0_RP0_PTR_REGNUM <= reg_nr
+ || (RL78_BANK0_RP0_PTR_REGNUM <= reg_nr
&& reg_nr <= RL78_BANK3_RP3_PTR_REGNUM))
return tdep->rl78_data_pointer;
else
static enum register_status
rl78_pseudo_register_read (struct gdbarch *gdbarch,
- struct regcache *regcache,
- int reg, gdb_byte *buffer)
+ readable_regcache *regcache,
+ int reg, gdb_byte *buffer)
{
enum register_status status;
if (RL78_BANK0_R0_REGNUM <= reg && reg <= RL78_BANK3_R7_REGNUM)
{
int raw_regnum = RL78_RAW_BANK0_R0_REGNUM
- + (reg - RL78_BANK0_R0_REGNUM);
+ + (reg - RL78_BANK0_R0_REGNUM);
- status = regcache_raw_read (regcache, raw_regnum, buffer);
+ status = regcache->raw_read (raw_regnum, buffer);
}
else if (RL78_BANK0_RP0_REGNUM <= reg && reg <= RL78_BANK3_RP3_REGNUM)
{
int raw_regnum = 2 * (reg - RL78_BANK0_RP0_REGNUM)
- + RL78_RAW_BANK0_R0_REGNUM;
+ + RL78_RAW_BANK0_R0_REGNUM;
- status = regcache_raw_read (regcache, raw_regnum, buffer);
+ status = regcache->raw_read (raw_regnum, buffer);
if (status == REG_VALID)
- status = regcache_raw_read (regcache, raw_regnum + 1, buffer + 1);
+ status = regcache->raw_read (raw_regnum + 1, buffer + 1);
}
else if (RL78_BANK0_RP0_PTR_REGNUM <= reg && reg <= RL78_BANK3_RP3_PTR_REGNUM)
{
int raw_regnum = 2 * (reg - RL78_BANK0_RP0_PTR_REGNUM)
- + RL78_RAW_BANK0_R0_REGNUM;
+ + RL78_RAW_BANK0_R0_REGNUM;
- status = regcache_raw_read (regcache, raw_regnum, buffer);
+ status = regcache->raw_read (raw_regnum, buffer);
if (status == REG_VALID)
- status = regcache_raw_read (regcache, raw_regnum + 1, buffer + 1);
+ status = regcache->raw_read (raw_regnum + 1, buffer + 1);
}
else if (reg == RL78_SP_REGNUM)
{
- status = regcache_raw_read (regcache, RL78_SPL_REGNUM, buffer);
+ status = regcache->raw_read (RL78_SPL_REGNUM, buffer);
if (status == REG_VALID)
- status = regcache_raw_read (regcache, RL78_SPH_REGNUM, buffer + 1);
+ status = regcache->raw_read (RL78_SPH_REGNUM, buffer + 1);
}
else if (reg == RL78_PC_REGNUM)
{
gdb_byte rawbuf[4];
- status = regcache_raw_read (regcache, RL78_RAW_PC_REGNUM, rawbuf);
+ status = regcache->raw_read (RL78_RAW_PC_REGNUM, rawbuf);
memcpy (buffer, rawbuf, 3);
}
else if (RL78_X_REGNUM <= reg && reg <= RL78_H_REGNUM)
{
ULONGEST psw;
- status = regcache_raw_read_unsigned (regcache, RL78_PSW_REGNUM, &psw);
+ status = regcache->raw_read (RL78_PSW_REGNUM, &psw);
if (status == REG_VALID)
{
/* RSB0 is at bit 3; RSBS1 is at bit 5. */
int bank = ((psw >> 3) & 1) | ((psw >> 4) & 1);
int raw_regnum = RL78_RAW_BANK0_R0_REGNUM + bank * RL78_REGS_PER_BANK
- + (reg - RL78_X_REGNUM);
- status = regcache_raw_read (regcache, raw_regnum, buffer);
+ + (reg - RL78_X_REGNUM);
+ status = regcache->raw_read (raw_regnum, buffer);
}
}
else if (RL78_AX_REGNUM <= reg && reg <= RL78_HL_REGNUM)
{
ULONGEST psw;
- status = regcache_raw_read_unsigned (regcache, RL78_PSW_REGNUM, &psw);
+ status = regcache->raw_read (RL78_PSW_REGNUM, &psw);
if (status == REG_VALID)
{
/* RSB0 is at bit 3; RSBS1 is at bit 5. */
int bank = ((psw >> 3) & 1) | ((psw >> 4) & 1);
int raw_regnum = RL78_RAW_BANK0_R0_REGNUM + bank * RL78_REGS_PER_BANK
- + 2 * (reg - RL78_AX_REGNUM);
- status = regcache_raw_read (regcache, raw_regnum, buffer);
+ + 2 * (reg - RL78_AX_REGNUM);
+ status = regcache->raw_read (raw_regnum, buffer);
if (status == REG_VALID)
- status = regcache_raw_read (regcache, raw_regnum + 1,
- buffer + 1);
+ status = regcache->raw_read (raw_regnum + 1, buffer + 1);
}
}
else
static void
rl78_pseudo_register_write (struct gdbarch *gdbarch,
- struct regcache *regcache,
- int reg, const gdb_byte *buffer)
+ struct regcache *regcache,
+ int reg, const gdb_byte *buffer)
{
if (RL78_BANK0_R0_REGNUM <= reg && reg <= RL78_BANK3_R7_REGNUM)
{
int raw_regnum = RL78_RAW_BANK0_R0_REGNUM
- + (reg - RL78_BANK0_R0_REGNUM);
+ + (reg - RL78_BANK0_R0_REGNUM);
- regcache_raw_write (regcache, raw_regnum, buffer);
+ regcache->raw_write (raw_regnum, buffer);
}
else if (RL78_BANK0_RP0_REGNUM <= reg && reg <= RL78_BANK3_RP3_REGNUM)
{
int raw_regnum = 2 * (reg - RL78_BANK0_RP0_REGNUM)
- + RL78_RAW_BANK0_R0_REGNUM;
+ + RL78_RAW_BANK0_R0_REGNUM;
- regcache_raw_write (regcache, raw_regnum, buffer);
- regcache_raw_write (regcache, raw_regnum + 1, buffer + 1);
+ regcache->raw_write (raw_regnum, buffer);
+ regcache->raw_write (raw_regnum + 1, buffer + 1);
}
else if (RL78_BANK0_RP0_PTR_REGNUM <= reg && reg <= RL78_BANK3_RP3_PTR_REGNUM)
{
int raw_regnum = 2 * (reg - RL78_BANK0_RP0_PTR_REGNUM)
- + RL78_RAW_BANK0_R0_REGNUM;
+ + RL78_RAW_BANK0_R0_REGNUM;
- regcache_raw_write (regcache, raw_regnum, buffer);
- regcache_raw_write (regcache, raw_regnum + 1, buffer + 1);
+ regcache->raw_write (raw_regnum, buffer);
+ regcache->raw_write (raw_regnum + 1, buffer + 1);
}
else if (reg == RL78_SP_REGNUM)
{
- regcache_raw_write (regcache, RL78_SPL_REGNUM, buffer);
- regcache_raw_write (regcache, RL78_SPH_REGNUM, buffer + 1);
+ regcache->raw_write (RL78_SPL_REGNUM, buffer);
+ regcache->raw_write (RL78_SPH_REGNUM, buffer + 1);
}
else if (reg == RL78_PC_REGNUM)
{
memcpy (rawbuf, buffer, 3);
rawbuf[3] = 0;
- regcache_raw_write (regcache, RL78_RAW_PC_REGNUM, rawbuf);
+ regcache->raw_write (RL78_RAW_PC_REGNUM, rawbuf);
}
else if (RL78_X_REGNUM <= reg && reg <= RL78_H_REGNUM)
{
bank = ((psw >> 3) & 1) | ((psw >> 4) & 1);
/* RSB0 is at bit 3; RSBS1 is at bit 5. */
raw_regnum = RL78_RAW_BANK0_R0_REGNUM + bank * RL78_REGS_PER_BANK
- + (reg - RL78_X_REGNUM);
- regcache_raw_write (regcache, raw_regnum, buffer);
+ + (reg - RL78_X_REGNUM);
+ regcache->raw_write (raw_regnum, buffer);
}
else if (RL78_AX_REGNUM <= reg && reg <= RL78_HL_REGNUM)
{
/* RSB0 is at bit 3; RSBS1 is at bit 5. */
raw_regnum = RL78_RAW_BANK0_R0_REGNUM + bank * RL78_REGS_PER_BANK
+ 2 * (reg - RL78_AX_REGNUM);
- regcache_raw_write (regcache, raw_regnum, buffer);
- regcache_raw_write (regcache, raw_regnum + 1, buffer + 1);
+ regcache->raw_write (raw_regnum, buffer);
+ regcache->raw_write (raw_regnum + 1, buffer + 1);
}
else
gdb_assert_not_reached ("invalid pseudo register number");
switch (opcreg)
{
case RL78_Reg_X:
- return RL78_X_REGNUM;
+ return RL78_X_REGNUM;
case RL78_Reg_A:
return RL78_A_REGNUM;
case RL78_Reg_C:
}
/* Function for finding saved registers in a 'struct pv_area'; this
- function is passed to pv_area_scan.
+ function is passed to pv_area::scan.
If VALUE is a saved register, ADDR says it was saved at a constant
offset from the frame base, and SIZE indicates that the whole
static void
check_for_saved (void *result_untyped, pv_t addr, CORE_ADDR size,
- pv_t value)
+ pv_t value)
{
struct rl78_prologue *result = (struct rl78_prologue *) result_untyped;
CORE_ADDR pc, next_pc;
int rn;
pv_t reg[RL78_NUM_TOTAL_REGS];
- struct pv_area *stack;
- struct cleanup *back_to;
CORE_ADDR after_last_frame_setup_insn = start_pc;
int bank = 0;
result->reg_offset[rn] = 1;
}
- stack = make_pv_area (RL78_SP_REGNUM, gdbarch_addr_bit (target_gdbarch ()));
- back_to = make_cleanup_free_pv_area (stack);
+ pv_area stack (RL78_SP_REGNUM, gdbarch_addr_bit (target_gdbarch ()));
/* The call instruction has saved the return address on the stack. */
reg[RL78_SP_REGNUM] = pv_add_constant (reg[RL78_SP_REGNUM], -4);
- pv_area_store (stack, reg[RL78_SP_REGNUM], 4, reg[RL78_PC_REGNUM]);
+ stack.store (reg[RL78_SP_REGNUM], 4, reg[RL78_PC_REGNUM]);
pc = start_pc;
while (pc < limit_pc)
bank = opc.op[1].addend;
}
else if (opc.id == RLO_mov
- && opc.op[0].type == RL78_Operand_PreDec
- && opc.op[0].reg == RL78_Reg_SP
+ && opc.op[0].type == RL78_Operand_PreDec
+ && opc.op[0].reg == RL78_Reg_SP
&& opc.op[1].type == RL78_Operand_Register)
{
int rsrc = (bank * RL78_REGS_PER_BANK)
- + 2 * (opc.op[1].reg - RL78_Reg_AX);
+ + 2 * (opc.op[1].reg - RL78_Reg_AX);
reg[RL78_SP_REGNUM] = pv_add_constant (reg[RL78_SP_REGNUM], -1);
- pv_area_store (stack, reg[RL78_SP_REGNUM], 1, reg[rsrc]);
+ stack.store (reg[RL78_SP_REGNUM], 1, reg[rsrc]);
reg[RL78_SP_REGNUM] = pv_add_constant (reg[RL78_SP_REGNUM], -1);
- pv_area_store (stack, reg[RL78_SP_REGNUM], 1, reg[rsrc + 1]);
+ stack.store (reg[RL78_SP_REGNUM], 1, reg[rsrc + 1]);
after_last_frame_setup_insn = next_pc;
}
else if (opc.id == RLO_sub
- && opc.op[0].type == RL78_Operand_Register
+ && opc.op[0].type == RL78_Operand_Register
&& opc.op[0].reg == RL78_Reg_SP
&& opc.op[1].type == RL78_Operand_Immediate)
{
int addend = opc.op[1].addend;
reg[RL78_SP_REGNUM] = pv_add_constant (reg[RL78_SP_REGNUM],
- -addend);
+ -addend);
after_last_frame_setup_insn = next_pc;
}
else if (opc.id == RLO_mov
- && opc.size == RL78_Word
+ && opc.size == RL78_Word
&& opc.op[0].type == RL78_Operand_Register
&& opc.op[1].type == RL78_Operand_Indirect
&& opc.op[1].addend == RL78_SP_ADDR)
= reg[RL78_SP_REGNUM];
}
else if (opc.id == RLO_sub
- && opc.size == RL78_Word
+ && opc.size == RL78_Word
&& opc.op[0].type == RL78_Operand_Register
&& opc.op[1].type == RL78_Operand_Immediate)
{
reg[regnum] = pv_add_constant (reg[regnum], -addend);
}
else if (opc.id == RLO_mov
- && opc.size == RL78_Word
+ && opc.size == RL78_Word
&& opc.op[0].type == RL78_Operand_Indirect
&& opc.op[0].addend == RL78_SP_ADDR
&& opc.op[1].type == RL78_Operand_Register)
result->frame_size = reg[RL78_SP_REGNUM].k;
/* Record where all the registers were saved. */
- pv_area_scan (stack, check_for_saved, (void *) result);
+ stack.scan (check_for_saved, (void *) result);
result->prologue_end = after_last_frame_setup_insn;
-
- do_cleanups (back_to);
}
/* Implement the "addr_bits_remove" gdbarch method. */
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
store_unsigned_integer (buf, TYPE_LENGTH (type), byte_order,
- addr & 0xffffff);
+ addr & 0xffffff);
}
/* Implement the "pointer_to_address" gdbarch method. */
static CORE_ADDR
rl78_pointer_to_address (struct gdbarch *gdbarch,
- struct type *type, const gdb_byte *buf)
+ struct type *type, const gdb_byte *buf)
{
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
CORE_ADDR addr
= extract_unsigned_integer (buf, TYPE_LENGTH (type), byte_order);
/* Is it a code address? */
- if (TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC
- || TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_METHOD
+ if (TYPE_TARGET_TYPE (type)->code () == TYPE_CODE_FUNC
+ || TYPE_TARGET_TYPE (type)->code () == TYPE_CODE_METHOD
|| TYPE_CODE_SPACE (TYPE_TARGET_TYPE (type))
|| TYPE_LENGTH (type) == 4)
return rl78_make_instruction_address (addr);
rl78_unwind_pc (struct gdbarch *arch, struct frame_info *next_frame)
{
return rl78_addr_bits_remove
- (arch, frame_unwind_register_unsigned (next_frame,
- RL78_PC_REGNUM));
-}
-
-/* Implement the "unwind_sp" gdbarch method. */
-
-static CORE_ADDR
-rl78_unwind_sp (struct gdbarch *arch, struct frame_info *next_frame)
-{
- return frame_unwind_register_unsigned (next_frame, RL78_SP_REGNUM);
+ (arch, frame_unwind_register_unsigned (next_frame,
+ RL78_PC_REGNUM));
}
/* Given a frame described by THIS_FRAME, decode the prologue of its
stop_addr = get_frame_pc (this_frame);
/* If we couldn't find any function containing the PC, then
- just initialize the prologue cache, but don't do anything. */
+ just initialize the prologue cache, but don't do anything. */
if (!func_start)
stop_addr = func_start;
void **this_prologue_cache, struct frame_id *this_id)
{
*this_id = frame_id_build (rl78_frame_base (this_frame,
- this_prologue_cache),
+ this_prologue_cache),
get_frame_func (this_frame));
}
static struct value *
rl78_prev_register (struct frame_info *this_frame,
- void **this_prologue_cache, int regnum)
+ void **this_prologue_cache, int regnum)
{
struct rl78_prologue *p
= rl78_analyze_frame_prologue (this_frame, this_prologue_cache);
else if (regnum == RL78_SPL_REGNUM)
return frame_unwind_got_constant (this_frame, regnum,
- (frame_base & 0xff));
+ (frame_base & 0xff));
else if (regnum == RL78_SPH_REGNUM)
return frame_unwind_got_constant (this_frame, regnum,
- ((frame_base >> 8) & 0xff));
+ ((frame_base >> 8) & 0xff));
/* If prologue analysis says we saved this register somewhere,
return a description of the stack slot holding it. */
else if (p->reg_offset[regnum] != 1)
{
struct value *rv =
- frame_unwind_got_memory (this_frame, regnum,
+ frame_unwind_got_memory (this_frame, regnum,
frame_base + p->reg_offset[regnum]);
if (regnum == RL78_PC_REGNUM)
static const struct frame_unwind rl78_unwind =
{
+ "rl78 prologue",
NORMAL_FRAME,
default_frame_unwind_stop_reason,
rl78_this_id,
if (0 <= reg && reg <= 31)
{
if ((reg & 1) == 0)
- /* Map even registers to their 16-bit counterparts which have a
+ /* Map even registers to their 16-bit counterparts which have a
pointer type. This is usually what is required from the DWARF
info. */
return (reg >> 1) + RL78_BANK0_RP0_PTR_REGNUM;
{
if (is_g10)
u = read_memory_integer (g10_raddr, 1,
- gdbarch_byte_order (gdbarch));
+ gdbarch_byte_order (gdbarch));
else
regcache_cooked_read_unsigned (regcache, argreg, &u);
store_unsigned_integer (readbuf + offset, 1, byte_order, u);
{
return
frame_id_build (rl78_make_data_address
- (get_frame_register_unsigned
- (this_frame, RL78_SP_REGNUM)),
+ (get_frame_register_unsigned
+ (this_frame, RL78_SP_REGNUM)),
get_frame_pc (this_frame));
}
rl78_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
struct regcache *regcache, CORE_ADDR bp_addr,
int nargs, struct value **args, CORE_ADDR sp,
- int struct_return, CORE_ADDR struct_addr)
+ function_call_return_method return_method,
+ CORE_ADDR struct_addr)
{
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
gdb_byte buf[4];
sp -= container_len;
write_memory (rl78_make_data_address (sp),
- value_contents_all (args[i]), len);
+ value_contents_all (args[i]), len);
}
/* Store struct value address. */
- if (struct_return)
+ if (return_method == return_method_struct)
{
store_unsigned_integer (buf, 2, byte_order, struct_addr);
sp -= 2;
/* None found, create a new architecture from the information
provided. */
- tdep = XNEW (struct gdbarch_tdep);
+ tdep = XCNEW (struct gdbarch_tdep);
gdbarch = gdbarch_alloc (&info, tdep);
tdep->elf_flags = elf_flags;
/* Initialize types. */
- tdep->rl78_void = arch_type (gdbarch, TYPE_CODE_VOID, 1, "void");
+ tdep->rl78_void = arch_type (gdbarch, TYPE_CODE_VOID, TARGET_CHAR_BIT,
+ "void");
tdep->rl78_uint8 = arch_integer_type (gdbarch, 8, 1, "uint8_t");
tdep->rl78_int8 = arch_integer_type (gdbarch, 8, 0, "int8_t");
tdep->rl78_uint16 = arch_integer_type (gdbarch, 16, 1, "uint16_t");
set_gdbarch_sw_breakpoint_from_kind (gdbarch, rl78_breakpoint::bp_from_kind);
set_gdbarch_decr_pc_after_break (gdbarch, 1);
- /* Disassembly. */
- set_gdbarch_print_insn (gdbarch, print_insn_rl78);
-
/* Frames, prologues, etc. */
set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
set_gdbarch_skip_prologue (gdbarch, rl78_skip_prologue);
set_gdbarch_unwind_pc (gdbarch, rl78_unwind_pc);
- set_gdbarch_unwind_sp (gdbarch, rl78_unwind_sp);
set_gdbarch_frame_align (gdbarch, rl78_frame_align);
dwarf2_append_unwinders (gdbarch);
return gdbarch;
}
-/* -Wmissing-prototypes */
-extern initialize_file_ftype _initialize_rl78_tdep;
-
/* Register the above initialization routine. */
+void _initialize_rl78_tdep ();
void
-_initialize_rl78_tdep (void)
+_initialize_rl78_tdep ()
{
register_gdbarch_init (bfd_arch_rl78, rl78_gdbarch_init);
}
projects / deliverable / binutils-gdb.git / blobdiff