#include "dis-asm.h"
#include "../opcodes/sh-opc.h"
+
+
/* Prologue looks like
[mov.l <regs>,@-r15]...
[sts.l pr,@-r15]
while (IS_STS (w)
|| IS_PUSH (w)
|| IS_MOV_SP_FP (w)
- || IS_MOV_R3(w)
- || IS_ADD_R3SP(w)
- || IS_ADD_SP(w)
- || IS_SHLL_R3(w))
+ || IS_MOV_R3 (w)
+ || IS_ADD_R3SP (w)
+ || IS_ADD_SP (w)
+ || IS_SHLL_R3 (w))
{
start_pc += 2;
w = read_memory_integer (start_pc, 2);
return start_pc;
}
-/* Disassemble an instruction */
+/* Disassemble an instruction. */
int
-print_insn (memaddr, stream)
- CORE_ADDR memaddr;
- GDB_FILE *stream;
+gdb_print_insn_sh (memaddr, info)
+ bfd_vma memaddr;
+ disassemble_info *info;
{
- disassemble_info info;
-
- GDB_INIT_DISASSEMBLE_INFO (info, stream);
-
- return print_insn_sh (memaddr, &info);
+ if (TARGET_BYTE_ORDER == BIG_ENDIAN)
+ return print_insn_sh (memaddr, info);
+ else
+ return print_insn_shl (memaddr, info);
}
/* Given a GDB frame, determine the address of the calling function's frame.
}
else if (IS_MOV_R3 (insn))
{
- r3_val = (char)(insn & 0xff);
- pc+=2;
+ r3_val = (char) (insn & 0xff);
+ pc += 2;
insn = read_memory_integer (pc, 2);
}
else if (IS_SHLL_R3 (insn))
{
- r3_val <<=1;
- pc+=2;
+ r3_val <<= 1;
+ pc += 2;
insn = read_memory_integer (pc, 2);
}
else if (IS_ADD_R3SP (insn))
{
depth += -r3_val;
- pc+=2;
+ pc += 2;
insn = read_memory_integer (pc, 2);
}
else if (IS_ADD_SP (insn))
{
fi->return_pc = read_register (PR_REGNUM) + 4;
}
- else {
-
- if (fsr->regs[PR_REGNUM])
- {
- fi->return_pc = read_memory_integer (fsr->regs[PR_REGNUM], 4) + 4;
- }
- else
- {
- fi->return_pc = read_register (PR_REGNUM) + 4;
- }
- }
+ else
+ {
+
+ if (fsr->regs[PR_REGNUM])
+ {
+ fi->return_pc = read_memory_integer (fsr->regs[PR_REGNUM], 4) + 4;
+ }
+ else
+ {
+ fi->return_pc = read_register (PR_REGNUM) + 4;
+ }
+ }
}
/* initialize the extra info saved in a FRAME */
}
}
- write_register (PC_REGNUM, fi->return_pc);
+ write_register (PC_REGNUM, frame->return_pc);
write_register (SP_REGNUM, fp + 4);
flush_cached_frames ();
}
char *args;
int from_tty;
{
- printf_filtered("PC=%08x SR=%08x PR=%08x MACH=%08x MACHL=%08x\n",
- read_register(PC_REGNUM),
- read_register(SR_REGNUM),
- read_register(PR_REGNUM),
- read_register(MACH_REGNUM),
- read_register(MACL_REGNUM));
-
- printf_filtered("R0-R7 %08x %08x %08x %08x %08x %08x %08x %08x\n",
- read_register(0),
- read_register(1),
- read_register(2),
- read_register(3),
- read_register(4),
- read_register(5),
- read_register(6),
- read_register(7));
- printf_filtered("R8-R15 %08x %08x %08x %08x %08x %08x %08x %08x\n",
- read_register(8),
- read_register(9),
- read_register(10),
- read_register(11),
- read_register(12),
- read_register(13),
- read_register(14),
- read_register(15));
+ printf_filtered ("PC=%08x SR=%08x PR=%08x MACH=%08x MACHL=%08x\n",
+ read_register (PC_REGNUM),
+ read_register (SR_REGNUM),
+ read_register (PR_REGNUM),
+ read_register (MACH_REGNUM),
+ read_register (MACL_REGNUM));
+
+ printf_filtered ("R0-R7 %08x %08x %08x %08x %08x %08x %08x %08x\n",
+ read_register (0),
+ read_register (1),
+ read_register (2),
+ read_register (3),
+ read_register (4),
+ read_register (5),
+ read_register (6),
+ read_register (7));
+ printf_filtered ("R8-R15 %08x %08x %08x %08x %08x %08x %08x %08x\n",
+ read_register (8),
+ read_register (9),
+ read_register (10),
+ read_register (11),
+ read_register (12),
+ read_register (13),
+ read_register (14),
+ read_register (15));
}
\f
_initialize_sh_tdep ()
{
extern int sim_memory_size;
+
+ tm_print_insn = gdb_print_insn_sh;
+
/* FIXME, there should be a way to make a CORE_ADDR variable settable. */
add_show_from_set
(add_set_cmd ("memory_size", class_support, var_uinteger,
"Set simulated memory size of simulator target.", &setlist),
&showlist);
- add_com("regs", class_vars, show_regs, "Print all registers");
+ add_com ("regs", class_vars, show_regs, "Print all registers");
}