* test-build.mk (HOLES): Add "xargs" for gdb.

[deliverable/binutils-gdb.git] / gdb / sh3-rom.c

diff --git a/gdb/sh3-rom.c b/gdb/sh3-rom.c
index 6279c9a96dfa1a5b6ba90b39db6c1a5ffc7a8cc3..7b2718a1b715a4d2ee7e977ebc06329cb93ec51e 100644 (file)
--- a/gdb/sh3-rom.c
+++ b/gdb/sh3-rom.c
@@ -70,14 +70,12 @@ sh3_supply_register (regname, regnamelen, val, vallen)
            else
              regno = GBR_REGNUM;
          break;
-#if 0
        case 'S':
          if (regname[1] == 'S' && regname[2] == 'R')
            regno = SSR_REGNUM;
          else if (regname[1] == 'P' && regname[2] == 'C')
            regno = SPC_REGNUM;
          break;
-#endif
        }
     }
   else if (regnamelen == 4)
@@ -108,7 +106,10 @@ sh3_supply_register (regname, regnamelen, val, vallen)
          numregs = 8;
        }
     }
-       
+  else if (regnamelen == 17)
+    {
+    }
+
   if (regno >= 0)
     while (numregs-- > 0)
       val = monitor_supply_register (regno++, val);
@@ -146,33 +147,32 @@ sh3_load (desc, file, hashmark)
    than does GDB, and don't necessarily support all the registers
    either. So, typing "info reg sp" becomes a "r30".  */
 
-
 static char *sh3_regnames[NUM_REGS] = {
   "R0", "R1", "R2",  "R3", "R4",  "R5",   "R6",  "R7",
   "R8", "R9", "R10", "R11","R12", "R13",  "R14", "R15",
   "PC", "PR", "GBR", "VBR","MACH","MACL", "SR",
+  NULL, NULL,
+  NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+  NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
   "SSR", "SPC",
   "R0_BANK0", "R1_BANK0", "R2_BANK0", "R3_BANK0",
   "R4_BANK0", "R5_BANK0", "R6_BANK0", "R7_BANK0",
   "R0_BANK1", "R1_BANK1", "R2_BANK1", "R3_BANK1",
-  "R4_BANK1", "R5_BANK1", "R6_BANK1", "R7_BANK1",
-  NULL, NULL,
-  NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
-  NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL
+  "R4_BANK1", "R5_BANK1", "R6_BANK1", "R7_BANK1"
 };
 
 static char *sh3e_regnames[NUM_REGS] = {
   "R0", "R1", "R2",  "R3", "R4",  "R5",   "R6",  "R7",
   "R8", "R9", "R10", "R11","R12", "R13",  "R14", "R15",
   "PC", "PR", "GBR", "VBR","MACH","MACL", "SR",
+  "FPUL", "FPSCR",
+  "FR0", "FR1", "FR2", "FR3", "FR4", "FR5", "FR6", "FR7",
+  "FR8", "FR9", "FR10", "FR11", "FR12", "FR13", "FR14", "FR15",
   "SSR","SPC",
   "R0_BANK0", "R1_BANK0", "R2_BANK0", "R3_BANK0",
   "R4_BANK0", "R5_BANK0", "R6_BANK0", "R7_BANK0",
   "R0_BANK1", "R1_BANK1", "R2_BANK1", "R3_BANK1",
-  "R4_BANK1", "R5_BANK1", "R6_BANK1", "R7_BANK1",
-  "FPUL", "FPSCR",
-  "FR0", "FR1", "FR2", "FR3", "FR4", "FR5", "FR6", "FR7",
-  "FR8", "FR9", "FR10", "FR11", "FR12", "FR13", "FR14", "FR15"
+  "R4_BANK1", "R5_BANK1", "R6_BANK1", "R7_BANK1"
 };
 
 /* Define the monitor command strings. Since these are passed directly