/* Target-dependent code for Renesas Super-H, for GDB.
- Copyright (C) 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
- 2003, 2004, 2005, 2007, 2008, 2009, 2010, 2011
- Free Software Foundation, Inc.
+ Copyright (C) 1993-2015 Free Software Foundation, Inc.
This file is part of GDB.
#include "value.h"
#include "dis-asm.h"
#include "inferior.h"
-#include "gdb_string.h"
-#include "gdb_assert.h"
#include "arch-utils.h"
#include "regcache.h"
#include "osabi.h"
/* Register numbers shared with the simulator. */
#include "gdb/sim-sh.h"
#include "language.h"
+#include "sh64-tdep.h"
/* Information that is dependent on the processor variant. */
enum sh_abi
if (((elf_symbol_type *)(sym))->internal_elf_sym.st_other == STO_SH5_ISA32)
{
MSYMBOL_TARGET_FLAG_1 (msym) = 1;
- SYMBOL_VALUE_ADDRESS (msym) |= 1;
+ SET_MSYMBOL_VALUE_ADDRESS (msym, MSYMBOL_VALUE_RAW_ADDRESS (msym) | 1);
}
}
static int
pc_is_isa32 (bfd_vma memaddr)
{
- struct minimal_symbol *sym;
+ struct bound_minimal_symbol sym;
/* If bit 0 of the address is set, assume this is a
ISA32 (shmedia) address. */
the high bit of the info field. Use this to decide if the function is
ISA16 or ISA32. */
sym = lookup_minimal_symbol_by_pc (memaddr);
- if (sym)
- return MSYMBOL_IS_SPECIAL (sym);
+ if (sym.minsym)
+ return MSYMBOL_IS_SPECIAL (sym.minsym);
else
return 0;
}
CORE_ADDR func_pc,
CORE_ADDR current_pc)
{
- int reg_nr;
int pc;
int opc;
int insn;
int argnum;
struct type *type;
CORE_ADDR regval;
- char *val;
- char valbuf[8];
- char valbuf_tmp[8];
+ const gdb_byte *val;
+ gdb_byte valbuf[8];
int len;
int argreg_size;
int fp_args[12];
/* value gets right-justified in the register or stack word. */
if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
memcpy (valbuf + argreg_size - len,
- (char *) value_contents (args[argnum]), len);
+ value_contents (args[argnum]), len);
else
- memcpy (valbuf, (char *) value_contents (args[argnum]), len);
+ memcpy (valbuf, value_contents (args[argnum]), len);
val = valbuf;
}
else
- val = (char *) value_contents (args[argnum]);
+ val = value_contents (args[argnum]);
while (len > 0)
{
if (int_argreg > ARGLAST_REGNUM)
{
/* Must go on the stack. */
- write_memory (sp + stack_offset, (const bfd_byte *) val,
- argreg_size);
+ write_memory (sp + stack_offset, val, argreg_size);
stack_offset += 8;/*argreg_size;*/
}
/* NOTE WELL!!!!! This is not an "else if" clause!!!
}
else
{
- val = (char *) value_contents (args[argnum]);
+ val = value_contents (args[argnum]);
if (len == 4)
{
/* Where is it going to be stored? */
int_argreg ++;
}
else
- ;
- /* Store it as the integers, 8 bytes at the time, if
- necessary spilling on the stack. */
-
+ {
+ /* Store it as the integers, 8 bytes at the time, if
+ necessary spilling on the stack. */
+ }
}
else if (len == 8)
{
int_argreg ++;
}
else
- ;
- /* Store it as the integers, 8 bytes at the time, if
- necessary spilling on the stack. */
+ {
+ /* Store it as the integers, 8 bytes at the time, if
+ necessary spilling on the stack. */
+ }
}
}
}
TYPE, and copy that, in virtual format, into VALBUF. */
static void
sh64_extract_return_value (struct type *type, struct regcache *regcache,
- void *valbuf)
+ gdb_byte *valbuf)
{
struct gdbarch *gdbarch = get_regcache_arch (regcache);
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
if (len <= 8)
{
int offset;
- char buf[8];
+ gdb_byte buf[8];
/* Result is in register 2. If smaller than 8 bytes, it is padded
at the most significant end. */
regcache_raw_read (regcache, DEFAULT_RETURN_REGNUM, buf);
static void
sh64_store_return_value (struct type *type, struct regcache *regcache,
- const void *valbuf)
+ const gdb_byte *valbuf)
{
struct gdbarch *gdbarch = get_regcache_arch (regcache);
- char buf[64]; /* more than enough... */
+ gdb_byte buf[64]; /* more than enough... */
int len = TYPE_LENGTH (type);
if (TYPE_CODE (type) == TYPE_CODE_FLT)
for (i = 0; i < len; i += 4)
if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE)
regcache_raw_write (regcache, regnum++,
- (char *) valbuf + len - 4 - i);
+ valbuf + len - 4 - i);
else
- regcache_raw_write (regcache, regnum++, (char *) valbuf + i);
+ regcache_raw_write (regcache, regnum++, valbuf + i);
}
else
{
}
static enum return_value_convention
-sh64_return_value (struct gdbarch *gdbarch, struct type *func_type,
+sh64_return_value (struct gdbarch *gdbarch, struct value *function,
struct type *type, struct regcache *regcache,
gdb_byte *readbuf, const gdb_byte *writebuf)
{
return RETURN_VALUE_REGISTER_CONVENTION;
}
-static void
-sh64_show_media_regs (struct frame_info *frame)
-{
- struct gdbarch *gdbarch = get_frame_arch (frame);
- int i;
-
- printf_filtered
- ("PC=%s SR=%s\n",
- phex (get_frame_register_unsigned (frame,
- gdbarch_pc_regnum (gdbarch)), 8),
- phex (get_frame_register_unsigned (frame, SR_REGNUM), 8));
-
- printf_filtered
- ("SSR=%s SPC=%s\n",
- phex (get_frame_register_unsigned (frame, SSR_REGNUM), 8),
- phex (get_frame_register_unsigned (frame, SPC_REGNUM), 8));
- printf_filtered
- ("FPSCR=%s\n ",
- phex (get_frame_register_unsigned (frame, FPSCR_REGNUM), 8));
-
- for (i = 0; i < 64; i = i + 4)
- printf_filtered
- ("\nR%d-R%d %s %s %s %s\n",
- i, i + 3,
- phex (get_frame_register_unsigned (frame, i + 0), 8),
- phex (get_frame_register_unsigned (frame, i + 1), 8),
- phex (get_frame_register_unsigned (frame, i + 2), 8),
- phex (get_frame_register_unsigned (frame, i + 3), 8));
-
- printf_filtered ("\n");
-
- for (i = 0; i < 64; i = i + 8)
- printf_filtered
- ("FR%d-FR%d %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
- i, i + 7,
- (long) get_frame_register_unsigned
- (frame, gdbarch_fp0_regnum (gdbarch) + i + 0),
- (long) get_frame_register_unsigned
- (frame, gdbarch_fp0_regnum (gdbarch) + i + 1),
- (long) get_frame_register_unsigned
- (frame, gdbarch_fp0_regnum (gdbarch) + i + 2),
- (long) get_frame_register_unsigned
- (frame, gdbarch_fp0_regnum (gdbarch) + i + 3),
- (long) get_frame_register_unsigned
- (frame, gdbarch_fp0_regnum (gdbarch) + i + 4),
- (long) get_frame_register_unsigned
- (frame, gdbarch_fp0_regnum (gdbarch) + i + 5),
- (long) get_frame_register_unsigned
- (frame, gdbarch_fp0_regnum (gdbarch) + i + 6),
- (long) get_frame_register_unsigned
- (frame, gdbarch_fp0_regnum (gdbarch) + i + 7));
-}
-
-static void
-sh64_show_compact_regs (struct frame_info *frame)
-{
- struct gdbarch *gdbarch = get_frame_arch (frame);
- int i;
-
- printf_filtered
- ("PC=%s\n",
- phex (get_frame_register_unsigned (frame, PC_C_REGNUM), 8));
-
- printf_filtered
- ("GBR=%08lx MACH=%08lx MACL=%08lx PR=%08lx T=%08lx\n",
- (long) get_frame_register_unsigned (frame, GBR_C_REGNUM),
- (long) get_frame_register_unsigned (frame, MACH_C_REGNUM),
- (long) get_frame_register_unsigned (frame, MACL_C_REGNUM),
- (long) get_frame_register_unsigned (frame, PR_C_REGNUM),
- (long) get_frame_register_unsigned (frame, T_C_REGNUM));
- printf_filtered
- ("FPSCR=%08lx FPUL=%08lx\n",
- (long) get_frame_register_unsigned (frame, FPSCR_C_REGNUM),
- (long) get_frame_register_unsigned (frame, FPUL_C_REGNUM));
-
- for (i = 0; i < 16; i = i + 4)
- printf_filtered
- ("\nR%d-R%d %08lx %08lx %08lx %08lx\n",
- i, i + 3,
- (long) get_frame_register_unsigned (frame, i + 0),
- (long) get_frame_register_unsigned (frame, i + 1),
- (long) get_frame_register_unsigned (frame, i + 2),
- (long) get_frame_register_unsigned (frame, i + 3));
-
- printf_filtered ("\n");
-
- for (i = 0; i < 16; i = i + 8)
- printf_filtered
- ("FR%d-FR%d %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
- i, i + 7,
- (long) get_frame_register_unsigned
- (frame, gdbarch_fp0_regnum (gdbarch) + i + 0),
- (long) get_frame_register_unsigned
- (frame, gdbarch_fp0_regnum (gdbarch) + i + 1),
- (long) get_frame_register_unsigned
- (frame, gdbarch_fp0_regnum (gdbarch) + i + 2),
- (long) get_frame_register_unsigned
- (frame, gdbarch_fp0_regnum (gdbarch) + i + 3),
- (long) get_frame_register_unsigned
- (frame, gdbarch_fp0_regnum (gdbarch) + i + 4),
- (long) get_frame_register_unsigned
- (frame, gdbarch_fp0_regnum (gdbarch) + i + 5),
- (long) get_frame_register_unsigned
- (frame, gdbarch_fp0_regnum (gdbarch) + i + 6),
- (long) get_frame_register_unsigned
- (frame, gdbarch_fp0_regnum (gdbarch) + i + 7));
-}
-
-/* FIXME!!! This only shows the registers for shmedia, excluding the
- pseudo registers. */
-void
-sh64_show_regs (struct frame_info *frame)
-{
- if (pc_is_isa32 (get_frame_pc (frame)))
- sh64_show_media_regs (frame);
- else
- sh64_show_compact_regs (frame);
-}
-
/* *INDENT-OFF* */
/*
SH MEDIA MODE (ISA 32)
static void
sh64_register_convert_to_virtual (struct gdbarch *gdbarch, int regnum,
- struct type *type, char *from, char *to)
+ struct type *type, gdb_byte *from, gdb_byte *to)
{
if (gdbarch_byte_order (gdbarch) != BFD_ENDIAN_LITTLE)
{
"with non DR register number"));
}
-static void
+/* Concatenate PORTIONS contiguous raw registers starting at
+ BASE_REGNUM into BUFFER. */
+
+static enum register_status
+pseudo_register_read_portions (struct gdbarch *gdbarch,
+ struct regcache *regcache,
+ int portions,
+ int base_regnum, gdb_byte *buffer)
+{
+ int portion;
+
+ for (portion = 0; portion < portions; portion++)
+ {
+ enum register_status status;
+ gdb_byte *b;
+
+ b = buffer + register_size (gdbarch, base_regnum) * portion;
+ status = regcache_raw_read (regcache, base_regnum + portion, b);
+ if (status != REG_VALID)
+ return status;
+ }
+
+ return REG_VALID;
+}
+
+static enum register_status
sh64_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
int reg_nr, gdb_byte *buffer)
{
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
int base_regnum;
- int portion;
int offset = 0;
- char temp_buffer[MAX_REGISTER_SIZE];
+ gdb_byte temp_buffer[MAX_REGISTER_SIZE];
+ enum register_status status;
if (reg_nr >= DR0_REGNUM
&& reg_nr <= DR_LAST_REGNUM)
/* Build the value in the provided buffer. */
/* DR regs are double precision registers obtained by
concatenating 2 single precision floating point registers. */
- for (portion = 0; portion < 2; portion++)
- regcache_raw_read (regcache, base_regnum + portion,
- (temp_buffer
- + register_size (gdbarch, base_regnum) * portion));
-
- /* We must pay attention to the endianness. */
- sh64_register_convert_to_virtual (gdbarch, reg_nr,
- register_type (gdbarch, reg_nr),
- temp_buffer, buffer);
+ status = pseudo_register_read_portions (gdbarch, regcache,
+ 2, base_regnum, temp_buffer);
+ if (status == REG_VALID)
+ {
+ /* We must pay attention to the endianness. */
+ sh64_register_convert_to_virtual (gdbarch, reg_nr,
+ register_type (gdbarch, reg_nr),
+ temp_buffer, buffer);
+ }
+ return status;
}
- else if (reg_nr >= FPP0_REGNUM
+ else if (reg_nr >= FPP0_REGNUM
&& reg_nr <= FPP_LAST_REGNUM)
{
base_regnum = sh64_fpp_reg_base_num (gdbarch, reg_nr);
/* Build the value in the provided buffer. */
/* FPP regs are pairs of single precision registers obtained by
concatenating 2 single precision floating point registers. */
- for (portion = 0; portion < 2; portion++)
- regcache_raw_read (regcache, base_regnum + portion,
- ((char *) buffer
- + register_size (gdbarch, base_regnum) * portion));
+ return pseudo_register_read_portions (gdbarch, regcache,
+ 2, base_regnum, buffer);
}
else if (reg_nr >= FV0_REGNUM
/* Build the value in the provided buffer. */
/* FV regs are vectors of single precision registers obtained by
concatenating 4 single precision floating point registers. */
- for (portion = 0; portion < 4; portion++)
- regcache_raw_read (regcache, base_regnum + portion,
- ((char *) buffer
- + register_size (gdbarch, base_regnum) * portion));
+ return pseudo_register_read_portions (gdbarch, regcache,
+ 4, base_regnum, buffer);
}
/* sh compact pseudo registers. 1-to-1 with a shmedia register. */
base_regnum = sh64_compact_reg_base_num (gdbarch, reg_nr);
/* Build the value in the provided buffer. */
- regcache_raw_read (regcache, base_regnum, temp_buffer);
+ status = regcache_raw_read (regcache, base_regnum, temp_buffer);
+ if (status != REG_VALID)
+ return status;
if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
offset = 4;
memcpy (buffer,
temp_buffer + offset, 4); /* get LOWER 32 bits only???? */
+ return REG_VALID;
}
else if (reg_nr >= FP0_C_REGNUM
/* Build the value in the provided buffer. */
/* Floating point registers map 1-1 to the media fp regs,
they have the same size and endianness. */
- regcache_raw_read (regcache, base_regnum, buffer);
+ return regcache_raw_read (regcache, base_regnum, buffer);
}
else if (reg_nr >= DR0_C_REGNUM
/* DR_C regs are double precision registers obtained by
concatenating 2 single precision floating point registers. */
- for (portion = 0; portion < 2; portion++)
- regcache_raw_read (regcache, base_regnum + portion,
- (temp_buffer
- + register_size (gdbarch, base_regnum) * portion));
-
- /* We must pay attention to the endianness. */
- sh64_register_convert_to_virtual (gdbarch, reg_nr,
- register_type (gdbarch, reg_nr),
- temp_buffer, buffer);
+ status = pseudo_register_read_portions (gdbarch, regcache,
+ 2, base_regnum, temp_buffer);
+ if (status == REG_VALID)
+ {
+ /* We must pay attention to the endianness. */
+ sh64_register_convert_to_virtual (gdbarch, reg_nr,
+ register_type (gdbarch, reg_nr),
+ temp_buffer, buffer);
+ }
+ return status;
}
else if (reg_nr >= FV0_C_REGNUM
/* Build the value in the provided buffer. */
/* FV_C regs are vectors of single precision registers obtained by
concatenating 4 single precision floating point registers. */
- for (portion = 0; portion < 4; portion++)
- regcache_raw_read (regcache, base_regnum + portion,
- ((char *) buffer
- + register_size (gdbarch, base_regnum) * portion));
+ return pseudo_register_read_portions (gdbarch, regcache,
+ 4, base_regnum, buffer);
}
else if (reg_nr == FPSCR_C_REGNUM)
*/
/* *INDENT-ON* */
/* Get FPSCR into a local buffer. */
- regcache_raw_read (regcache, fpscr_base_regnum, temp_buffer);
+ status = regcache_raw_read (regcache, fpscr_base_regnum, temp_buffer);
+ if (status != REG_VALID)
+ return status;
/* Get value as an int. */
fpscr_value = extract_unsigned_integer (temp_buffer, 4, byte_order);
/* Get SR into a local buffer */
- regcache_raw_read (regcache, sr_base_regnum, temp_buffer);
+ status = regcache_raw_read (regcache, sr_base_regnum, temp_buffer);
+ if (status != REG_VALID)
+ return status;
/* Get value as an int. */
sr_value = extract_unsigned_integer (temp_buffer, 4, byte_order);
/* Build the new value. */
/* Store that in out buffer!!! */
store_unsigned_integer (buffer, 4, byte_order, fpscr_c_value);
/* FIXME There is surely an endianness gotcha here. */
+
+ return REG_VALID;
}
else if (reg_nr == FPUL_C_REGNUM)
/* FPUL_C register is floating point register 32,
same size, same endianness. */
- regcache_raw_read (regcache, base_regnum, buffer);
+ return regcache_raw_read (regcache, base_regnum, buffer);
}
+ else
+ gdb_assert_not_reached ("invalid pseudo register number");
}
static void
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
int base_regnum, portion;
int offset;
- char temp_buffer[MAX_REGISTER_SIZE];
+ gdb_byte temp_buffer[MAX_REGISTER_SIZE];
if (reg_nr >= DR0_REGNUM
&& reg_nr <= DR_LAST_REGNUM)
for (portion = 0; portion < 2; portion++)
regcache_raw_write (regcache, base_regnum + portion,
(temp_buffer
- + register_size (gdbarch,
+ + register_size (gdbarch,
base_regnum) * portion));
}
/* Write the real regs for which this one is an alias. */
for (portion = 0; portion < 2; portion++)
regcache_raw_write (regcache, base_regnum + portion,
- ((char *) buffer
- + register_size (gdbarch,
- base_regnum) * portion));
+ (buffer + register_size (gdbarch,
+ base_regnum) * portion));
}
else if (reg_nr >= FV0_REGNUM
/* Write the real regs for which this one is an alias. */
for (portion = 0; portion < 4; portion++)
regcache_raw_write (regcache, base_regnum + portion,
- ((char *) buffer
- + register_size (gdbarch,
- base_regnum) * portion));
+ (buffer + register_size (gdbarch,
+ base_regnum) * portion));
}
/* sh compact general pseudo registers. 1-to-1 with a shmedia
for (portion = 0; portion < 4; portion++)
{
regcache_raw_write (regcache, base_regnum + portion,
- ((char *) buffer
+ (buffer
+ register_size (gdbarch,
base_regnum) * portion));
}
alloca (register_size (gdbarch, gdbarch_fp0_regnum (gdbarch)));
/* Get the data in raw format. */
- if (!frame_register_read (frame, regnum, raw_buffer))
+ if (!deprecated_frame_register_read (frame, regnum, raw_buffer))
error (_("can't read register %d (%s)"),
regnum, gdbarch_register_name (gdbarch, regnum));
fprintf_filtered (file, "%-10.9g", flt);
/* Print the fp register as hex. */
- fprintf_filtered (file, "\t(raw 0x");
- for (j = 0; j < register_size (gdbarch, regnum); j++)
- {
- int idx = gdbarch_byte_order (gdbarch)
- == BFD_ENDIAN_BIG ? j : register_size
- (gdbarch, regnum) - 1 - j;
- fprintf_filtered (file, "%02x", raw_buffer[idx]);
- }
+ fprintf_filtered (file, "\t(raw ");
+ print_hex_chars (file, raw_buffer,
+ register_size (gdbarch, regnum),
+ gdbarch_byte_order (gdbarch));
fprintf_filtered (file, ")");
fprintf_filtered (file, "\n");
}
(gdbarch, regnum)), file);
/* Get the data in raw format. */
- if (!frame_register_read (frame, regnum, raw_buffer))
- fprintf_filtered (file, "*value not available*\n");
+ if (!deprecated_frame_register_read (frame, regnum, raw_buffer))
+ {
+ fprintf_filtered (file, "*value not available*\n");
+ return;
+ }
get_formatted_print_options (&opts, 'x');
opts.deref_ref = 1;
int i;
if (*this_cache)
- return *this_cache;
+ return (struct sh64_frame_cache *) *this_cache;
gdbarch = get_frame_arch (this_frame);
cache = sh64_alloc_frame_cache ();
static const struct frame_unwind sh64_frame_unwind = {
NORMAL_FRAME,
+ default_frame_unwind_stop_reason,
sh64_frame_this_id,
sh64_frame_prev_register,
NULL,
/* None found, create a new architecture from the information
provided. */
- tdep = XMALLOC (struct gdbarch_tdep);
+ tdep = XNEW (struct gdbarch_tdep);
gdbarch = gdbarch_alloc (&info, tdep);
/* Determine the ABI */
projects / deliverable / binutils-gdb.git / blobdiff