One more time...

[deliverable/binutils-gdb.git] / gdb / sparc-pinsn.c

diff --git a/gdb/sparc-pinsn.c b/gdb/sparc-pinsn.c
index e303393d939ae94cb7987c8bb95406b14534e061..0922ef9a31629aa62062303cc513c6eb7fd001e9 100644 (file)
--- a/gdb/sparc-pinsn.c
+++ b/gdb/sparc-pinsn.c
@@ -17,8 +17,6 @@ You should have received a copy of the GNU General Public License
 along with this program; if not, write to the Free Software
 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.  */
 
-#include <stdio.h>
-
 #include "defs.h"
 #include "symtab.h"
 #include "opcode/sparc.h"
@@ -26,8 +24,6 @@ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.  */
 #include "string.h"
 #include "target.h"
 
-#define SORT_NEEDED
-
 extern char *reg_names[];
 #define        freg_names      (&reg_names[4 * 8])
 
@@ -91,12 +87,16 @@ is_delayed_branch (insn)
   return 0;
 }
 
-#ifdef SORT_NEEDED
 static int opcodes_sorted = 0;
 extern void qsort ();
-#endif
 
-/* Print one instruction from MEMADDR on STREAM.  */
+/* Print one instruction from MEMADDR on STREAM.
+
+   We suffix the instruction with a comment that gives the absolute
+   address involved, as well as its symbolic form, if the instruction
+   is preceded by a findable `sethi' and it either adds an immediate
+   displacement to that register, or it is an `add' or `or' instruction
+   on that register.  */
 int
 print_insn (memaddr, stream)
      CORE_ADDR memaddr;
@@ -106,7 +106,6 @@ print_insn (memaddr, stream)
 
   register unsigned int i;
 
-#ifdef SORT_NEEDED
   if (!opcodes_sorted)
     {
       static int compare_opcodes ();
@@ -114,9 +113,8 @@ print_insn (memaddr, stream)
             sizeof (sparc_opcodes[0]), compare_opcodes);
       opcodes_sorted = 1;
     }
-#endif
 
-  read_memory (memaddr, &insn, sizeof (insn));
+  read_memory (memaddr, (char *) &insn, sizeof (insn));
 
   for (i = 0; i < NUMOPCODES; ++i)
     {
@@ -132,9 +130,10 @@ print_insn (memaddr, stream)
             field of the opcode table.  */
          int found_plus = 0;
          
-         /* Do we have an 'or' instruction where rs1 is the same
+         /* Do we have an `add' or `or' instruction where rs1 is the same
             as rsd, and which has the i bit set?  */
-         if (opcode->match == 0x80102000
+         if ((opcode->match == 0x80102000 || opcode->match == 0x80002000)
+         /*                      (or)                           (add)  */
              && insn.rs1 == insn.rd)
            imm_added_to_rs1 = 1;
 
@@ -370,7 +369,6 @@ print_insn (memaddr, stream)
   return sizeof (insn);
 }
 
-#ifdef SORT_NEEDED
 /* Compare opcodes A and B.  */
 
 static int
@@ -438,19 +436,12 @@ compare_opcodes (a, b)
      better have the same opcode.  This is a sanity check on the table.  */
   i = strcmp (op0->name, op1->name);
   if (i)
-    {
-      /* *** FIXME - There must be a better way to deal with this! */
-      /* We prefer names used in the earliest architecture */
-      if (op0->architecture != op1->architecture)
-       return op0->architecture - op1->architecture;
-
       if (op0->flags & F_ALIAS) /* If they're both aliases, be arbitrary. */
-       return i;
+         return i;
       else
-       fprintf (stderr,
-                "Internal error: bad sparc-opcode.h: \"%s\" == \"%s\"\n",
-                op0->name, op1->name);
-    }
+         fprintf (stderr,
+                  "Internal error: bad sparc-opcode.h: \"%s\" == \"%s\"\n",
+                  op0->name, op1->name);
 
   /* Fewer arguments are preferred.  */
   {
@@ -485,4 +476,3 @@ compare_opcodes (a, b)
      written, so just say there are equal.  */
   return 0;
 }
-#endif