/* Target-dependent code for SPARC.
- Copyright (C) 2003-2017 Free Software Foundation, Inc.
+ Copyright (C) 2003-2018 Free Software Foundation, Inc.
This file is part of GDB.
#include "dis-asm.h"
#include "dwarf2.h"
#include "dwarf2-frame.h"
-#include "floatformat.h"
#include "frame.h"
#include "frame-base.h"
#include "frame-unwind.h"
sparc_fetch_wcookie (struct gdbarch *gdbarch)
{
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
- struct target_ops *ops = ¤t_target;
+ struct target_ops *ops = target_stack;
gdb_byte buf[8];
int len;
return 0;
}
+/* Return true if TYPE is returned by memory, false if returned by
+ register. */
+
+static bool
+sparc_structure_return_p (const struct type *type)
+{
+ if (TYPE_CODE (type) == TYPE_CODE_ARRAY && TYPE_VECTOR (type))
+ {
+ /* Float vectors are always returned by memory. */
+ if (sparc_floating_p (check_typedef (TYPE_TARGET_TYPE (type))))
+ return true;
+ /* Integer vectors are returned by memory if the vector size
+ is greater than 8 bytes long. */
+ return (TYPE_LENGTH (type) > 8);
+ }
+
+ if (sparc_floating_p (type))
+ {
+ /* Floating point types are passed by register for size 4 and
+ 8 bytes, and by memory for size 16 bytes. */
+ return (TYPE_LENGTH (type) == 16);
+ }
+
+ /* Other than that, only aggregates of all sizes get returned by
+ memory. */
+ return sparc_structure_or_union_p (type);
+}
+
+/* Return true if arguments of the given TYPE are passed by
+ memory; false if returned by register. */
+
+static bool
+sparc_arg_by_memory_p (const struct type *type)
+{
+ if (TYPE_CODE (type) == TYPE_CODE_ARRAY && TYPE_VECTOR (type))
+ {
+ /* Float vectors are always passed by memory. */
+ if (sparc_floating_p (check_typedef (TYPE_TARGET_TYPE (type))))
+ return true;
+ /* Integer vectors are passed by memory if the vector size
+ is greater than 8 bytes long. */
+ return (TYPE_LENGTH (type) > 8);
+ }
+
+ /* Floats are passed by register for size 4 and 8 bytes, and by memory
+ for size 16 bytes. */
+ if (sparc_floating_p (type))
+ return (TYPE_LENGTH (type) == 16);
+
+ /* Complex floats and aggregates of all sizes are passed by memory. */
+ if (sparc_complex_floating_p (type) || sparc_structure_or_union_p (type))
+ return true;
+
+ /* Everything else gets passed by register. */
+ return false;
+}
+
/* Register information. */
#define SPARC32_FPU_REGISTERS \
"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
{
struct type *type;
- type = arch_flags_type (gdbarch, "builtin_type_sparc_psr", 4);
+ type = arch_flags_type (gdbarch, "builtin_type_sparc_psr", 32);
append_flags_type_flag (type, 5, "ET");
append_flags_type_flag (type, 6, "PS");
append_flags_type_flag (type, 7, "S");
{
struct type *type;
- type = arch_flags_type (gdbarch, "builtin_type_sparc_fsr", 4);
+ type = arch_flags_type (gdbarch, "builtin_type_sparc_fsr", 32);
append_flags_type_flag (type, 0, "NXA");
append_flags_type_flag (type, 1, "DZA");
append_flags_type_flag (type, 2, "UFA");
static enum register_status
sparc32_pseudo_register_read (struct gdbarch *gdbarch,
- struct regcache *regcache,
+ readable_regcache *regcache,
int regnum, gdb_byte *buf)
{
enum register_status status;
gdb_assert (regnum >= SPARC32_D0_REGNUM && regnum <= SPARC32_D30_REGNUM);
regnum = SPARC_F0_REGNUM + 2 * (regnum - SPARC32_D0_REGNUM);
- status = regcache_raw_read (regcache, regnum, buf);
+ status = regcache->raw_read (regnum, buf);
if (status == REG_VALID)
- status = regcache_raw_read (regcache, regnum + 1, buf + 4);
+ status = regcache->raw_read (regnum + 1, buf + 4);
return status;
}
struct value **args, CORE_ADDR sp,
int struct_return, CORE_ADDR struct_addr)
{
- struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ struct gdbarch *gdbarch = regcache->arch ();
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
/* Number of words in the "parameter array". */
int num_elements = 0;
struct type *type = value_type (args[i]);
int len = TYPE_LENGTH (type);
- if (sparc_structure_or_union_p (type)
- || (sparc_floating_p (type) && len == 16)
- || sparc_complex_floating_p (type))
+ if (sparc_arg_by_memory_p (type))
{
/* Structure, Union and Quad-Precision Arguments. */
sp -= len;
}
else
{
- /* Integral and pointer arguments. */
- gdb_assert (sparc_integral_or_pointer_p (type));
-
- if (len < 4)
- args[i] = value_cast (builtin_type (gdbarch)->builtin_int32,
- args[i]);
+ /* Arguments passed via the General Purpose Registers. */
num_elements += ((len + 3) / 4);
}
}
const bfd_byte *valbuf = value_contents (args[i]);
struct type *type = value_type (args[i]);
int len = TYPE_LENGTH (type);
+ gdb_byte buf[4];
+
+ if (len < 4)
+ {
+ memset (buf, 0, 4 - len);
+ memcpy (buf + 4 - len, valbuf, len);
+ valbuf = buf;
+ len = 4;
+ }
gdb_assert (len == 4 || len == 8);
int len = TYPE_LENGTH (type);
gdb_byte buf[32];
- gdb_assert (!sparc_structure_or_union_p (type));
- gdb_assert (!(sparc_floating_p (type) && len == 16));
+ gdb_assert (!sparc_structure_return_p (type));
- if (sparc_floating_p (type) || sparc_complex_floating_p (type))
+ if (sparc_floating_p (type) || sparc_complex_floating_p (type)
+ || TYPE_CODE (type) == TYPE_CODE_ARRAY)
{
/* Floating return values. */
regcache_cooked_read (regcache, SPARC_F0_REGNUM, buf);
const gdb_byte *valbuf)
{
int len = TYPE_LENGTH (type);
- gdb_byte buf[8];
+ gdb_byte buf[32];
- gdb_assert (!sparc_structure_or_union_p (type));
- gdb_assert (!(sparc_floating_p (type) && len == 16));
- gdb_assert (len <= 8);
+ gdb_assert (!sparc_structure_return_p (type));
if (sparc_floating_p (type) || sparc_complex_floating_p (type))
{
guarantees that we can always find the return value, not just
before the function returns. */
- if (sparc_structure_or_union_p (type)
- || (sparc_floating_p (type) && TYPE_LENGTH (type) == 16))
+ if (sparc_structure_return_p (type))
{
ULONGEST sp;
CORE_ADDR addr;
uint64_t reg;
int size = register_size (gdbarch, 0);
- dwarf2_frame_state_alloc_regs (&fs->regs, 32);
+ fs->regs.alloc_regs (32);
for (reg = 8; reg < 16; reg++)
{
fs->regs.reg[reg].how = DWARF2_FRAME_REG_SAVED_REG;
struct frame_info *frame = get_current_frame ();
/* Trap instruction (TRAP). */
- return gdbarch_tdep (get_regcache_arch (regcache))->step_trap (frame,
+ return gdbarch_tdep (regcache->arch ())->step_trap (frame,
insn);
}
return 0;
}
-static VEC (CORE_ADDR) *
+static std::vector<CORE_ADDR>
sparc_software_single_step (struct regcache *regcache)
{
- struct gdbarch *arch = get_regcache_arch (regcache);
+ struct gdbarch *arch = regcache->arch ();
struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
CORE_ADDR npc, nnpc;
CORE_ADDR pc, orig_npc;
- VEC (CORE_ADDR) *next_pcs = NULL;
+ std::vector<CORE_ADDR> next_pcs;
pc = regcache_raw_get_unsigned (regcache, tdep->pc_regnum);
orig_npc = npc = regcache_raw_get_unsigned (regcache, tdep->npc_regnum);
/* Analyze the instruction at PC. */
nnpc = sparc_analyze_control_transfer (regcache, pc, &npc);
if (npc != 0)
- VEC_safe_push (CORE_ADDR, next_pcs, npc);
+ next_pcs.push_back (npc);
if (nnpc != 0)
- VEC_safe_push (CORE_ADDR, next_pcs, nnpc);
+ next_pcs.push_back (nnpc);
/* Assert that we have set at least one breakpoint, and that
they're not set at the same spot - unless we're going
static void
sparc_write_pc (struct regcache *regcache, CORE_ADDR pc)
{
- struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache));
+ struct gdbarch_tdep *tdep = gdbarch_tdep (regcache->arch ());
regcache_cooked_write_unsigned (regcache, tdep->pc_regnum, pc);
regcache_cooked_write_unsigned (regcache, tdep->npc_regnum, pc + 4);
set_gdbarch_frame_args_skip (gdbarch, 8);
- set_gdbarch_print_insn (gdbarch, print_insn_sparc);
-
set_gdbarch_software_single_step (gdbarch, sparc_software_single_step);
set_gdbarch_write_pc (gdbarch, sparc_write_pc);
}
/* Target description may have changed. */
- info.tdep_info = tdesc_data;
+ info.tdesc_data = tdesc_data;
tdesc_use_registers (gdbarch, tdesc, tdesc_data);
}
void
sparc_supply_rwindow (struct regcache *regcache, CORE_ADDR sp, int regnum)
{
- struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ struct gdbarch *gdbarch = regcache->arch ();
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
int offset = 0;
gdb_byte buf[8];
/* Clear out the top half of the temporary buffer, and put the
register value in the bottom half if we're in 64-bit mode. */
- if (gdbarch_ptr_bit (get_regcache_arch (regcache)) == 64)
+ if (gdbarch_ptr_bit (regcache->arch ()) == 64)
{
memset (buf, 0, 4);
offset = 4;
sparc_collect_rwindow (const struct regcache *regcache,
CORE_ADDR sp, int regnum)
{
- struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ struct gdbarch *gdbarch = regcache->arch ();
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
int offset = 0;
gdb_byte buf[8];
sp &= 0xffffffffUL;
/* Only use the bottom half if we're in 64-bit mode. */
- if (gdbarch_ptr_bit (get_regcache_arch (regcache)) == 64)
+ if (gdbarch_ptr_bit (regcache->arch ()) == 64)
offset = 4;
for (i = SPARC_L0_REGNUM; i <= SPARC_I7_REGNUM; i++)
0 * 4, /* %f0 */
32 * 4, /* %fsr */
};
-\f
-
-/* Provide a prototype to silence -Wmissing-prototypes. */
-void _initialize_sparc_tdep (void);
void
_initialize_sparc_tdep (void)
projects / deliverable / binutils-gdb.git / blobdiff