/* SPU target-dependent code for GDB, the GNU debugger.
- Copyright (C) 2006-2017 Free Software Foundation, Inc.
+ Copyright (C) 2006-2018 Free Software Foundation, Inc.
Contributed by Ulrich Weigand <uweigand@de.ibm.com>.
Based on a port by Sid Manning <sid@us.ibm.com>.
spu_pseudo_register_read_spu (struct regcache *regcache, const char *regname,
gdb_byte *buf)
{
- struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ struct gdbarch *gdbarch = regcache->arch ();
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
enum register_status status;
gdb_byte reg[32];
ULONGEST id;
ULONGEST ul;
- status = regcache_raw_read_unsigned (regcache, SPU_ID_REGNUM, &id);
+ status = regcache->raw_read (SPU_ID_REGNUM, &id);
if (status != REG_VALID)
return status;
xsnprintf (annex, sizeof annex, "%d/%s", (int) id, regname);
switch (regnum)
{
case SPU_SP_REGNUM:
- status = regcache_raw_read (regcache, SPU_RAW_SP_REGNUM, reg);
+ status = regcache->raw_read (SPU_RAW_SP_REGNUM, reg);
if (status != REG_VALID)
return status;
memcpy (buf, reg, 4);
return status;
case SPU_FPSCR_REGNUM:
- status = regcache_raw_read_unsigned (regcache, SPU_ID_REGNUM, &id);
+ status = regcache->raw_read (SPU_ID_REGNUM, &id);
if (status != REG_VALID)
return status;
xsnprintf (annex, sizeof annex, "%d/fpcr", (int) id);
spu_pseudo_register_write_spu (struct regcache *regcache, const char *regname,
const gdb_byte *buf)
{
- struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ struct gdbarch *gdbarch = regcache->arch ();
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
char reg[32];
char annex[32];
static CORE_ADDR
spu_read_pc (struct regcache *regcache)
{
- struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache));
+ struct gdbarch_tdep *tdep = gdbarch_tdep (regcache->arch ());
ULONGEST pc;
regcache_cooked_read_unsigned (regcache, SPU_PC_REGNUM, &pc);
/* Mask off interrupt enable bit. */
spu2ppu_prev_arch (struct frame_info *this_frame, void **this_cache)
{
struct spu2ppu_cache *cache = (struct spu2ppu_cache *) *this_cache;
- return get_regcache_arch (cache->regcache);
+ return cache->regcache->arch ();
}
static void
void **this_cache, int regnum)
{
struct spu2ppu_cache *cache = (struct spu2ppu_cache *) *this_cache;
- struct gdbarch *gdbarch = get_regcache_arch (cache->regcache);
+ struct gdbarch *gdbarch = cache->regcache->arch ();
gdb_byte *buf;
buf = (gdb_byte *) alloca (register_size (gdbarch, regnum));
static std::vector<CORE_ADDR>
spu_software_single_step (struct regcache *regcache)
{
- struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ struct gdbarch *gdbarch = regcache->arch ();
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
CORE_ADDR pc, next_pc;
unsigned int insn;
insn = extract_unsigned_integer (buf, 4, byte_order);
/* Get local store limit. */
- lslr = regcache_raw_get_unsigned (regcache, SPU_LSLR_REGNUM);
- if (!lslr)
+ if ((regcache_cooked_read_unsigned (regcache, SPU_LSLR_REGNUM, &lslr)
+ != REG_VALID) || !lslr)
lslr = (ULONGEST) -1;
/* Next sequential instruction is at PC + 4, except if the current
if (reg == SPU_PC_REGNUM)
target += SPUADDR_ADDR (pc);
else if (reg != -1)
- target += regcache_raw_get_unsigned (regcache, reg) & -4;
+ {
+ regcache_raw_read_part (regcache, reg, 0, 4, buf);
+ target += extract_unsigned_integer (buf, 4, byte_order) & -4;
+ }
target = target & lslr;
if (target != next_pc)
/* Now go and fiddle with all the LMAs. */
ALL_OBJFILE_OSECTIONS (objfile, osect)
{
- bfd *obfd = objfile->obfd;
asection *bsect = osect->the_bfd_section;
int ndx = osect - objfile->sections;
struct symbol *sym;
struct symtab_and_line sal;
- sym = block_lookup_symbol (block, "main", VAR_DOMAIN);
+ sym = block_lookup_symbol (block, "main",
+ symbol_name_match_type::SEARCH_NAME,
+ VAR_DOMAIN);
if (sym)
{
fixup_symbol_section (sym, objfile);
}
static void
-info_spu_command (char *args, int from_tty)
+info_spu_command (const char *args, int from_tty)
{
printf_unfiltered (_("\"info spu\" must be followed by "
"the name of an SPU facility.\n"));
/* Root of all "set spu "/"show spu " commands. */
static void
-show_spu_command (char *args, int from_tty)
+show_spu_command (const char *args, int from_tty)
{
help_list (showspucmdlist, "show spu ", all_commands, gdb_stdout);
}
static void
-set_spu_command (char *args, int from_tty)
+set_spu_command (const char *args, int from_tty)
{
help_list (setspucmdlist, "set spu ", all_commands, gdb_stdout);
}
set_gdbarch_address_class_name_to_type_flags
(gdbarch, spu_address_class_name_to_type_flags);
+ /* We need to support more than "addr_bit" significant address bits
+ in order to support SPUADDR_ADDR encoded values. */
+ set_gdbarch_significant_addr_bit (gdbarch, 64);
/* Inferior function calls. */
set_gdbarch_call_dummy_location (gdbarch, ON_STACK);