RSI, RDI, RBP, RSP,
R8, R9, R10, R11,
R12, R13, R14, R15,
- RIP, EFLAGS,
+ RIP, EFLAGS, CS, SS,
DS, ES, FS, GS
};
for (i = 0; i < x86_64_num_gregs; i++)
if ((regno == -1 || regno == i))
- read_register_gen (i, (char *) (regp + x86_64_regmap[i]));
+ deprecated_read_register_gen (i, (char *) (regp + x86_64_regmap[i]));
}
/* Fetch all general-purpose registers from process/thread TID and
#define offsetof(TYPE, MEMBER) ((unsigned long) &((TYPE *)0)->MEMBER)
#endif
+/* SSE register? */
+/* FIXME: cagney/2002-11-15: Once the i386 and x86-64 are integrated,
+ this will go. */
+
+int
+i386_sse_regnum_p (int regnum)
+{
+ return (regnum < NUM_REGS
+ && (XMM0_REGNUM <= (regnum) && (regnum) < MXCSR_REGNUM));
+}
+
/* Return the address of register REGNUM. BLOCKEND is the value of
u.u_ar0, which should point to the registers. */
CORE_ADDR