indicates that the instruction is an ENTRY instruction. */
#define XTENSA_IS_ENTRY(op1) \
- ((TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) ? ((op1) == 0x6c) : ((op1) == 0x36))
+ ((gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) \
+ ? ((op1) == 0x6c) : ((op1) == 0x36))
#define XTENSA_ENTRY_LENGTH 3
/* Lookup call insn.
(Return the default value (4) if we can't find a valid call insn. */
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_LITTLE)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_LITTLE)
{
if (((insn & 0xf) == 0x5) || ((insn & 0xcf) == 0xc0))
winsize = (insn & 0x30) >> 2; /* 0, 4, 8, 12 */
DEBUGTRACE ("xtensa_register_write_masked ()\n");
/* Copy the masked register to host byte-order. */
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
for (i = 0; i < bytesize; i++)
{
mem >>= 8;
ptr = value;
mem = *ptr;
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
for (i = 0; i < bytesize; i++)
{
if ((i & 3) == 0)
DEBUGINFO ("[xtensa_extract_return_value] areg %d len %d\n", areg, len);
- if (len < 4 && TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (len < 4 && gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
offset = 4 - len;
for (; len > 0; len -= 4, areg++, valbuf += 4)
DEBUGTRACE ("[xtensa_store_return_value] callsize %d wb %d\n",
callsize, (int) wb);
- if (len < 4 && TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (len < 4 && gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
offset = 4 - len;
areg = AREG_NUMBER (A2_REGNUM + callsize, wb);
word in big-endian mode and require a shift. This only
applies for structures smaller than one word. */
- if (n < REGISTER_SIZE && TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (n < REGISTER_SIZE
+ && gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
offset += (REGISTER_SIZE - n);
write_memory (offset, info->contents, info->length);
than REGISTER_SIZE; for larger odd-sized structures the excess
will be left-aligned in the register on both endiannesses. */
- if (n < REGISTER_SIZE && TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (n < REGISTER_SIZE
+ && gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
{
ULONGEST v = extract_unsigned_integer (cp, REGISTER_SIZE);
v = v >> ((REGISTER_SIZE - n) * TARGET_CHAR_BIT);
if (ISA_USE_DENSITY_INSTRUCTIONS)
{
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
{
*lenptr = sizeof (density_big_breakpoint);
return density_big_breakpoint;
}
else
{
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
{
*lenptr = sizeof (big_breakpoint);
return big_breakpoint;