Improve MSP430 section placement.

[deliverable/binutils-gdb.git] / gdb / xtensa-tdep.c

diff --git a/gdb/xtensa-tdep.c b/gdb/xtensa-tdep.c
index 0fcd483165450a780c0fcded5c266a36bf339757..bfb9ac6fa4adc3748b28ee54aab2945a3330ca1f 100644 (file)
--- a/gdb/xtensa-tdep.c
+++ b/gdb/xtensa-tdep.c
@@ -120,6 +120,9 @@ static unsigned int xtensa_debug_level = 0;
 #define PS_WOE                 (1<<18)
 #define PS_EXC                 (1<<4)
 
+/* Big enough to hold the size of the largest register in bytes.  */
+#define XTENSA_MAX_REGISTER_SIZE       64
+
 static int
 windowing_enabled (struct gdbarch *gdbarch, unsigned int ps)
 {
@@ -370,7 +373,7 @@ static void
 xtensa_register_write_masked (struct regcache *regcache,
                              xtensa_register_t *reg, const gdb_byte *buffer)
 {
-  unsigned int value[(MAX_REGISTER_SIZE + 3) / 4];
+  unsigned int value[(XTENSA_MAX_REGISTER_SIZE + 3) / 4];
   const xtensa_mask_t *mask = reg->mask;
 
   int shift = 0;               /* Shift for next mask (mod 32).  */
@@ -454,7 +457,7 @@ static enum register_status
 xtensa_register_read_masked (struct regcache *regcache,
                             xtensa_register_t *reg, gdb_byte *buffer)
 {
-  unsigned int value[(MAX_REGISTER_SIZE + 3) / 4];
+  unsigned int value[(XTENSA_MAX_REGISTER_SIZE + 3) / 4];
   const xtensa_mask_t *mask = reg->mask;
 
   int shift = 0;
@@ -559,16 +562,15 @@ xtensa_pseudo_register_read (struct gdbarch *gdbarch,
       && (regnum >= gdbarch_tdep (gdbarch)->a0_base)
       && (regnum <= gdbarch_tdep (gdbarch)->a0_base + 15))
     {
-      gdb_byte *buf = (gdb_byte *) alloca (MAX_REGISTER_SIZE);
+      ULONGEST value;
       enum register_status status;
 
-      status = regcache_raw_read (regcache,
-                                 gdbarch_tdep (gdbarch)->wb_regnum,
-                                 buf);
+      status = regcache_raw_read_unsigned (regcache,
+                                          gdbarch_tdep (gdbarch)->wb_regnum,
+                                          &value);
       if (status != REG_VALID)
        return status;
-      regnum = arreg_number (gdbarch, regnum,
-                            extract_unsigned_integer (buf, 4, byte_order));
+      regnum = arreg_number (gdbarch, regnum, value);
     }
 
   /* We can always read non-pseudo registers.  */
@@ -656,12 +658,10 @@ xtensa_pseudo_register_write (struct gdbarch *gdbarch,
       && (regnum >= gdbarch_tdep (gdbarch)->a0_base)
       && (regnum <= gdbarch_tdep (gdbarch)->a0_base + 15))
     {
-      gdb_byte *buf = (gdb_byte *) alloca (MAX_REGISTER_SIZE);
-
-      regcache_raw_read (regcache,
-                        gdbarch_tdep (gdbarch)->wb_regnum, buf);
-      regnum = arreg_number (gdbarch, regnum,
-                            extract_unsigned_integer (buf, 4, byte_order));
+      ULONGEST value;
+      regcache_raw_read_unsigned (regcache,
+                                 gdbarch_tdep (gdbarch)->wb_regnum, &value);
+      regnum = arreg_number (gdbarch, regnum, value);
     }
 
   /* We can always write 'core' registers.
@@ -740,17 +740,13 @@ static void
 xtensa_init_reggroups (void)
 {
   int i;
-  char cpname[] = "cp0";
 
   xtensa_ar_reggroup = reggroup_new ("ar", USER_REGGROUP);
   xtensa_user_reggroup = reggroup_new ("user", USER_REGGROUP);
   xtensa_vectra_reggroup = reggroup_new ("vectra", USER_REGGROUP);
 
   for (i = 0; i < XTENSA_MAX_COPROCESSOR; i++)
-    {
-      cpname[2] = '0' + i;
-      xtensa_cp[i] = reggroup_new (cpname, USER_REGGROUP);
-    }
+    xtensa_cp[i] = reggroup_new (xstrprintf ("cp%d", i), USER_REGGROUP);
 }
 
 static void
@@ -3259,8 +3255,6 @@ xtensa_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
   frame_unwind_append_unwinder (gdbarch, &xtensa_unwind);
   dwarf2_append_unwinders (gdbarch);
 
-  set_gdbarch_print_insn (gdbarch, print_insn_xtensa);
-
   set_gdbarch_have_nonsteppable_watchpoint (gdbarch, 1);
 
   xtensa_add_reggroups (gdbarch);