gdbserver/linux-low: turn 'supports_software_single_step' and 'get_next_pcs' into...

[deliverable/binutils-gdb.git] / gdbserver / linux-arm-low.cc

diff --git a/gdbserver/linux-arm-low.cc b/gdbserver/linux-arm-low.cc
index 9f046c098bf1cc067919fa26aa260d942fbdf870..bd42feba1c4724bc20a421f2b52e840a66342bc5 100644 (file)
--- a/gdbserver/linux-arm-low.cc
+++ b/gdbserver/linux-arm-low.cc
@@ -54,6 +54,79 @@
 #define PTRACE_SETHBPREGS 30
 #endif
 
+/* Linux target op definitions for the ARM architecture.  */
+
+class arm_target : public linux_process_target
+{
+public:
+
+  const regs_info *get_regs_info () override;
+
+  int breakpoint_kind_from_pc (CORE_ADDR *pcptr) override;
+
+  int breakpoint_kind_from_current_state (CORE_ADDR *pcptr) override;
+
+  const gdb_byte *sw_breakpoint_from_kind (int kind, int *size) override;
+
+  bool supports_software_single_step () override;
+
+protected:
+
+  void low_arch_setup () override;
+
+  bool low_cannot_fetch_register (int regno) override;
+
+  bool low_cannot_store_register (int regno) override;
+
+  bool low_supports_breakpoints () override;
+
+  CORE_ADDR low_get_pc (regcache *regcache) override;
+
+  void low_set_pc (regcache *regcache, CORE_ADDR newpc) override;
+
+  std::vector<CORE_ADDR> low_get_next_pcs (regcache *regcache) override;
+};
+
+/* The singleton target ops object.  */
+
+static arm_target the_arm_target;
+
+bool
+arm_target::low_supports_breakpoints ()
+{
+  return true;
+}
+
+CORE_ADDR
+arm_target::low_get_pc (regcache *regcache)
+{
+  return linux_get_pc_32bit (regcache);
+}
+
+void
+arm_target::low_set_pc (regcache *regcache, CORE_ADDR pc)
+{
+  linux_set_pc_32bit (regcache, pc);
+}
+
+int
+arm_target::breakpoint_kind_from_pc (CORE_ADDR *pcptr)
+{
+  return arm_breakpoint_kind_from_pc (pcptr);
+}
+
+int
+arm_target::breakpoint_kind_from_current_state (CORE_ADDR *pcptr)
+{
+  return arm_breakpoint_kind_from_current_state (pcptr);
+}
+
+const gdb_byte *
+arm_target::sw_breakpoint_from_kind (int kind, int *size)
+{
+  return arm_sw_breakpoint_from_kind (kind, size);
+}
+
 /* Information describing the hardware breakpoint capabilities.  */
 static struct
 {
@@ -149,14 +222,14 @@ static struct arm_get_next_pcs_ops get_next_pcs_ops = {
   arm_linux_get_next_pcs_fixup,
 };
 
-static int
-arm_cannot_store_register (int regno)
+bool
+arm_target::low_cannot_store_register (int regno)
 {
   return (regno >= arm_num_regs);
 }
 
-static int
-arm_cannot_fetch_register (int regno)
+bool
+arm_target::low_cannot_fetch_register (int regno)
 {
   return (regno >= arm_num_regs);
 }
@@ -779,15 +852,15 @@ arm_sigreturn_next_pc (struct regcache *regcache, int svc_number,
   gdb_assert (svc_number == __NR_sigreturn || svc_number == __NR_rt_sigreturn);
 
   collect_register_by_name (regcache, "sp", &sp);
-  (*the_target->read_memory) (sp, (unsigned char *) &sp_data, 4);
+  the_target->read_memory (sp, (unsigned char *) &sp_data, 4);
 
   pc_offset = arm_linux_sigreturn_next_pc_offset
     (sp, sp_data, svc_number, __NR_sigreturn == svc_number ? 1 : 0);
 
-  (*the_target->read_memory) (sp + pc_offset, (unsigned char *) &next_pc, 4);
+  the_target->read_memory (sp + pc_offset, (unsigned char *) &next_pc, 4);
 
   /* Set IS_THUMB according the CPSR saved on the stack.  */
-  (*the_target->read_memory) (sp + pc_offset + 4, (unsigned char *) &cpsr, 4);
+  the_target->read_memory (sp + pc_offset + 4, (unsigned char *) &cpsr, 4);
   *is_thumb = ((cpsr & CPSR_T) != 0);
 
   return next_pc;
@@ -877,8 +950,8 @@ arm_read_description (void)
   return arm_linux_read_description (ARM_FP_TYPE_NONE);
 }
 
-static void
-arm_arch_setup (void)
+void
+arm_target::low_arch_setup ()
 {
   int tid = lwpid_of (current_thread);
   int gpregs[18];
@@ -899,10 +972,16 @@ arm_arch_setup (void)
     have_ptrace_getregset = 0;
 }
 
+bool
+arm_target::supports_software_single_step ()
+{
+  return true;
+}
+
 /* Fetch the next possible PCs after the current instruction executes.  */
 
-static std::vector<CORE_ADDR>
-arm_gdbserver_get_next_pcs (struct regcache *regcache)
+std::vector<CORE_ADDR>
+arm_target::low_get_next_pcs (regcache *regcache)
 {
   struct arm_get_next_pcs next_pcs_ctx;
 
@@ -939,7 +1018,7 @@ arm_get_syscall_trapinfo (struct regcache *regcache, int *sysno)
 
       collect_register_by_name (regcache, "pc", &pc);
 
-      if ((*the_target->read_memory) (pc - 4, (unsigned char *) &insn, 4))
+      if (the_target->read_memory (pc - 4, (unsigned char *) &insn, 4))
        *sysno = UNKNOWN_SYSCALL;
       else
        {
@@ -992,8 +1071,8 @@ static struct regs_info regs_info_arm =
     &arm_regsets_info
   };
 
-static const struct regs_info *
-arm_regs_info (void)
+const regs_info *
+arm_target::get_regs_info ()
 {
   const struct target_desc *tdesc = current_process ()->tdesc;
 
@@ -1006,16 +1085,6 @@ arm_regs_info (void)
 }
 
 struct linux_target_ops the_low_target = {
-  arm_arch_setup,
-  arm_regs_info,
-  arm_cannot_fetch_register,
-  arm_cannot_store_register,
-  NULL, /* fetch_register */
-  linux_get_pc_32bit,
-  linux_set_pc_32bit,
-  arm_breakpoint_kind_from_pc,
-  arm_sw_breakpoint_from_kind,
-  arm_gdbserver_get_next_pcs,
   0,
   arm_breakpoint_at,
   arm_supports_z_point_type,
@@ -1039,11 +1108,14 @@ struct linux_target_ops the_low_target = {
   NULL, /* emit_ops */
   NULL, /* get_min_fast_tracepoint_insn_len */
   NULL, /* supports_range_stepping */
-  arm_breakpoint_kind_from_current_state,
   arm_supports_hardware_single_step,
   arm_get_syscall_trapinfo,
 };
 
+/* The linux target ops object.  */
+
+linux_process_target *the_linux_target = &the_arm_target;
+
 void
 initialize_low_arch (void)
 {