// powerpc.cc -- powerpc target support for gold.
-// Copyright 2008, 2009, 2010, 2011, 2012, 2013 Free Software Foundation, Inc.
+// Copyright (C) 2008-2015 Free Software Foundation, Inc.
// Written by David S. Miller <davem@davemloft.net>
// and David Edelsohn <edelsohn@gnu.org>
template<int size, bool big_endian>
class Stub_table;
+template<int size, bool big_endian>
+class Target_powerpc;
+
+struct Stub_table_owner
+{
+ Output_section* output_section;
+ const Output_section::Input_section* owner;
+};
+
inline bool
is_branch_reloc(unsigned int r_type);
const typename elfcpp::Ehdr<size, big_endian>& ehdr)
: Sized_relobj_file<size, big_endian>(name, input_file, offset, ehdr),
special_(0), has_small_toc_reloc_(false), opd_valid_(false),
- opd_ent_(), access_from_map_(), has14_(), stub_table_(),
+ opd_ent_(), access_from_map_(), has14_(), stub_table_index_(),
e_flags_(ehdr.get_e_flags()), st_other_()
{
this->set_abiversion(0);
// Add a reference from SRC_OBJ, SRC_INDX to this object's .opd
// section at DST_OFF.
void
- add_reference(Object* src_obj,
+ add_reference(Relobj* src_obj,
unsigned int src_indx,
typename elfcpp::Elf_types<size>::Elf_Addr dst_off)
{
if (this->opd_ent_[i].gc_mark)
{
unsigned int shndx = this->opd_ent_[i].shndx;
- symtab->gc()->worklist().push(Section_id(this, shndx));
+ symtab->gc()->worklist().push_back(Section_id(this, shndx));
}
}
{ return shndx < this->has14_.size() && this->has14_[shndx]; }
void
- set_stub_table(unsigned int shndx, Stub_table<size, big_endian>* stub_table)
+ set_stub_table(unsigned int shndx, unsigned int stub_index)
{
- if (shndx >= this->stub_table_.size())
- this->stub_table_.resize(shndx + 1);
- this->stub_table_[shndx] = stub_table;
+ if (shndx >= this->stub_table_index_.size())
+ this->stub_table_index_.resize(shndx + 1);
+ this->stub_table_index_[shndx] = stub_index;
}
Stub_table<size, big_endian>*
stub_table(unsigned int shndx)
{
- if (shndx < this->stub_table_.size())
- return this->stub_table_[shndx];
+ if (shndx < this->stub_table_index_.size())
+ {
+ Target_powerpc<size, big_endian>* target
+ = static_cast<Target_powerpc<size, big_endian>*>(
+ parameters->sized_target<size, big_endian>());
+ unsigned int indx = this->stub_table_index_[shndx];
+ gold_assert(indx < target->stub_tables().size());
+ return target->stub_tables()[indx];
+ }
return NULL;
}
+ void
+ clear_stub_table()
+ {
+ this->stub_table_index_.clear();
+ }
+
int
abiversion() const
{ return this->e_flags_ & elfcpp::EF_PPC64_ABI; }
std::vector<bool> has14_;
// The stub table to use for a given input section.
- std::vector<Stub_table<size, big_endian>*> stub_table_;
+ std::vector<unsigned int> stub_table_index_;
// Header e_flags
elfcpp::Elf_Word e_flags_;
glink_(NULL), rela_dyn_(NULL), copy_relocs_(elfcpp::R_POWERPC_COPY),
tlsld_got_offset_(-1U),
stub_tables_(), branch_lookup_table_(), branch_info_(),
- plt_thread_safe_(false)
+ plt_thread_safe_(false), relax_failed_(false), relax_fail_count_(0),
+ stub_group_size_(0)
{
}
ppc_object->set_has_14bit_branch(data_shndx);
}
- Stub_table<size, big_endian>*
- new_stub_table();
-
void
do_define_standard_symbols(Symbol_table*, Layout*);
do_can_check_for_function_pointers() const
{ return true; }
+ // Adjust -fsplit-stack code which calls non-split-stack code.
+ void
+ do_calls_non_split(Relobj* object, unsigned int shndx,
+ section_offset_type fnoffset, section_size_type fnsize,
+ unsigned char* view, section_size_type view_size,
+ std::string* from, std::string* to) const;
+
// Relocate a section.
void
relocate_section(const Relocate_info<size, big_endian>*,
return this->glink_;
}
+ Output_data_glink<size, big_endian>*
+ glink_section()
+ {
+ gold_assert(this->glink_ != NULL);
+ return this->glink_;
+ }
+
bool has_glink() const
{ return this->glink_ != NULL; }
// section of a function descriptor.
void
do_gc_add_reference(Symbol_table* symtab,
- Object* src_obj,
+ Relobj* src_obj,
unsigned int src_shndx,
- Object* dst_obj,
+ Relobj* dst_obj,
unsigned int dst_shndx,
Address dst_off) const;
{ }
static inline int
- get_reference_flags(unsigned int r_type);
+ get_reference_flags(unsigned int r_type, const Target_powerpc* target);
inline void
local(Symbol_table* symtab, Layout* layout, Target_powerpc* target,
inline bool
local_reloc_may_be_function_pointer(Symbol_table* , Layout* ,
Target_powerpc* ,
- Sized_relobj_file<size, big_endian>* ,
+ Sized_relobj_file<size, big_endian>* relobj,
unsigned int ,
Output_section* ,
const elfcpp::Rela<size, big_endian>& ,
// may be folded and we'll still keep function addresses distinct.
// That means no reloc is of concern here.
if (size == 64)
- return false;
- // For 32-bit, conservatively assume anything but calls to
+ {
+ Powerpc_relobj<size, big_endian>* ppcobj = static_cast
+ <Powerpc_relobj<size, big_endian>*>(relobj);
+ if (ppcobj->abiversion() == 1)
+ return false;
+ }
+ // For 32-bit and ELFv2, conservatively assume anything but calls to
// function code might be taking the address of the function.
return !is_branch_reloc(r_type);
}
inline bool
global_reloc_may_be_function_pointer(Symbol_table* , Layout* ,
Target_powerpc* ,
- Sized_relobj_file<size, big_endian>* ,
+ Sized_relobj_file<size, big_endian>* relobj,
unsigned int ,
Output_section* ,
const elfcpp::Rela<size, big_endian>& ,
{
// As above.
if (size == 64)
- return false;
+ {
+ Powerpc_relobj<size, big_endian>* ppcobj = static_cast
+ <Powerpc_relobj<size, big_endian>*>(relobj);
+ if (ppcobj->abiversion() == 1)
+ return false;
+ }
return !is_branch_reloc(r_type);
}
static bool
- reloc_needs_plt_for_ifunc(Sized_relobj_file<size, big_endian>* object,
+ reloc_needs_plt_for_ifunc(Target_powerpc<size, big_endian>* target,
+ Sized_relobj_file<size, big_endian>* object,
unsigned int r_type, bool report_err);
private:
bool issued_non_pic_error_;
};
- Address
- symval_for_branch(const Symbol_table* symtab, Address value,
+ bool
+ symval_for_branch(const Symbol_table* symtab,
const Sized_symbol<size>* gsym,
Powerpc_relobj<size, big_endian>* object,
- unsigned int *dest_shndx);
+ Address *value, unsigned int *dest_shndx);
// The class which implements relocation.
class Relocate : protected Track_tls
// Look over all the input sections, deciding where to place stubs.
void
- group_sections(Layout*, const Task*);
+ group_sections(Layout*, const Task*, bool);
// Sort output sections by address.
struct Sort_sections
{ }
// If this branch needs a plt call stub, or a long branch stub, make one.
- void
+ bool
make_stub(Stub_table<size, big_endian>*,
Stub_table<size, big_endian>*,
Symbol_table*) const;
Branches branch_info_;
bool plt_thread_safe_;
+
+ bool relax_failed_;
+ int relax_fail_count_;
+ int32_t stub_group_size_;
};
template<>
return insn;
}
-// Modified version of symtab.h class Symbol member
-// Given a direct absolute or pc-relative static relocation against
-// the global symbol, this function returns whether a dynamic relocation
-// is needed.
-
-template<int size>
-bool
-needs_dynamic_reloc(const Symbol* gsym, int flags)
-{
- // No dynamic relocations in a static link!
- if (parameters->doing_static_link())
- return false;
-
- // A reference to an undefined symbol from an executable should be
- // statically resolved to 0, and does not need a dynamic relocation.
- // This matches gnu ld behavior.
- if (gsym->is_undefined() && !parameters->options().shared())
- return false;
-
- // A reference to an absolute symbol does not need a dynamic relocation.
- if (gsym->is_absolute())
- return false;
-
- // An absolute reference within a position-independent output file
- // will need a dynamic relocation.
- if ((flags & Symbol::ABSOLUTE_REF)
- && parameters->options().output_is_position_independent())
- return true;
-
- // A function call that can branch to a local PLT entry does not need
- // a dynamic relocation.
- if ((flags & Symbol::FUNCTION_CALL) && gsym->has_plt_offset())
- return false;
-
- // A reference to any PLT entry in a non-position-independent executable
- // does not need a dynamic relocation.
- // Except due to having function descriptors on powerpc64 we don't define
- // functions to their plt code in an executable, so this doesn't apply.
- if (size == 32
- && !parameters->options().output_is_position_independent()
- && gsym->has_plt_offset())
- return false;
-
- // A reference to a symbol defined in a dynamic object or to a
- // symbol that is preemptible will need a dynamic relocation.
- if (gsym->is_from_dynobj()
- || gsym->is_undefined()
- || gsym->is_preemptible())
- return true;
-
- // For all other cases, return FALSE.
- return false;
-}
-
-// Modified version of symtab.h class Symbol member
-// Whether we should use the PLT offset associated with a symbol for
-// a relocation. FLAGS is a set of Reference_flags.
-
-template<int size>
-bool
-use_plt_offset(const Symbol* gsym, int flags)
-{
- // If the symbol doesn't have a PLT offset, then naturally we
- // don't want to use it.
- if (!gsym->has_plt_offset())
- return false;
-
- // For a STT_GNU_IFUNC symbol we always have to use the PLT entry.
- if (gsym->type() == elfcpp::STT_GNU_IFUNC)
- return true;
-
- // If we are going to generate a dynamic relocation, then we will
- // wind up using that, so no need to use the PLT entry.
- if (needs_dynamic_reloc<size>(gsym, flags))
- return false;
-
- // If the symbol is from a dynamic object, we need to use the PLT
- // entry.
- if (gsym->is_from_dynobj())
- return true;
-
- // If we are generating a shared object, and this symbol is
- // undefined or preemptible, we need to use the PLT entry.
- if (parameters->options().shared()
- && (gsym->is_undefined() || gsym->is_preemptible()))
- return true;
-
- // If this is a call to a weak undefined symbol, we need to use
- // the PLT entry; the symbol may be defined by a library loaded
- // at runtime.
- if ((flags & Symbol::FUNCTION_CALL) && gsym->is_weak_undefined())
- return true;
-
- // Otherwise we can use the regular definition.
- return false;
-}
template<int size, bool big_endian>
class Powerpc_relocate_functions
{
CHECK_NONE,
CHECK_SIGNED,
- CHECK_BITFIELD
+ CHECK_UNSIGNED,
+ CHECK_BITFIELD,
+ CHECK_LOW_INSN,
+ CHECK_HIGH_INSN
};
enum Status
template<int valsize>
static inline bool
- has_overflow_bitfield(Address value)
+ has_overflow_unsigned(Address value)
{
Address limit = static_cast<Address>(1) << ((valsize - 1) >> 1);
limit <<= ((valsize - 1) >> 1);
limit <<= ((valsize - 1) - 2 * ((valsize - 1) >> 1));
- return value > (limit << 1) - 1 && value + limit > (limit << 1) - 1;
+ return value > (limit << 1) - 1;
+ }
+
+ template<int valsize>
+ static inline bool
+ has_overflow_bitfield(Address value)
+ {
+ return (has_overflow_unsigned<valsize>(value)
+ && has_overflow_signed<valsize>(value));
}
template<int valsize>
if (has_overflow_signed<valsize>(value))
return STATUS_OVERFLOW;
}
+ else if (overflow == CHECK_UNSIGNED)
+ {
+ if (has_overflow_unsigned<valsize>(value))
+ return STATUS_OVERFLOW;
+ }
else if (overflow == CHECK_BITFIELD)
{
if (has_overflow_bitfield<valsize>(value))
}
// Do a simple RELA relocation
- template<int valsize>
+ template<int fieldsize, int valsize>
static inline Status
rela(unsigned char* view, Address value, Overflow_check overflow)
{
- typedef typename elfcpp::Swap<valsize, big_endian>::Valtype Valtype;
+ typedef typename elfcpp::Swap<fieldsize, big_endian>::Valtype Valtype;
Valtype* wv = reinterpret_cast<Valtype*>(view);
- elfcpp::Swap<valsize, big_endian>::writeval(wv, value);
+ elfcpp::Swap<fieldsize, big_endian>::writeval(wv, value);
return overflowed<valsize>(value, overflow);
}
- template<int valsize>
+ template<int fieldsize, int valsize>
static inline Status
rela(unsigned char* view,
unsigned int right_shift,
- typename elfcpp::Valtype_base<valsize>::Valtype dst_mask,
+ typename elfcpp::Valtype_base<fieldsize>::Valtype dst_mask,
Address value,
Overflow_check overflow)
{
- typedef typename elfcpp::Swap<valsize, big_endian>::Valtype Valtype;
+ typedef typename elfcpp::Swap<fieldsize, big_endian>::Valtype Valtype;
Valtype* wv = reinterpret_cast<Valtype*>(view);
- Valtype val = elfcpp::Swap<valsize, big_endian>::readval(wv);
+ Valtype val = elfcpp::Swap<fieldsize, big_endian>::readval(wv);
Valtype reloc = value >> right_shift;
val &= ~dst_mask;
reloc &= dst_mask;
- elfcpp::Swap<valsize, big_endian>::writeval(wv, val | reloc);
+ elfcpp::Swap<fieldsize, big_endian>::writeval(wv, val | reloc);
return overflowed<valsize>(value >> right_shift, overflow);
}
// Do a simple RELA relocation, unaligned.
- template<int valsize>
+ template<int fieldsize, int valsize>
static inline Status
rela_ua(unsigned char* view, Address value, Overflow_check overflow)
{
- elfcpp::Swap_unaligned<valsize, big_endian>::writeval(view, value);
+ elfcpp::Swap_unaligned<fieldsize, big_endian>::writeval(view, value);
return overflowed<valsize>(value, overflow);
}
- template<int valsize>
+ template<int fieldsize, int valsize>
static inline Status
rela_ua(unsigned char* view,
unsigned int right_shift,
- typename elfcpp::Valtype_base<valsize>::Valtype dst_mask,
+ typename elfcpp::Valtype_base<fieldsize>::Valtype dst_mask,
Address value,
Overflow_check overflow)
{
- typedef typename elfcpp::Swap_unaligned<valsize, big_endian>::Valtype
+ typedef typename elfcpp::Swap_unaligned<fieldsize, big_endian>::Valtype
Valtype;
- Valtype val = elfcpp::Swap<valsize, big_endian>::readval(view);
+ Valtype val = elfcpp::Swap<fieldsize, big_endian>::readval(view);
Valtype reloc = value >> right_shift;
val &= ~dst_mask;
reloc &= dst_mask;
- elfcpp::Swap_unaligned<valsize, big_endian>::writeval(view, val | reloc);
+ elfcpp::Swap_unaligned<fieldsize, big_endian>::writeval(view, val | reloc);
return overflowed<valsize>(value >> right_shift, overflow);
}
// R_PPC64_ADDR64: (Symbol + Addend)
static inline void
addr64(unsigned char* view, Address value)
- { This::template rela<64>(view, value, CHECK_NONE); }
+ { This::template rela<64,64>(view, value, CHECK_NONE); }
// R_PPC64_UADDR64: (Symbol + Addend) unaligned
static inline void
addr64_u(unsigned char* view, Address value)
- { This::template rela_ua<64>(view, value, CHECK_NONE); }
+ { This::template rela_ua<64,64>(view, value, CHECK_NONE); }
// R_POWERPC_ADDR32: (Symbol + Addend)
static inline Status
addr32(unsigned char* view, Address value, Overflow_check overflow)
- { return This::template rela<32>(view, value, overflow); }
+ { return This::template rela<32,32>(view, value, overflow); }
// R_POWERPC_UADDR32: (Symbol + Addend) unaligned
static inline Status
addr32_u(unsigned char* view, Address value, Overflow_check overflow)
- { return This::template rela_ua<32>(view, value, overflow); }
+ { return This::template rela_ua<32,32>(view, value, overflow); }
// R_POWERPC_ADDR24: (Symbol + Addend) & 0x3fffffc
static inline Status
addr24(unsigned char* view, Address value, Overflow_check overflow)
{
- Status stat = This::template rela<32>(view, 0, 0x03fffffc, value, overflow);
+ Status stat = This::template rela<32,26>(view, 0, 0x03fffffc,
+ value, overflow);
if (overflow != CHECK_NONE && (value & 3) != 0)
stat = STATUS_OVERFLOW;
return stat;
// R_POWERPC_ADDR16: (Symbol + Addend) & 0xffff
static inline Status
addr16(unsigned char* view, Address value, Overflow_check overflow)
- { return This::template rela<16>(view, value, overflow); }
+ { return This::template rela<16,16>(view, value, overflow); }
// R_POWERPC_ADDR16: (Symbol + Addend) & 0xffff, unaligned
static inline Status
addr16_u(unsigned char* view, Address value, Overflow_check overflow)
- { return This::template rela_ua<16>(view, value, overflow); }
+ { return This::template rela_ua<16,16>(view, value, overflow); }
// R_POWERPC_ADDR16_DS: (Symbol + Addend) & 0xfffc
static inline Status
addr16_ds(unsigned char* view, Address value, Overflow_check overflow)
{
- Status stat = This::template rela<16>(view, 0, 0xfffc, value, overflow);
- if (overflow != CHECK_NONE && (value & 3) != 0)
+ Status stat = This::template rela<16,16>(view, 0, 0xfffc, value, overflow);
+ if ((value & 3) != 0)
stat = STATUS_OVERFLOW;
return stat;
}
// R_POWERPC_ADDR16_HI: ((Symbol + Addend) >> 16) & 0xffff
static inline void
addr16_hi(unsigned char* view, Address value)
- { This::template rela<16>(view, 16, 0xffff, value, CHECK_NONE); }
+ { This::template rela<16,16>(view, 16, 0xffff, value, CHECK_NONE); }
// R_POWERPC_ADDR16_HA: ((Symbol + Addend + 0x8000) >> 16) & 0xffff
static inline void
// R_POWERPC_ADDR16_HIGHER: ((Symbol + Addend) >> 32) & 0xffff
static inline void
addr16_hi2(unsigned char* view, Address value)
- { This::template rela<16>(view, 32, 0xffff, value, CHECK_NONE); }
+ { This::template rela<16,16>(view, 32, 0xffff, value, CHECK_NONE); }
// R_POWERPC_ADDR16_HIGHERA: ((Symbol + Addend + 0x8000) >> 32) & 0xffff
static inline void
// R_POWERPC_ADDR16_HIGHEST: ((Symbol + Addend) >> 48) & 0xffff
static inline void
addr16_hi3(unsigned char* view, Address value)
- { This::template rela<16>(view, 48, 0xffff, value, CHECK_NONE); }
+ { This::template rela<16,16>(view, 48, 0xffff, value, CHECK_NONE); }
// R_POWERPC_ADDR16_HIGHESTA: ((Symbol + Addend + 0x8000) >> 48) & 0xffff
static inline void
static inline Status
addr14(unsigned char* view, Address value, Overflow_check overflow)
{
- Status stat = This::template rela<32>(view, 0, 0xfffc, value, overflow);
+ Status stat = This::template rela<32,16>(view, 0, 0xfffc, value, overflow);
if (overflow != CHECK_NONE && (value & 3) != 0)
stat = STATUS_OVERFLOW;
return stat;
void
Powerpc_relobj<size, big_endian>::do_read_symbols(Read_symbols_data* sd)
{
- Sized_relobj_file<size, big_endian>::do_read_symbols(sd);
+ this->base_read_symbols(sd);
if (size == 64)
{
const int shdr_size = elfcpp::Elf_sizes<size>::shdr_size;
}
}
-// Call Sized_dynobj::do_read_symbols to read the symbols then
+// Call Sized_dynobj::base_read_symbols to read the symbols then
// read .opd from a dynamic object, filling in opd_ent_ vector,
template<int size, bool big_endian>
void
Powerpc_dynobj<size, big_endian>::do_read_symbols(Read_symbols_data* sd)
{
- Sized_dynobj<size, big_endian>::do_read_symbols(sd);
+ this->base_read_symbols(sd);
if (size == 64)
{
const int shdr_size = elfcpp::Elf_sizes<size>::shdr_size;
// value of the parameter --stub-group-size. If --stub-group-size
// is passed a negative value, we restrict stubs to be always before
// the stubbed branches.
- Stub_control(int32_t size)
+ Stub_control(int32_t size, bool no_size_errors)
: state_(NO_GROUP), stub_group_size_(abs(size)),
- stub14_group_size_(abs(size)),
- stubs_always_before_branch_(size < 0), suppress_size_errors_(false),
+ stub14_group_size_(abs(size) >> 10),
+ stubs_always_before_branch_(size < 0),
+ suppress_size_errors_(no_size_errors),
group_end_addr_(0), owner_(NULL), output_section_(NULL)
{
- if (stub_group_size_ == 1)
- {
- // Default values.
- if (stubs_always_before_branch_)
- {
- stub_group_size_ = 0x1e00000;
- stub14_group_size_ = 0x7800;
- }
- else
- {
- stub_group_size_ = 0x1c00000;
- stub14_group_size_ = 0x7000;
- }
- suppress_size_errors_ = true;
- }
}
// Return true iff input section can be handled by current stub
output_section()
{ return output_section_; }
+ void
+ set_output_and_owner(Output_section* o,
+ const Output_section::Input_section* i)
+ {
+ this->output_section_ = o;
+ this->owner_ = i;
+ }
+
private:
typedef enum
{
template<int size, bool big_endian>
void
Target_powerpc<size, big_endian>::group_sections(Layout* layout,
- const Task*)
+ const Task*,
+ bool no_size_errors)
{
- Stub_control stub_control(parameters->options().stub_group_size());
+ Stub_control stub_control(this->stub_group_size_, no_size_errors);
// Group input sections and insert stub table
- Stub_table<size, big_endian>* stub_table = NULL;
+ Stub_table_owner* table_owner = NULL;
+ std::vector<Stub_table_owner*> tables;
Layout::Section_list section_list;
layout->get_executable_sections(§ion_list);
std::stable_sort(section_list.begin(), section_list.end(), Sort_sections());
i != (*o)->input_sections().rend();
++i)
{
- if (i->is_input_section())
+ if (i->is_input_section()
+ || i->is_relaxed_input_section())
{
Powerpc_relobj<size, big_endian>* ppcobj = static_cast
<Powerpc_relobj<size, big_endian>*>(i->relobj());
bool has14 = ppcobj->has_14bit_branch(i->shndx());
if (!stub_control.can_add_to_stub_group(*o, &*i, has14))
{
- stub_table->init(stub_control.owner(),
- stub_control.output_section());
- stub_table = NULL;
+ table_owner->output_section = stub_control.output_section();
+ table_owner->owner = stub_control.owner();
+ stub_control.set_output_and_owner(*o, &*i);
+ table_owner = NULL;
+ }
+ if (table_owner == NULL)
+ {
+ table_owner = new Stub_table_owner;
+ tables.push_back(table_owner);
}
- if (stub_table == NULL)
- stub_table = this->new_stub_table();
- ppcobj->set_stub_table(i->shndx(), stub_table);
+ ppcobj->set_stub_table(i->shndx(), tables.size() - 1);
}
}
}
- if (stub_table != NULL)
+ if (table_owner != NULL)
{
const Output_section::Input_section* i = stub_control.owner();
- if (!i->is_input_section())
+
+ if (tables.size() >= 2 && tables[tables.size() - 2]->owner == i)
{
// Corner case. A new stub group was made for the first
// section (last one looked at here) for some reason, but
// the first section is already being used as the owner for
// a stub table for following sections. Force it into that
// stub group.
- gold_assert(this->stub_tables_.size() >= 2);
- this->stub_tables_.pop_back();
- delete stub_table;
+ tables.pop_back();
+ delete table_owner;
Powerpc_relobj<size, big_endian>* ppcobj = static_cast
<Powerpc_relobj<size, big_endian>*>(i->relobj());
- ppcobj->set_stub_table(i->shndx(), this->stub_tables_.back());
+ ppcobj->set_stub_table(i->shndx(), tables.size() - 1);
+ }
+ else
+ {
+ table_owner->output_section = stub_control.output_section();
+ table_owner->owner = i;
}
+ }
+ for (typename std::vector<Stub_table_owner*>::iterator t = tables.begin();
+ t != tables.end();
+ ++t)
+ {
+ Stub_table<size, big_endian>* stub_table;
+
+ if ((*t)->owner->is_input_section())
+ stub_table = new Stub_table<size, big_endian>(this,
+ (*t)->output_section,
+ (*t)->owner);
+ else if ((*t)->owner->is_relaxed_input_section())
+ stub_table = static_cast<Stub_table<size, big_endian>*>(
+ (*t)->owner->relaxed_input_section());
else
- stub_table->init(i, stub_control.output_section());
+ gold_unreachable();
+ this->stub_tables_.push_back(stub_table);
+ delete *t;
}
}
+static unsigned long
+max_branch_delta (unsigned int r_type)
+{
+ if (r_type == elfcpp::R_POWERPC_REL14
+ || r_type == elfcpp::R_POWERPC_REL14_BRTAKEN
+ || r_type == elfcpp::R_POWERPC_REL14_BRNTAKEN)
+ return 1L << 15;
+ if (r_type == elfcpp::R_POWERPC_REL24
+ || r_type == elfcpp::R_PPC_PLTREL24
+ || r_type == elfcpp::R_PPC_LOCAL24PC)
+ return 1L << 25;
+ return 0;
+}
+
// If this branch needs a plt call stub, or a long branch stub, make one.
template<int size, bool big_endian>
-void
+bool
Target_powerpc<size, big_endian>::Branch_info::make_stub(
Stub_table<size, big_endian>* stub_table,
Stub_table<size, big_endian>* ifunc_stub_table,
if (sym != NULL && sym->is_forwarder())
sym = symtab->resolve_forwards(sym);
const Sized_symbol<size>* gsym = static_cast<const Sized_symbol<size>*>(sym);
+ Target_powerpc<size, big_endian>* target =
+ static_cast<Target_powerpc<size, big_endian>*>(
+ parameters->sized_target<size, big_endian>());
if (gsym != NULL
- ? use_plt_offset<size>(gsym, Scan::get_reference_flags(this->r_type_))
+ ? gsym->use_plt_offset(Scan::get_reference_flags(this->r_type_, target))
: this->object_->local_has_plt_offset(this->r_sym_))
{
- if (stub_table == NULL)
- stub_table = this->object_->stub_table(this->shndx_);
- if (stub_table == NULL)
+ if (size == 64
+ && gsym != NULL
+ && target->abiversion() >= 2
+ && !parameters->options().output_is_position_independent()
+ && !is_branch_reloc(this->r_type_))
+ target->glink_section()->add_global_entry(gsym);
+ else
{
- // This is a ref from a data section to an ifunc symbol.
- stub_table = ifunc_stub_table;
+ if (stub_table == NULL)
+ stub_table = this->object_->stub_table(this->shndx_);
+ if (stub_table == NULL)
+ {
+ // This is a ref from a data section to an ifunc symbol.
+ stub_table = ifunc_stub_table;
+ }
+ gold_assert(stub_table != NULL);
+ Address from = this->object_->get_output_section_offset(this->shndx_);
+ if (from != invalid_address)
+ from += (this->object_->output_section(this->shndx_)->address()
+ + this->offset_);
+ if (gsym != NULL)
+ return stub_table->add_plt_call_entry(from,
+ this->object_, gsym,
+ this->r_type_, this->addend_);
+ else
+ return stub_table->add_plt_call_entry(from,
+ this->object_, this->r_sym_,
+ this->r_type_, this->addend_);
}
- gold_assert(stub_table != NULL);
- if (gsym != NULL)
- stub_table->add_plt_call_entry(this->object_, gsym,
- this->r_type_, this->addend_);
- else
- stub_table->add_plt_call_entry(this->object_, this->r_sym_,
- this->r_type_, this->addend_);
}
else
{
- unsigned long max_branch_offset;
- if (this->r_type_ == elfcpp::R_POWERPC_REL14
- || this->r_type_ == elfcpp::R_POWERPC_REL14_BRTAKEN
- || this->r_type_ == elfcpp::R_POWERPC_REL14_BRNTAKEN)
- max_branch_offset = 1 << 15;
- else if (this->r_type_ == elfcpp::R_POWERPC_REL24
- || this->r_type_ == elfcpp::R_PPC_PLTREL24
- || this->r_type_ == elfcpp::R_PPC_LOCAL24PC)
- max_branch_offset = 1 << 25;
- else
- return;
+ Address max_branch_offset = max_branch_delta(this->r_type_);
+ if (max_branch_offset == 0)
+ return true;
Address from = this->object_->get_output_section_offset(this->shndx_);
gold_assert(from != invalid_address);
from += (this->object_->output_section(this->shndx_)->address()
Object* symobj = gsym->object();
if (symobj->is_dynamic()
|| symobj->pluginobj() != NULL)
- return;
+ return true;
bool is_ordinary;
unsigned int shndx = gsym->shndx(&is_ordinary);
if (shndx == elfcpp::SHN_UNDEF)
- return;
+ return true;
}
break;
case Symbol::IS_UNDEFINED:
- return;
+ return true;
default:
break;
Symbol_table::Compute_final_value_status status;
to = symtab->compute_final_value<size>(gsym, &status);
if (status != Symbol_table::CFVS_OK)
- return;
- to += this->object_->ppc64_local_entry_offset(gsym);
+ return true;
+ if (size == 64)
+ to += this->object_->ppc64_local_entry_offset(gsym);
}
else
{
&symval, symtab);
if (status != ObjType::CFLV_OK
|| !symval.has_output_value())
- return;
+ return true;
to = symval.value(this->object_, 0);
- to += this->object_->ppc64_local_entry_offset(this->r_sym_);
+ if (size == 64)
+ to += this->object_->ppc64_local_entry_offset(this->r_sym_);
}
- to += this->addend_;
+ if (!(size == 32 && this->r_type_ == elfcpp::R_PPC_PLTREL24))
+ to += this->addend_;
if (stub_table == NULL)
stub_table = this->object_->stub_table(this->shndx_);
- if (size == 64 && is_branch_reloc(this->r_type_))
+ if (size == 64 && target->abiversion() < 2)
{
unsigned int dest_shndx;
- Target_powerpc<size, big_endian>* target =
- static_cast<Target_powerpc<size, big_endian>*>(
- parameters->sized_target<size, big_endian>());
- to = target->symval_for_branch(symtab, to, gsym,
- this->object_, &dest_shndx);
+ if (!target->symval_for_branch(symtab, gsym, this->object_,
+ &to, &dest_shndx))
+ return true;
}
Address delta = to - from;
if (delta + max_branch_offset >= 2 * max_branch_offset)
" no long branch stub for you"),
this->object_->name().c_str(),
this->object_->section_name(this->shndx_).c_str());
- return;
+ return true;
}
- stub_table->add_long_branch_entry(this->object_, to);
+ return stub_table->add_long_branch_entry(this->object_,
+ this->r_type_, from, to);
}
}
+ return true;
}
// Relaxation hook. This is where we do stub generation.
/* libanl */
"getaddrinfo_a",
/* libgomp */
+ "GOMP_parallel",
"GOMP_parallel_start",
+ "GOMP_parallel_loop_static",
"GOMP_parallel_loop_static_start",
+ "GOMP_parallel_loop_dynamic",
"GOMP_parallel_loop_dynamic_start",
+ "GOMP_parallel_loop_guided",
"GOMP_parallel_loop_guided_start",
+ "GOMP_parallel_loop_runtime",
"GOMP_parallel_loop_runtime_start",
+ "GOMP_parallel_sections",
"GOMP_parallel_sections_start",
+ /* libgo */
+ "__go_go",
};
if (parameters->options().shared())
}
}
this->plt_thread_safe_ = thread_safe;
- this->group_sections(layout, task);
+ }
+
+ if (pass == 1)
+ {
+ this->stub_group_size_ = parameters->options().stub_group_size();
+ bool no_size_errors = true;
+ if (this->stub_group_size_ == 1)
+ this->stub_group_size_ = 0x1c00000;
+ else if (this->stub_group_size_ == -1)
+ this->stub_group_size_ = -0x1e00000;
+ else
+ no_size_errors = false;
+ this->group_sections(layout, task, no_size_errors);
+ }
+ else if (this->relax_failed_ && this->relax_fail_count_ < 3)
+ {
+ this->branch_lookup_table_.clear();
+ for (typename Stub_tables::iterator p = this->stub_tables_.begin();
+ p != this->stub_tables_.end();
+ ++p)
+ {
+ (*p)->clear_stubs(true);
+ }
+ this->stub_tables_.clear();
+ this->stub_group_size_ = this->stub_group_size_ / 4 * 3;
+ gold_info(_("%s: stub group size is too large; retrying with %d"),
+ program_name, this->stub_group_size_);
+ this->group_sections(layout, task, true);
}
// We need address of stub tables valid for make_stub.
p != this->stub_tables_.end();
++p)
{
- (*p)->clear_stubs();
+ (*p)->clear_stubs(false);
}
}
// Build all the stubs.
+ this->relax_failed_ = false;
Stub_table<size, big_endian>* ifunc_stub_table
= this->stub_tables_.size() == 0 ? NULL : this->stub_tables_[0];
Stub_table<size, big_endian>* one_stub_table
b != this->branch_info_.end();
b++)
{
- b->make_stub(one_stub_table, ifunc_stub_table, symtab);
+ if (!b->make_stub(one_stub_table, ifunc_stub_table, symtab)
+ && !this->relax_failed_)
+ {
+ this->relax_failed_ = true;
+ this->relax_fail_count_++;
+ if (this->relax_fail_count_ < 3)
+ return true;
+ }
}
// Did anything change size?
if (plt == this->glink_)
{
// See Output_data_glink::do_write() for glink contents.
- if (size == 64)
+ if (len == 0)
+ {
+ gold_assert(parameters->doing_static_link());
+ // Static linking may need stubs, to support ifunc and long
+ // branches. We need to create an output section for
+ // .eh_frame early in the link process, to have a place to
+ // attach stub .eh_frame info. We also need to have
+ // registered a CIE that matches the stub CIE. Both of
+ // these requirements are satisfied by creating an FDE and
+ // CIE for .glink, even though static linking will leave
+ // .glink zero length.
+ // ??? Hopefully generating an FDE with a zero address range
+ // won't confuse anything that consumes .eh_frame info.
+ }
+ else if (size == 64)
{
// There is one word before __glink_PLTresolve
address += 8;
// The first covers the branch table, the second
// __glink_PLTresolve at the end of glink.
off_t resolve_size = this->glink_->pltresolve_size;
- if (oview[9] == 0)
+ if (oview[9] == elfcpp::DW_CFA_nop)
len -= resolve_size;
else
{
static const uint32_t addi_2_2 = 0x38420000;
static const uint32_t addi_3_3 = 0x38630000;
static const uint32_t addi_11_11 = 0x396b0000;
+static const uint32_t addi_12_1 = 0x39810000;
static const uint32_t addi_12_12 = 0x398c0000;
static const uint32_t addis_0_2 = 0x3c020000;
static const uint32_t addis_0_13 = 0x3c0d0000;
-static const uint32_t addis_3_2 = 0x3c620000;
-static const uint32_t addis_3_13 = 0x3c6d0000;
+static const uint32_t addis_2_12 = 0x3c4c0000;
static const uint32_t addis_11_2 = 0x3d620000;
static const uint32_t addis_11_11 = 0x3d6b0000;
static const uint32_t addis_11_30 = 0x3d7e0000;
+static const uint32_t addis_12_1 = 0x3d810000;
+static const uint32_t addis_12_2 = 0x3d820000;
static const uint32_t addis_12_12 = 0x3d8c0000;
static const uint32_t b = 0x48000000;
static const uint32_t bcl_20_31 = 0x429f0005;
static const uint32_t bctr = 0x4e800420;
static const uint32_t blr = 0x4e800020;
static const uint32_t bnectr_p4 = 0x4ce20420;
+static const uint32_t cmpld_7_12_0 = 0x7fac0040;
static const uint32_t cmpldi_2_0 = 0x28220000;
static const uint32_t cror_15_15_15 = 0x4def7b82;
static const uint32_t cror_31_31_31 = 0x4ffffb82;
static const uint32_t ld_11_11 = 0xe96b0000;
static const uint32_t ld_12_2 = 0xe9820000;
static const uint32_t ld_12_11 = 0xe98b0000;
+static const uint32_t ld_12_12 = 0xe98c0000;
static const uint32_t lfd_0_1 = 0xc8010000;
static const uint32_t li_0_0 = 0x38000000;
static const uint32_t li_12_0 = 0x39800000;
-static const uint32_t lis_0_0 = 0x3c000000;
+static const uint32_t lis_0 = 0x3c000000;
static const uint32_t lis_11 = 0x3d600000;
static const uint32_t lis_12 = 0x3d800000;
static const uint32_t lvx_0_12_0 = 0x7c0c00ce;
typedef typename elfcpp::Elf_types<size>::Elf_Addr Address;
static const Address invalid_address = static_cast<Address>(0) - 1;
- Stub_table(Target_powerpc<size, big_endian>* targ)
- : Output_relaxed_input_section(NULL, 0, 0),
+ Stub_table(Target_powerpc<size, big_endian>* targ,
+ Output_section* output_section,
+ const Output_section::Input_section* owner)
+ : Output_relaxed_input_section(owner->relobj(), owner->shndx(),
+ owner->relobj()
+ ->section_addralign(owner->shndx())),
targ_(targ), plt_call_stubs_(), long_branch_stubs_(),
- orig_data_size_(0), plt_size_(0), last_plt_size_(0),
+ orig_data_size_(owner->current_data_size()),
+ plt_size_(0), last_plt_size_(0),
branch_size_(0), last_branch_size_(0), eh_frame_added_(false)
- { }
+ {
+ this->set_output_section(output_section);
- // Delayed Output_relaxed_input_section init.
- void
- init(const Output_section::Input_section*, Output_section*);
+ std::vector<Output_relaxed_input_section*> new_relaxed;
+ new_relaxed.push_back(this);
+ output_section->convert_input_sections_to_relaxed_sections(new_relaxed);
+ }
// Add a plt call stub.
- void
- add_plt_call_entry(const Sized_relobj_file<size, big_endian>*,
+ bool
+ add_plt_call_entry(Address,
+ const Sized_relobj_file<size, big_endian>*,
const Symbol*,
unsigned int,
Address);
- void
- add_plt_call_entry(const Sized_relobj_file<size, big_endian>*,
+ bool
+ add_plt_call_entry(Address,
+ const Sized_relobj_file<size, big_endian>*,
unsigned int,
unsigned int,
Address);
Address) const;
// Add a long branch stub.
- void
- add_long_branch_entry(const Powerpc_relobj<size, big_endian>*, Address);
+ bool
+ add_long_branch_entry(const Powerpc_relobj<size, big_endian>*,
+ unsigned int, Address, Address);
Address
find_long_branch_entry(const Powerpc_relobj<size, big_endian>*,
Address) const;
+ bool
+ can_reach_stub(Address from, unsigned int off, unsigned int r_type)
+ {
+ Address max_branch_offset = max_branch_delta(r_type);
+ if (max_branch_offset == 0)
+ return true;
+ gold_assert(from != invalid_address);
+ Address loc = off + this->stub_address();
+ return loc - from + max_branch_offset < 2 * max_branch_offset;
+ }
+
void
- clear_stubs()
+ clear_stubs(bool all)
{
this->plt_call_stubs_.clear();
this->plt_size_ = 0;
this->long_branch_stubs_.clear();
this->branch_size_ = 0;
+ if (all)
+ {
+ this->last_plt_size_ = 0;
+ this->last_branch_size_ = 0;
+ }
}
Address
bool eh_frame_added_;
};
-// Make a new stub table, and record.
-
-template<int size, bool big_endian>
-Stub_table<size, big_endian>*
-Target_powerpc<size, big_endian>::new_stub_table()
-{
- Stub_table<size, big_endian>* stub_table
- = new Stub_table<size, big_endian>(this);
- this->stub_tables_.push_back(stub_table);
- return stub_table;
-}
-
-// Delayed stub table initialisation, because we create the stub table
-// before we know to which section it will be attached.
-
-template<int size, bool big_endian>
-void
-Stub_table<size, big_endian>::init(
- const Output_section::Input_section* owner,
- Output_section* output_section)
-{
- this->set_relobj(owner->relobj());
- this->set_shndx(owner->shndx());
- this->set_addralign(this->relobj()->section_addralign(this->shndx()));
- this->set_output_section(output_section);
- this->orig_data_size_ = owner->current_data_size();
-
- std::vector<Output_relaxed_input_section*> new_relaxed;
- new_relaxed.push_back(this);
- output_section->convert_input_sections_to_relaxed_sections(new_relaxed);
-}
-
// Add a plt call stub, if we do not already have one for this
// sym/object/addend combo.
template<int size, bool big_endian>
-void
+bool
Stub_table<size, big_endian>::add_plt_call_entry(
+ Address from,
const Sized_relobj_file<size, big_endian>* object,
const Symbol* gsym,
unsigned int r_type,
Address addend)
{
Plt_stub_ent ent(object, gsym, r_type, addend);
- Address off = this->plt_size_;
+ unsigned int off = this->plt_size_;
std::pair<typename Plt_stub_entries::iterator, bool> p
= this->plt_call_stubs_.insert(std::make_pair(ent, off));
if (p.second)
this->plt_size_ = off + this->plt_call_size(p.first);
+ return this->can_reach_stub(from, off, r_type);
}
template<int size, bool big_endian>
-void
+bool
Stub_table<size, big_endian>::add_plt_call_entry(
+ Address from,
const Sized_relobj_file<size, big_endian>* object,
unsigned int locsym_index,
unsigned int r_type,
Address addend)
{
Plt_stub_ent ent(object, locsym_index, r_type, addend);
- Address off = this->plt_size_;
+ unsigned int off = this->plt_size_;
std::pair<typename Plt_stub_entries::iterator, bool> p
= this->plt_call_stubs_.insert(std::make_pair(ent, off));
if (p.second)
this->plt_size_ = off + this->plt_call_size(p.first);
+ return this->can_reach_stub(from, off, r_type);
}
// Find a plt call stub.
// destination.
template<int size, bool big_endian>
-void
+bool
Stub_table<size, big_endian>::add_long_branch_entry(
const Powerpc_relobj<size, big_endian>* object,
+ unsigned int r_type,
+ Address from,
Address to)
{
Branch_stub_ent ent(object, to);
if (size == 64 && stub_size != 4)
this->targ_->add_branch_lookup_table(to);
}
+ return this->can_reach_stub(from, off, r_type);
}
// Find long branch stub.
class Output_data_glink : public Output_section_data
{
public:
+ typedef typename elfcpp::Elf_types<size>::Elf_Addr Address;
+ static const Address invalid_address = static_cast<Address>(0) - 1;
static const int pltresolve_size = 16*4;
Output_data_glink(Target_powerpc<size, big_endian>* targ)
- : Output_section_data(16), targ_(targ)
+ : Output_section_data(16), targ_(targ), global_entry_stubs_(),
+ end_branch_table_(), ge_size_(0)
{ }
void
- add_eh_frame(Layout* layout)
- {
- if (!parameters->options().ld_generated_unwind_info())
- return;
+ add_eh_frame(Layout* layout);
- if (size == 64)
- {
- if (this->targ_->abiversion() < 2)
- layout->add_eh_frame_for_plt(this,
- Eh_cie<64>::eh_frame_cie,
- sizeof (Eh_cie<64>::eh_frame_cie),
- glink_eh_frame_fde_64v1,
- sizeof (glink_eh_frame_fde_64v1));
- else
- layout->add_eh_frame_for_plt(this,
- Eh_cie<64>::eh_frame_cie,
- sizeof (Eh_cie<64>::eh_frame_cie),
- glink_eh_frame_fde_64v2,
- sizeof (glink_eh_frame_fde_64v2));
- }
- else
- {
- // 32-bit .glink can use the default since the CIE return
- // address reg, LR, is valid.
- layout->add_eh_frame_for_plt(this,
- Eh_cie<32>::eh_frame_cie,
- sizeof (Eh_cie<32>::eh_frame_cie),
- default_fde,
- sizeof (default_fde));
- // Except where LR is used in a PIC __glink_PLTresolve.
- if (parameters->options().output_is_position_independent())
- layout->add_eh_frame_for_plt(this,
- Eh_cie<32>::eh_frame_cie,
- sizeof (Eh_cie<32>::eh_frame_cie),
- glink_eh_frame_fde_32,
- sizeof (glink_eh_frame_fde_32));
- }
+ void
+ add_global_entry(const Symbol*);
+
+ Address
+ find_global_entry(const Symbol*) const;
+
+ Address
+ global_entry_address() const
+ {
+ gold_assert(this->is_data_size_valid());
+ unsigned int global_entry_off = (this->end_branch_table_ + 15) & -16;
+ return this->address() + global_entry_off;
}
protected:
// Allows access to .got and .plt for do_write.
Target_powerpc<size, big_endian>* targ_;
+
+ // Map sym to stub offset.
+ typedef Unordered_map<const Symbol*, unsigned int> Global_entry_stub_entries;
+ Global_entry_stub_entries global_entry_stubs_;
+
+ unsigned int end_branch_table_, ge_size_;
};
+template<int size, bool big_endian>
+void
+Output_data_glink<size, big_endian>::add_eh_frame(Layout* layout)
+{
+ if (!parameters->options().ld_generated_unwind_info())
+ return;
+
+ if (size == 64)
+ {
+ if (this->targ_->abiversion() < 2)
+ layout->add_eh_frame_for_plt(this,
+ Eh_cie<64>::eh_frame_cie,
+ sizeof (Eh_cie<64>::eh_frame_cie),
+ glink_eh_frame_fde_64v1,
+ sizeof (glink_eh_frame_fde_64v1));
+ else
+ layout->add_eh_frame_for_plt(this,
+ Eh_cie<64>::eh_frame_cie,
+ sizeof (Eh_cie<64>::eh_frame_cie),
+ glink_eh_frame_fde_64v2,
+ sizeof (glink_eh_frame_fde_64v2));
+ }
+ else
+ {
+ // 32-bit .glink can use the default since the CIE return
+ // address reg, LR, is valid.
+ layout->add_eh_frame_for_plt(this,
+ Eh_cie<32>::eh_frame_cie,
+ sizeof (Eh_cie<32>::eh_frame_cie),
+ default_fde,
+ sizeof (default_fde));
+ // Except where LR is used in a PIC __glink_PLTresolve.
+ if (parameters->options().output_is_position_independent())
+ layout->add_eh_frame_for_plt(this,
+ Eh_cie<32>::eh_frame_cie,
+ sizeof (Eh_cie<32>::eh_frame_cie),
+ glink_eh_frame_fde_32,
+ sizeof (glink_eh_frame_fde_32));
+ }
+}
+
+template<int size, bool big_endian>
+void
+Output_data_glink<size, big_endian>::add_global_entry(const Symbol* gsym)
+{
+ std::pair<typename Global_entry_stub_entries::iterator, bool> p
+ = this->global_entry_stubs_.insert(std::make_pair(gsym, this->ge_size_));
+ if (p.second)
+ this->ge_size_ += 16;
+}
+
+template<int size, bool big_endian>
+typename Output_data_glink<size, big_endian>::Address
+Output_data_glink<size, big_endian>::find_global_entry(const Symbol* gsym) const
+{
+ typename Global_entry_stub_entries::const_iterator p
+ = this->global_entry_stubs_.find(gsym);
+ return p == this->global_entry_stubs_.end() ? invalid_address : p->second;
+}
+
template<int size, bool big_endian>
void
Output_data_glink<size, big_endian>::set_final_data_size()
}
}
}
+ this->end_branch_table_ = total;
+ total = (total + 15) & -16;
+ total += this->ge_size_;
this->set_data_size(total);
}
{
write_insn<big_endian>(p, std_2_1 + this->targ_->stk_toc());
p += 4;
- write_insn<big_endian>(p, addis_11_2 + ha(off));
- p += 4;
- write_insn<big_endian>(p, ld_12_11 + l(off));
- p += 4;
+ if (plt_load_toc)
+ {
+ write_insn<big_endian>(p, addis_11_2 + ha(off));
+ p += 4;
+ write_insn<big_endian>(p, ld_12_11 + l(off));
+ p += 4;
+ }
+ else
+ {
+ write_insn<big_endian>(p, addis_12_2 + ha(off));
+ p += 4;
+ write_insn<big_endian>(p, ld_12_12 + l(off));
+ p += 4;
+ }
if (plt_load_toc
&& ha(off + 8 + 8 * static_chain) != ha(off))
{
}
else
{
- write_insn<big_endian>(p, addis_11_2 + ha(brltoff)), p += 4;
- write_insn<big_endian>(p, ld_12_11 + l(brltoff)), p += 4;
+ write_insn<big_endian>(p, addis_12_2 + ha(brltoff)), p += 4;
+ write_insn<big_endian>(p, ld_12_12 + l(brltoff)), p += 4;
}
write_insn<big_endian>(p, mtctr_12), p += 4;
write_insn<big_endian>(p, bctr);
if (size == 64)
{
- // Write pltresolve stub.
- p = oview;
- Address after_bcl = this->address() + 16;
- Address pltoff = plt_base - after_bcl;
-
- elfcpp::Swap<64, big_endian>::writeval(p, pltoff), p += 8;
-
- if (this->targ_->abiversion() < 2)
+ if (this->end_branch_table_ != 0)
{
- write_insn<big_endian>(p, mflr_12), p += 4;
- write_insn<big_endian>(p, bcl_20_31), p += 4;
- write_insn<big_endian>(p, mflr_11), p += 4;
- write_insn<big_endian>(p, ld_2_11 + l(-16)), p += 4;
- write_insn<big_endian>(p, mtlr_12), p += 4;
- write_insn<big_endian>(p, add_11_2_11), p += 4;
- write_insn<big_endian>(p, ld_12_11 + 0), p += 4;
- write_insn<big_endian>(p, ld_2_11 + 8), p += 4;
- write_insn<big_endian>(p, mtctr_12), p += 4;
- write_insn<big_endian>(p, ld_11_11 + 16), p += 4;
- }
- else
- {
- write_insn<big_endian>(p, mflr_0), p += 4;
- write_insn<big_endian>(p, bcl_20_31), p += 4;
- write_insn<big_endian>(p, mflr_11), p += 4;
- write_insn<big_endian>(p, ld_2_11 + l(-16)), p += 4;
- write_insn<big_endian>(p, mtlr_0), p += 4;
- write_insn<big_endian>(p, sub_12_12_11), p += 4;
- write_insn<big_endian>(p, add_11_2_11), p += 4;
- write_insn<big_endian>(p, addi_0_12 + l(-48)), p += 4;
- write_insn<big_endian>(p, ld_12_11 + 0), p += 4;
- write_insn<big_endian>(p, srdi_0_0_2), p += 4;
- write_insn<big_endian>(p, mtctr_12), p += 4;
- write_insn<big_endian>(p, ld_11_11 + 8), p += 4;
- }
- write_insn<big_endian>(p, bctr), p += 4;
- while (p < oview + this->pltresolve_size)
- write_insn<big_endian>(p, nop), p += 4;
+ // Write pltresolve stub.
+ p = oview;
+ Address after_bcl = this->address() + 16;
+ Address pltoff = plt_base - after_bcl;
+
+ elfcpp::Swap<64, big_endian>::writeval(p, pltoff), p += 8;
- // Write lazy link call stubs.
- uint32_t indx = 0;
- while (p < oview + oview_size)
- {
if (this->targ_->abiversion() < 2)
{
- if (indx < 0x8000)
- {
- write_insn<big_endian>(p, li_0_0 + indx), p += 4;
- }
- else
+ write_insn<big_endian>(p, mflr_12), p += 4;
+ write_insn<big_endian>(p, bcl_20_31), p += 4;
+ write_insn<big_endian>(p, mflr_11), p += 4;
+ write_insn<big_endian>(p, ld_2_11 + l(-16)), p += 4;
+ write_insn<big_endian>(p, mtlr_12), p += 4;
+ write_insn<big_endian>(p, add_11_2_11), p += 4;
+ write_insn<big_endian>(p, ld_12_11 + 0), p += 4;
+ write_insn<big_endian>(p, ld_2_11 + 8), p += 4;
+ write_insn<big_endian>(p, mtctr_12), p += 4;
+ write_insn<big_endian>(p, ld_11_11 + 16), p += 4;
+ }
+ else
+ {
+ write_insn<big_endian>(p, mflr_0), p += 4;
+ write_insn<big_endian>(p, bcl_20_31), p += 4;
+ write_insn<big_endian>(p, mflr_11), p += 4;
+ write_insn<big_endian>(p, ld_2_11 + l(-16)), p += 4;
+ write_insn<big_endian>(p, mtlr_0), p += 4;
+ write_insn<big_endian>(p, sub_12_12_11), p += 4;
+ write_insn<big_endian>(p, add_11_2_11), p += 4;
+ write_insn<big_endian>(p, addi_0_12 + l(-48)), p += 4;
+ write_insn<big_endian>(p, ld_12_11 + 0), p += 4;
+ write_insn<big_endian>(p, srdi_0_0_2), p += 4;
+ write_insn<big_endian>(p, mtctr_12), p += 4;
+ write_insn<big_endian>(p, ld_11_11 + 8), p += 4;
+ }
+ write_insn<big_endian>(p, bctr), p += 4;
+ while (p < oview + this->pltresolve_size)
+ write_insn<big_endian>(p, nop), p += 4;
+
+ // Write lazy link call stubs.
+ uint32_t indx = 0;
+ while (p < oview + this->end_branch_table_)
+ {
+ if (this->targ_->abiversion() < 2)
{
- write_insn<big_endian>(p, lis_0_0 + hi(indx)), p += 4;
- write_insn<big_endian>(p, ori_0_0_0 + l(indx)), p += 4;
+ if (indx < 0x8000)
+ {
+ write_insn<big_endian>(p, li_0_0 + indx), p += 4;
+ }
+ else
+ {
+ write_insn<big_endian>(p, lis_0 + hi(indx)), p += 4;
+ write_insn<big_endian>(p, ori_0_0_0 + l(indx)), p += 4;
+ }
}
+ uint32_t branch_off = 8 - (p - oview);
+ write_insn<big_endian>(p, b + (branch_off & 0x3fffffc)), p += 4;
+ indx++;
}
- uint32_t branch_off = 8 - (p - oview);
- write_insn<big_endian>(p, b + (branch_off & 0x3fffffc)), p += 4;
- indx++;
+ }
+
+ Address plt_base = this->targ_->plt_section()->address();
+ Address iplt_base = invalid_address;
+ unsigned int global_entry_off = (this->end_branch_table_ + 15) & -16;
+ Address global_entry_base = this->address() + global_entry_off;
+ typename Global_entry_stub_entries::const_iterator ge;
+ for (ge = this->global_entry_stubs_.begin();
+ ge != this->global_entry_stubs_.end();
+ ++ge)
+ {
+ p = oview + global_entry_off + ge->second;
+ Address plt_addr = ge->first->plt_offset();
+ if (ge->first->type() == elfcpp::STT_GNU_IFUNC
+ && ge->first->can_use_relative_reloc(false))
+ {
+ if (iplt_base == invalid_address)
+ iplt_base = this->targ_->iplt_section()->address();
+ plt_addr += iplt_base;
+ }
+ else
+ plt_addr += plt_base;
+ Address my_addr = global_entry_base + ge->second;
+ Address off = plt_addr - my_addr;
+
+ if (off + 0x80008000 > 0xffffffff || (off & 3) != 0)
+ gold_error(_("%s: linkage table error against `%s'"),
+ ge->first->object()->name().c_str(),
+ ge->first->demangled_name().c_str());
+
+ write_insn<big_endian>(p, addis_12_12 + ha(off)), p += 4;
+ write_insn<big_endian>(p, ld_12_12 + l(off)), p += 4;
+ write_insn<big_endian>(p, mtctr_12), p += 4;
+ write_insn<big_endian>(p, bctr);
}
}
else
template<int size, bool big_endian>
int
-Target_powerpc<size, big_endian>::Scan::get_reference_flags(unsigned int r_type)
+Target_powerpc<size, big_endian>::Scan::get_reference_flags(
+ unsigned int r_type,
+ const Target_powerpc* target)
{
+ int ref = 0;
+
switch (r_type)
{
case elfcpp::R_POWERPC_NONE:
case elfcpp::R_POWERPC_GNU_VTENTRY:
case elfcpp::R_PPC64_TOC:
// No symbol reference.
- return 0;
+ break;
case elfcpp::R_PPC64_ADDR64:
case elfcpp::R_PPC64_UADDR64:
case elfcpp::R_POWERPC_ADDR16_LO:
case elfcpp::R_POWERPC_ADDR16_HI:
case elfcpp::R_POWERPC_ADDR16_HA:
- return Symbol::ABSOLUTE_REF;
+ ref = Symbol::ABSOLUTE_REF;
+ break;
case elfcpp::R_POWERPC_ADDR24:
case elfcpp::R_POWERPC_ADDR14:
case elfcpp::R_POWERPC_ADDR14_BRTAKEN:
case elfcpp::R_POWERPC_ADDR14_BRNTAKEN:
- return Symbol::FUNCTION_CALL | Symbol::ABSOLUTE_REF;
+ ref = Symbol::FUNCTION_CALL | Symbol::ABSOLUTE_REF;
+ break;
case elfcpp::R_PPC64_REL64:
case elfcpp::R_POWERPC_REL32:
case elfcpp::R_POWERPC_REL16_LO:
case elfcpp::R_POWERPC_REL16_HI:
case elfcpp::R_POWERPC_REL16_HA:
- return Symbol::RELATIVE_REF;
+ ref = Symbol::RELATIVE_REF;
+ break;
case elfcpp::R_POWERPC_REL24:
case elfcpp::R_PPC_PLTREL24:
case elfcpp::R_POWERPC_REL14:
case elfcpp::R_POWERPC_REL14_BRTAKEN:
case elfcpp::R_POWERPC_REL14_BRNTAKEN:
- return Symbol::FUNCTION_CALL | Symbol::RELATIVE_REF;
+ ref = Symbol::FUNCTION_CALL | Symbol::RELATIVE_REF;
+ break;
case elfcpp::R_POWERPC_GOT16:
case elfcpp::R_POWERPC_GOT16_LO:
case elfcpp::R_PPC64_TOC16_DS:
case elfcpp::R_PPC64_TOC16_LO_DS:
// Absolute in GOT.
- return Symbol::ABSOLUTE_REF;
+ ref = Symbol::ABSOLUTE_REF;
+ break;
case elfcpp::R_POWERPC_GOT_TPREL16:
case elfcpp::R_POWERPC_TLS:
- return Symbol::TLS_REF;
+ ref = Symbol::TLS_REF;
+ break;
case elfcpp::R_POWERPC_COPY:
case elfcpp::R_POWERPC_GLOB_DAT:
case elfcpp::R_POWERPC_DTPMOD:
default:
// Not expected. We will give an error later.
- return 0;
+ break;
}
+
+ if (size == 64 && target->abiversion() < 2)
+ ref |= Symbol::FUNC_DESC_ABI;
+ return ref;
}
// Report an unsupported relocation against a local symbol.
template<int size, bool big_endian>
bool
Target_powerpc<size, big_endian>::Scan::reloc_needs_plt_for_ifunc(
+ Target_powerpc<size, big_endian>* target,
Sized_relobj_file<size, big_endian>* object,
unsigned int r_type,
bool report_err)
{
// In non-pic code any reference will resolve to the plt call stub
// for the ifunc symbol.
- if (size == 32 && !parameters->options().output_is_position_independent())
+ if ((size == 32 || target->abiversion() >= 2)
+ && !parameters->options().output_is_position_independent())
return true;
switch (r_type)
// A local STT_GNU_IFUNC symbol may require a PLT entry.
bool is_ifunc = lsym.get_st_type() == elfcpp::STT_GNU_IFUNC;
- if (is_ifunc && this->reloc_needs_plt_for_ifunc(object, r_type, true))
+ if (is_ifunc && this->reloc_needs_plt_for_ifunc(target, object, r_type, true))
{
unsigned int r_sym = elfcpp::elf_r_sym<size>(reloc.get_r_info());
target->push_branch(ppc_object, data_shndx, reloc.get_r_offset(),
{
Address off = reloc.get_r_offset();
if (size == 64
+ && target->abiversion() < 2
&& data_shndx == ppc_object->opd_shndx()
&& ppc_object->get_opd_discard(off - 8))
break;
// executable), we need to create a dynamic relocation for
// this location.
if (parameters->options().output_is_position_independent()
- || (size == 64 && is_ifunc))
+ || (size == 64 && is_ifunc && target->abiversion() < 2))
{
Reloc_section* rela_dyn = target->rela_dyn_section(symtab, layout,
is_ifunc);
+ unsigned int r_sym = elfcpp::elf_r_sym<size>(reloc.get_r_info());
if ((size == 32 && r_type == elfcpp::R_POWERPC_ADDR32)
|| (size == 64 && r_type == elfcpp::R_PPC64_ADDR64))
{
- unsigned int r_sym = elfcpp::elf_r_sym<size>(reloc.get_r_info());
unsigned int dynrel = (is_ifunc ? elfcpp::R_POWERPC_IRELATIVE
: elfcpp::R_POWERPC_RELATIVE);
rela_dyn->add_local_relative(object, r_sym, dynrel,
reloc.get_r_offset(),
reloc.get_r_addend(), false);
}
- else
+ else if (lsym.get_st_type() != elfcpp::STT_SECTION)
{
check_non_pic(object, r_type);
- unsigned int r_sym = elfcpp::elf_r_sym<size>(reloc.get_r_info());
rela_dyn->add_local(object, r_sym, r_type, output_section,
data_shndx, reloc.get_r_offset(),
reloc.get_r_addend());
}
+ else
+ {
+ gold_assert(lsym.get_st_value() == 0);
+ unsigned int shndx = lsym.get_st_shndx();
+ bool is_ordinary;
+ shndx = object->adjust_sym_shndx(r_sym, shndx,
+ &is_ordinary);
+ if (!is_ordinary)
+ object->error(_("section symbol %u has bad shndx %u"),
+ r_sym, shndx);
+ else
+ rela_dyn->add_local_section(object, shndx, r_type,
+ output_section, data_shndx,
+ reloc.get_r_offset());
+ }
}
break;
case elfcpp::R_PPC64_DTPREL16_HIGHESTA:
case elfcpp::R_PPC64_TLSGD:
case elfcpp::R_PPC64_TLSLD:
+ case elfcpp::R_PPC64_ADDR64_LOCAL:
break;
case elfcpp::R_POWERPC_GOT16:
if (!parameters->options().output_is_position_independent())
{
- if (size == 32 && is_ifunc)
+ if (is_ifunc
+ && (size == 32 || target->abiversion() >= 2))
got->add_local_plt(object, r_sym, GOT_TYPE_STANDARD);
else
got->add_local(object, r_sym, GOT_TYPE_STANDARD);
// A STT_GNU_IFUNC symbol may require a PLT entry.
bool is_ifunc = gsym->type() == elfcpp::STT_GNU_IFUNC;
- if (is_ifunc && this->reloc_needs_plt_for_ifunc(object, r_type, true))
+ bool pushed_ifunc = false;
+ if (is_ifunc && this->reloc_needs_plt_for_ifunc(target, object, r_type, true))
{
target->push_branch(ppc_object, data_shndx, reloc.get_r_offset(),
r_type, elfcpp::elf_r_sym<size>(reloc.get_r_info()),
reloc.get_r_addend());
target->make_plt_entry(symtab, layout, gsym);
+ pushed_ifunc = true;
}
switch (r_type)
case elfcpp::R_PPC64_ADDR64:
if (size == 64
+ && target->abiversion() < 2
&& data_shndx == ppc_object->opd_shndx()
&& (gsym->is_defined_in_discarded_section()
|| gsym->object() != object))
// Make a PLT entry if necessary.
if (gsym->needs_plt_entry())
{
- if (!is_ifunc)
+ // Since this is not a PC-relative relocation, we may be
+ // taking the address of a function. In that case we need to
+ // set the entry in the dynamic symbol table to the address of
+ // the PLT call stub.
+ bool need_ifunc_plt = false;
+ if ((size == 32 || target->abiversion() >= 2)
+ && gsym->is_from_dynobj()
+ && !parameters->options().output_is_position_independent())
+ {
+ gsym->set_needs_dynsym_value();
+ need_ifunc_plt = true;
+ }
+ if (!is_ifunc || (!pushed_ifunc && need_ifunc_plt))
{
target->push_branch(ppc_object, data_shndx,
reloc.get_r_offset(), r_type,
reloc.get_r_addend());
target->make_plt_entry(symtab, layout, gsym);
}
- // Since this is not a PC-relative relocation, we may be
- // taking the address of a function. In that case we need to
- // set the entry in the dynamic symbol table to the address of
- // the PLT call stub.
- if (size == 32
- && gsym->is_from_dynobj()
- && !parameters->options().output_is_position_independent())
- gsym->set_needs_dynsym_value();
}
// Make a dynamic relocation if necessary.
- if (needs_dynamic_reloc<size>(gsym, Scan::get_reference_flags(r_type))
- || (size == 64 && is_ifunc))
+ if (gsym->needs_dynamic_reloc(Scan::get_reference_flags(r_type, target))
+ || (size == 64 && is_ifunc && target->abiversion() < 2))
{
- if (gsym->may_need_copy_reloc())
+ if (!parameters->options().output_is_position_independent()
+ && gsym->may_need_copy_reloc())
{
target->copy_reloc(symtab, layout, object,
data_shndx, output_section, gsym, reloc);
}
- else if ((size == 32
- && r_type == elfcpp::R_POWERPC_ADDR32
+ else if ((((size == 32
+ && r_type == elfcpp::R_POWERPC_ADDR32)
+ || (size == 64
+ && r_type == elfcpp::R_PPC64_ADDR64
+ && target->abiversion() >= 2))
&& gsym->can_use_relative_reloc(false)
&& !(gsym->visibility() == elfcpp::STV_PROTECTED
&& parameters->options().shared()))
|| (size == 64
&& r_type == elfcpp::R_PPC64_ADDR64
+ && target->abiversion() < 2
&& (gsym->can_use_relative_reloc(false)
|| data_shndx == ppc_object->opd_shndx())))
{
case elfcpp::R_PPC64_REL64:
case elfcpp::R_POWERPC_REL32:
// Make a dynamic relocation if necessary.
- if (needs_dynamic_reloc<size>(gsym, Scan::get_reference_flags(r_type)))
+ if (gsym->needs_dynamic_reloc(Scan::get_reference_flags(r_type, target)))
{
- if (gsym->may_need_copy_reloc())
+ if (!parameters->options().output_is_position_independent()
+ && gsym->may_need_copy_reloc())
{
target->copy_reloc(symtab, layout, object,
data_shndx, output_section, gsym,
case elfcpp::R_PPC64_DTPREL16_HIGHESTA:
case elfcpp::R_PPC64_TLSGD:
case elfcpp::R_PPC64_TLSLD:
+ case elfcpp::R_PPC64_ADDR64_LOCAL:
break;
case elfcpp::R_POWERPC_GOT16:
got = target->got_section(symtab, layout);
if (gsym->final_value_is_known())
{
- if (size == 32 && is_ifunc)
+ if (is_ifunc
+ && (size == 32 || target->abiversion() >= 2))
got->add_global_plt(gsym, GOT_TYPE_STANDARD);
else
got->add_global(gsym, GOT_TYPE_STANDARD);
= target->rela_dyn_section(symtab, layout, is_ifunc);
if (gsym->can_use_relative_reloc(false)
- && !(size == 32
+ && !((size == 32
+ || target->abiversion() >= 2)
&& gsym->visibility() == elfcpp::STV_PROTECTED
&& parameters->options().shared()))
{
typename Powerpc_relobj<size, big_endian>::Section_refs::iterator s;
for (s = p->second.begin(); s != p->second.end(); ++s)
{
- Object* src_obj = s->first;
+ Relobj* src_obj = s->first;
unsigned int src_indx = s->second;
symtab->gc()->add_reference(src_obj, src_indx,
ppc_object, dst_indx);
void
Target_powerpc<size, big_endian>::do_gc_add_reference(
Symbol_table* symtab,
- Object* src_obj,
+ Relobj* src_obj,
unsigned int src_shndx,
- Object* dst_obj,
+ Relobj* dst_obj,
unsigned int dst_shndx,
Address dst_off) const
{
if (ppc_object->opd_valid())
{
unsigned int dst_indx = ppc_object->get_opd_ent(dst_off);
- symtab->gc()->worklist().push(Section_id(ppc_object, dst_indx));
+ symtab->gc()->worklist().push_back(Section_id(ppc_object,
+ dst_indx));
}
else
ppc_object->add_gc_mark(dst_off);
}
}
+// FNOFFSET in section SHNDX in OBJECT is the start of a function
+// compiled with -fsplit-stack. The function calls non-split-stack
+// code. Change the function to ensure it has enough stack space to
+// call some random function.
+
+template<int size, bool big_endian>
+void
+Target_powerpc<size, big_endian>::do_calls_non_split(
+ Relobj* object,
+ unsigned int shndx,
+ section_offset_type fnoffset,
+ section_size_type fnsize,
+ unsigned char* view,
+ section_size_type view_size,
+ std::string* from,
+ std::string* to) const
+{
+ // 32-bit not supported.
+ if (size == 32)
+ {
+ // warn
+ Target::do_calls_non_split(object, shndx, fnoffset, fnsize,
+ view, view_size, from, to);
+ return;
+ }
+
+ // The function always starts with
+ // ld %r0,-0x7000-64(%r13) # tcbhead_t.__private_ss
+ // addis %r12,%r1,-allocate@ha
+ // addi %r12,%r12,-allocate@l
+ // cmpld %r12,%r0
+ // but note that the addis or addi may be replaced with a nop
+
+ unsigned char *entry = view + fnoffset;
+ uint32_t insn = elfcpp::Swap<32, big_endian>::readval(entry);
+
+ if ((insn & 0xffff0000) == addis_2_12)
+ {
+ /* Skip ELFv2 global entry code. */
+ entry += 8;
+ insn = elfcpp::Swap<32, big_endian>::readval(entry);
+ }
+
+ unsigned char *pinsn = entry;
+ bool ok = false;
+ const uint32_t ld_private_ss = 0xe80d8fc0;
+ if (insn == ld_private_ss)
+ {
+ int32_t allocate = 0;
+ while (1)
+ {
+ pinsn += 4;
+ insn = elfcpp::Swap<32, big_endian>::readval(pinsn);
+ if ((insn & 0xffff0000) == addis_12_1)
+ allocate += (insn & 0xffff) << 16;
+ else if ((insn & 0xffff0000) == addi_12_1
+ || (insn & 0xffff0000) == addi_12_12)
+ allocate += ((insn & 0xffff) ^ 0x8000) - 0x8000;
+ else if (insn != nop)
+ break;
+ }
+ if (insn == cmpld_7_12_0 && pinsn == entry + 12)
+ {
+ int extra = parameters->options().split_stack_adjust_size();
+ allocate -= extra;
+ if (allocate >= 0 || extra < 0)
+ {
+ object->error(_("split-stack stack size overflow at "
+ "section %u offset %0zx"),
+ shndx, static_cast<size_t>(fnoffset));
+ return;
+ }
+ pinsn = entry + 4;
+ insn = addis_12_1 | (((allocate + 0x8000) >> 16) & 0xffff);
+ if (insn != addis_12_1)
+ {
+ elfcpp::Swap<32, big_endian>::writeval(pinsn, insn);
+ pinsn += 4;
+ insn = addi_12_12 | (allocate & 0xffff);
+ if (insn != addi_12_12)
+ {
+ elfcpp::Swap<32, big_endian>::writeval(pinsn, insn);
+ pinsn += 4;
+ }
+ }
+ else
+ {
+ insn = addi_12_1 | (allocate & 0xffff);
+ elfcpp::Swap<32, big_endian>::writeval(pinsn, insn);
+ pinsn += 4;
+ }
+ if (pinsn != entry + 12)
+ elfcpp::Swap<32, big_endian>::writeval(pinsn, nop);
+
+ ok = true;
+ }
+ }
+
+ if (!ok)
+ {
+ if (!object->has_no_split_stack())
+ object->error(_("failed to match split-stack sequence at "
+ "section %u offset %0zx"),
+ shndx, static_cast<size_t>(fnoffset));
+ }
+}
+
// Scan relocations for a section.
template<int size, bool big_endian>
unsigned int shndx = sym->shndx(&is_ordinary);
if (shndx == symobj->opd_shndx()
&& symobj->get_opd_discard(sym->value()))
- sym->set_symtab_index(-1U);
+ {
+ sym->set_undefined();
+ sym->set_visibility(elfcpp::STV_DEFAULT);
+ sym->set_is_defined_in_discarded_section();
+ sym->set_symtab_index(-1U);
+ }
}
};
// Return the value to use for a branch relocation.
template<int size, bool big_endian>
-typename Target_powerpc<size, big_endian>::Address
+bool
Target_powerpc<size, big_endian>::symval_for_branch(
const Symbol_table* symtab,
- Address value,
const Sized_symbol<size>* gsym,
Powerpc_relobj<size, big_endian>* object,
+ Address *value,
unsigned int *dest_shndx)
{
+ if (size == 32 || this->abiversion() >= 2)
+ gold_unreachable();
*dest_shndx = 0;
- if (size == 32)
- return value;
// If the symbol is defined in an opd section, ie. is a function
// descriptor, use the function descriptor code entry address
Powerpc_relobj<size, big_endian>* symobj = object;
if (gsym != NULL
&& gsym->source() != Symbol::FROM_OBJECT)
- return value;
+ return true;
if (gsym != NULL)
symobj = static_cast<Powerpc_relobj<size, big_endian>*>(gsym->object());
unsigned int shndx = symobj->opd_shndx();
if (shndx == 0)
- return value;
+ return true;
Address opd_addr = symobj->get_output_section_offset(shndx);
if (opd_addr == invalid_address)
- return value;
+ return true;
opd_addr += symobj->output_section_address(shndx);
- if (value >= opd_addr && value < opd_addr + symobj->section_size(shndx))
+ if (*value >= opd_addr && *value < opd_addr + symobj->section_size(shndx))
{
Address sec_off;
- *dest_shndx = symobj->get_opd_ent(value - opd_addr, &sec_off);
+ *dest_shndx = symobj->get_opd_ent(*value - opd_addr, &sec_off);
if (symtab->is_section_folded(symobj, *dest_shndx))
{
Section_id folded
*dest_shndx = folded.second;
}
Address sec_addr = symobj->get_output_section_offset(*dest_shndx);
- gold_assert(sec_addr != invalid_address);
+ if (sec_addr == invalid_address)
+ return false;
+
sec_addr += symobj->output_section(*dest_shndx)->address();
- value = sec_addr + sec_off;
+ *value = sec_addr + sec_off;
}
- return value;
+ return true;
}
// Perform a relocation.
Powerpc_relobj<size, big_endian>* const object
= static_cast<Powerpc_relobj<size, big_endian>*>(relinfo->object);
Address value = 0;
- bool has_plt_value = false;
+ bool has_stub_value = false;
unsigned int r_sym = elfcpp::elf_r_sym<size>(rela.get_r_info());
if ((gsym != NULL
- ? use_plt_offset<size>(gsym, Scan::get_reference_flags(r_type))
+ ? gsym->use_plt_offset(Scan::get_reference_flags(r_type, target))
: object->local_has_plt_offset(r_sym))
&& (!psymval->is_ifunc_symbol()
- || Scan::reloc_needs_plt_for_ifunc(object, r_type, false)))
+ || Scan::reloc_needs_plt_for_ifunc(target, object, r_type, false)))
{
- Stub_table<size, big_endian>* stub_table
- = object->stub_table(relinfo->data_shndx);
- if (stub_table == NULL)
+ if (size == 64
+ && gsym != NULL
+ && target->abiversion() >= 2
+ && !parameters->options().output_is_position_independent()
+ && !is_branch_reloc(r_type))
{
- // This is a ref from a data section to an ifunc symbol.
- if (target->stub_tables().size() != 0)
- stub_table = target->stub_tables()[0];
+ Address off = target->glink_section()->find_global_entry(gsym);
+ if (off != invalid_address)
+ {
+ value = target->glink_section()->global_entry_address() + off;
+ has_stub_value = true;
+ }
}
- gold_assert(stub_table != NULL);
- Address off;
- if (gsym != NULL)
- off = stub_table->find_plt_call_entry(object, gsym, r_type,
- rela.get_r_addend());
else
- off = stub_table->find_plt_call_entry(object, r_sym, r_type,
- rela.get_r_addend());
- gold_assert(off != invalid_address);
- value = stub_table->stub_address() + off;
- has_plt_value = true;
+ {
+ Stub_table<size, big_endian>* stub_table
+ = object->stub_table(relinfo->data_shndx);
+ if (stub_table == NULL)
+ {
+ // This is a ref from a data section to an ifunc symbol.
+ if (target->stub_tables().size() != 0)
+ stub_table = target->stub_tables()[0];
+ }
+ if (stub_table != NULL)
+ {
+ Address off;
+ if (gsym != NULL)
+ off = stub_table->find_plt_call_entry(object, gsym, r_type,
+ rela.get_r_addend());
+ else
+ off = stub_table->find_plt_call_entry(object, r_sym, r_type,
+ rela.get_r_addend());
+ if (off != invalid_address)
+ {
+ value = stub_table->stub_address() + off;
+ has_stub_value = true;
+ }
+ }
+ }
+ // We don't care too much about bogus debug references to
+ // non-local functions, but otherwise there had better be a plt
+ // call stub or global entry stub as appropriate.
+ gold_assert(has_stub_value || !(os->flags() & elfcpp::SHF_ALLOC));
}
if (r_type == elfcpp::R_POWERPC_GOT16
else if (gsym != NULL
&& (r_type == elfcpp::R_POWERPC_REL24
|| r_type == elfcpp::R_PPC_PLTREL24)
- && has_plt_value)
+ && has_stub_value)
{
if (size == 64)
{
if (gsym->source() == Symbol::FROM_OBJECT
&& gsym->object() == object)
{
- Address addend = rela.get_r_addend();
- unsigned int dest_shndx;
- Address opdent = psymval->value(object, addend);
- code = target->symval_for_branch(relinfo->symtab, opdent,
- gsym, object, &dest_shndx);
+ unsigned int dest_shndx = 0;
+ if (target->abiversion() < 2)
+ {
+ Address addend = rela.get_r_addend();
+ code = psymval->value(object, addend);
+ target->symval_for_branch(relinfo->symtab, gsym, object,
+ &code, &dest_shndx);
+ }
bool is_ordinary;
if (dest_shndx == 0)
dest_shndx = gsym->shndx(&is_ordinary);
|| r_type == elfcpp::R_POWERPC_GOT_TLSGD16_LO)
{
Insn* iview = reinterpret_cast<Insn*>(view - 2 * big_endian);
- Insn insn = addis_3_13;
+ Insn insn = elfcpp::Swap<32, big_endian>::readval(iview);
+ insn &= (1 << 26) - (1 << 21); // extract rt
if (size == 32)
- insn = addis_3_2;
+ insn |= addis_0_2;
+ else
+ insn |= addis_0_13;
elfcpp::Swap<32, big_endian>::writeval(iview, insn);
r_type = elfcpp::R_POWERPC_TPREL16_HA;
value = psymval->value(object, rela.get_r_addend());
|| r_type == elfcpp::R_POWERPC_GOT_TLSLD16_LO)
{
Insn* iview = reinterpret_cast<Insn*>(view - 2 * big_endian);
- Insn insn = addis_3_13;
+ Insn insn = elfcpp::Swap<32, big_endian>::readval(iview);
+ insn &= (1 << 26) - (1 << 21); // extract rt
if (size == 32)
- insn = addis_3_2;
+ insn |= addis_0_2;
+ else
+ insn |= addis_0_13;
elfcpp::Swap<32, big_endian>::writeval(iview, insn);
r_type = elfcpp::R_POWERPC_TPREL16_HA;
value = dtp_offset;
value = psymval->value(object, rela.get_r_addend());
}
}
- else if (!has_plt_value)
+ else if (!has_stub_value)
{
Address addend = 0;
- unsigned int dest_shndx;
- if (r_type != elfcpp::R_PPC_PLTREL24)
+ if (!(size == 32 && r_type == elfcpp::R_PPC_PLTREL24))
addend = rela.get_r_addend();
value = psymval->value(object, addend);
- if (gsym != NULL)
- value += object->ppc64_local_entry_offset(gsym);
- else
- value += object->ppc64_local_entry_offset(r_sym);
if (size == 64 && is_branch_reloc(r_type))
- value = target->symval_for_branch(relinfo->symtab, value,
- gsym, object, &dest_shndx);
- unsigned int max_branch_offset = 0;
- if (r_type == elfcpp::R_POWERPC_REL24
- || r_type == elfcpp::R_PPC_PLTREL24
- || r_type == elfcpp::R_PPC_LOCAL24PC)
- max_branch_offset = 1 << 25;
- else if (r_type == elfcpp::R_POWERPC_REL14
- || r_type == elfcpp::R_POWERPC_REL14_BRTAKEN
- || r_type == elfcpp::R_POWERPC_REL14_BRNTAKEN)
- max_branch_offset = 1 << 15;
+ {
+ if (target->abiversion() >= 2)
+ {
+ if (gsym != NULL)
+ value += object->ppc64_local_entry_offset(gsym);
+ else
+ value += object->ppc64_local_entry_offset(r_sym);
+ }
+ else
+ {
+ unsigned int dest_shndx;
+ target->symval_for_branch(relinfo->symtab, gsym, object,
+ &value, &dest_shndx);
+ }
+ }
+ Address max_branch_offset = max_branch_delta(r_type);
if (max_branch_offset != 0
&& value - address + max_branch_offset >= 2 * max_branch_offset)
{
{
Address off = stub_table->find_long_branch_entry(object, value);
if (off != invalid_address)
- value = (stub_table->stub_address() + stub_table->plt_size()
- + off);
+ {
+ value = (stub_table->stub_address() + stub_table->plt_size()
+ + off);
+ has_stub_value = true;
+ }
}
}
}
value -= dtp_offset;
break;
+ case elfcpp::R_PPC64_ADDR64_LOCAL:
+ if (gsym != NULL)
+ value += object->ppc64_local_entry_offset(gsym);
+ else
+ value += object->ppc64_local_entry_offset(r_sym);
+ break;
+
default:
break;
}
}
typename Reloc::Overflow_check overflow = Reloc::CHECK_NONE;
+ elfcpp::Shdr<size, big_endian> shdr(relinfo->data_shdr);
switch (r_type)
{
case elfcpp::R_POWERPC_ADDR32:
overflow = Reloc::CHECK_SIGNED;
break;
- case elfcpp::R_POWERPC_ADDR24:
- case elfcpp::R_POWERPC_ADDR16:
case elfcpp::R_POWERPC_UADDR16:
- case elfcpp::R_PPC64_ADDR16_DS:
- case elfcpp::R_POWERPC_ADDR14:
- case elfcpp::R_POWERPC_ADDR14_BRTAKEN:
- case elfcpp::R_POWERPC_ADDR14_BRNTAKEN:
overflow = Reloc::CHECK_BITFIELD;
break;
+ case elfcpp::R_POWERPC_ADDR16:
+ // We really should have three separate relocations,
+ // one for 16-bit data, one for insns with 16-bit signed fields,
+ // and one for insns with 16-bit unsigned fields.
+ overflow = Reloc::CHECK_BITFIELD;
+ if ((shdr.get_sh_flags() & elfcpp::SHF_EXECINSTR) != 0)
+ overflow = Reloc::CHECK_LOW_INSN;
+ break;
+
case elfcpp::R_POWERPC_ADDR16_HI:
case elfcpp::R_POWERPC_ADDR16_HA:
case elfcpp::R_POWERPC_GOT16_HI:
case elfcpp::R_POWERPC_GOT_DTPREL16_HA:
case elfcpp::R_POWERPC_REL16_HI:
case elfcpp::R_POWERPC_REL16_HA:
- if (size == 32)
- break;
- case elfcpp::R_POWERPC_REL24:
- case elfcpp::R_PPC_PLTREL24:
- case elfcpp::R_PPC_LOCAL24PC:
+ if (size != 32)
+ overflow = Reloc::CHECK_HIGH_INSN;
+ break;
+
case elfcpp::R_POWERPC_REL16:
case elfcpp::R_PPC64_TOC16:
case elfcpp::R_POWERPC_GOT16:
case elfcpp::R_POWERPC_SECTOFF:
case elfcpp::R_POWERPC_TPREL16:
case elfcpp::R_POWERPC_DTPREL16:
+ case elfcpp::R_POWERPC_GOT_TLSGD16:
+ case elfcpp::R_POWERPC_GOT_TLSLD16:
+ case elfcpp::R_POWERPC_GOT_TPREL16:
+ case elfcpp::R_POWERPC_GOT_DTPREL16:
+ overflow = Reloc::CHECK_LOW_INSN;
+ break;
+
+ case elfcpp::R_POWERPC_ADDR24:
+ case elfcpp::R_POWERPC_ADDR14:
+ case elfcpp::R_POWERPC_ADDR14_BRTAKEN:
+ case elfcpp::R_POWERPC_ADDR14_BRNTAKEN:
+ case elfcpp::R_PPC64_ADDR16_DS:
+ case elfcpp::R_POWERPC_REL24:
+ case elfcpp::R_PPC_PLTREL24:
+ case elfcpp::R_PPC_LOCAL24PC:
case elfcpp::R_PPC64_TPREL16_DS:
case elfcpp::R_PPC64_DTPREL16_DS:
case elfcpp::R_PPC64_TOC16_DS:
case elfcpp::R_POWERPC_REL14:
case elfcpp::R_POWERPC_REL14_BRTAKEN:
case elfcpp::R_POWERPC_REL14_BRNTAKEN:
- case elfcpp::R_POWERPC_GOT_TLSGD16:
- case elfcpp::R_POWERPC_GOT_TLSLD16:
- case elfcpp::R_POWERPC_GOT_TPREL16:
- case elfcpp::R_POWERPC_GOT_DTPREL16:
overflow = Reloc::CHECK_SIGNED;
break;
}
+ if (overflow == Reloc::CHECK_LOW_INSN
+ || overflow == Reloc::CHECK_HIGH_INSN)
+ {
+ Insn* iview = reinterpret_cast<Insn*>(view - 2 * big_endian);
+ Insn insn = elfcpp::Swap<32, big_endian>::readval(iview);
+
+ if ((insn & (0x3f << 26)) == 10u << 26 /* cmpli */)
+ overflow = Reloc::CHECK_BITFIELD;
+ else if (overflow == Reloc::CHECK_LOW_INSN
+ ? ((insn & (0x3f << 26)) == 28u << 26 /* andi */
+ || (insn & (0x3f << 26)) == 24u << 26 /* ori */
+ || (insn & (0x3f << 26)) == 26u << 26 /* xori */)
+ : ((insn & (0x3f << 26)) == 29u << 26 /* andis */
+ || (insn & (0x3f << 26)) == 25u << 26 /* oris */
+ || (insn & (0x3f << 26)) == 27u << 26 /* xoris */))
+ overflow = Reloc::CHECK_UNSIGNED;
+ else
+ overflow = Reloc::CHECK_SIGNED;
+ }
+
typename Powerpc_relocate_functions<size, big_endian>::Status status
= Powerpc_relocate_functions<size, big_endian>::STATUS_OK;
switch (r_type)
case elfcpp::R_PPC64_ADDR64:
case elfcpp::R_PPC64_REL64:
case elfcpp::R_PPC64_TOC:
+ case elfcpp::R_PPC64_ADDR64_LOCAL:
Reloc::addr64(view, value);
break;
case elfcpp::R_POWERPC_GOT_DTPREL16:
case elfcpp::R_POWERPC_GOT_DTPREL16_LO:
+ case elfcpp::R_POWERPC_GOT_TPREL16:
+ case elfcpp::R_POWERPC_GOT_TPREL16_LO:
if (size == 64)
{
+ // On ppc64 these are all ds form
status = Reloc::addr16_ds(view, value, overflow);
break;
}
case elfcpp::R_POWERPC_DTPREL16:
case elfcpp::R_POWERPC_GOT_TLSGD16:
case elfcpp::R_POWERPC_GOT_TLSLD16:
- case elfcpp::R_POWERPC_GOT_TPREL16:
case elfcpp::R_POWERPC_ADDR16_LO:
case elfcpp::R_POWERPC_REL16_LO:
case elfcpp::R_PPC64_TOC16_LO:
case elfcpp::R_POWERPC_DTPREL16_LO:
case elfcpp::R_POWERPC_GOT_TLSGD16_LO:
case elfcpp::R_POWERPC_GOT_TLSLD16_LO:
- case elfcpp::R_POWERPC_GOT_TPREL16_LO:
status = Reloc::addr16(view, value, overflow);
break;
r_type);
break;
}
- if (status != Powerpc_relocate_functions<size, big_endian>::STATUS_OK)
- gold_error_at_location(relinfo, relnum, rela.get_r_offset(),
- _("relocation overflow"));
+ if (status != Powerpc_relocate_functions<size, big_endian>::STATUS_OK
+ && (has_stub_value
+ || !(gsym != NULL
+ && gsym->is_undefined()
+ && is_branch_reloc(r_type))))
+ {
+ gold_error_at_location(relinfo, relnum, rela.get_r_offset(),
+ _("relocation overflow"));
+ if (has_stub_value)
+ gold_info(_("try relinking with a smaller --stub-group-size"));
+ }
return true;
}
return (*p)->stub_address() + off;
}
}
+ else if (this->abiversion() >= 2)
+ {
+ Address off = this->glink_section()->find_global_entry(gsym);
+ if (off != invalid_address)
+ return this->glink_section()->global_entry_address() + off;
+ }
gold_unreachable();
}
return (*p)->stub_address() + off;
}
}
+ else if (this->abiversion() >= 2)
+ {
+ Address off = this->glink_section()->find_global_entry(gsym);
+ if (off != invalid_address)
+ return this->glink_section()->global_entry_address() + off;
+ }
gold_unreachable();
}
template<int size, bool big_endian>
const int Output_data_glink<size, big_endian>::pltresolve_size;
template<int size, bool big_endian>
+const typename Output_data_glink<size, big_endian>::Address
+ Output_data_glink<size, big_endian>::invalid_address;
+template<int size, bool big_endian>
const typename Stub_table<size, big_endian>::Address
Stub_table<size, big_endian>::invalid_address;
template<int size, bool big_endian>
projects / deliverable / binutils-gdb.git / blobdiff