+2017-12-19 Tamar Christina <tamar.christina@arm.com>
+
+ PR gas/22559
+ * aarch64.h (aarch64_opnd_qualifier): Add AARCH64_OPND_QLF_S_4B.
+
+2017-12-19 Tamar Christina <tamar.christina@arm.com>
+
+ PR gas/22529
+ * opcode/aarch64.h (aarch64_opnd_qualifier): Add AARCH64_OPND_QLF_V_4B.
+
+2017-12-11 Stephen Crane <sjc@immunant.com>
+
+ * plugin-api.h: Add new plugin hook to allow processing of input
+ files added by a plugin.
+ (ld_plugin_new_input_handler): New function hook type.
+ (ld_plugin_register_new_input): New interface.
+ (LDPT_REGISTER_NEW_INPUT_HOOK): New enum val.
+ (tv_register_new_input): New member.
+
+2017-12-01 Peter Bergner <bergner@vnet.ibm.com>
+
+ * opcode/ppc.h (PPC_INT_FMT): Define.
+ (struct powerpc_opcode) <opcode>: Update type.
+ (struct powerpc_opcode) <mask>: Likewise.
+ (struct powerpc_opcode) <bitm>: Likewise.
+ (struct powerpc_opcode) <insert>: Likewise.
+ (struct powerpc_opcode) <extract>: Likewise.
+ (ppc_optional_operand_value): Likewise.
+
+2017-11-24 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR binutils/22444
+ * elf/external.h (ELF_ALIGN_UP): New.
+ (ELF_NOTE_DESC_OFFSET): Likewise.
+ (ELF_NOTE_NEXT_OFFSET): Likewise.
+
+2017-11-16 Tamar Christina <tamar.christina@arm.com>
+
+ * opcode/aarch64.h: (AARCH64_FEATURE_F16_FML): New.
+ (AARCH64_ARCH_V8_4): Enable AARCH64_FEATURE_F16_FML by default.
+
+2017-11-15 Tamar Christina <tamar.christina@arm.com>
+
+ * opcode/arm.h: (ARM_EXT2_FP16_FML): New.
+ (ARM_AEXT2_V8_4A): Add ARM_EXT2_FP16_FML.
+
+2017-11-13 Jan Beulich <jbeulich@suse.com>
+
+ * coff/pe.h (COFF_ENCODE_ALIGNMENT): Cap value to maximum one
+ representable.
+ (COFF_DECODE_ALIGNMENT): Define.
+
+2017-11-09 Tamar Christina <tamar.christina@arm.com>
+
+ * opcode/aarch64.h (AARCH64_ARCH_V8_4): Enable DOTPROD.
+
+2017-11-09 Tamar Christina <tamar.christina@arm.com>
+
+ * opcode/aarch64.h:
+ (aarch64_opnd): Add AARCH64_OPND_Va, AARCH64_OPND_MASK,
+ AARCH64_OPND_IMM_2, AARCH64_OPND_ADDR_OFFSET
+ and AARCH64_OPND_SM3_IMM2.
+ (aarch64_insn_class): Add cryptosm3 and cryptosm4.
+ (arch64_feature_set): Make uint64_t.
+
+2017-11-09 Tamar Christina <tamar.christina@arm.com>
+
+ * opcode/aarch64.h:
+ (AARCH64_FEATURE_V8_4, AARCH64_FEATURE_SM4): New.
+ (AARCH64_ARCH_V8_4, AARCH64_FEATURE_SHA3): New.
+
+2017-11-09 Nick Clifton <nickc@redhat.com>
+
+ * opcode/aarch64.h (aarch64_feature_set): Change type to unsigned
+ long long.
+
+2017-11-08 Tamar Christina <tamar.christina@arm.com>
+
+ * opcode/aarch64.h:
+ (AARCH64_FEATURE_SHA2, AARCH64_FEATURE_AES): New.
+
+2017-11-08 Jiong Wang <jiong.wang@arm.com>
+
+ * opcode/arm.h (ARM_AEXT2_V8_4A): Include Dot Product feature.
+ (ARM_EXT2_V8_4A): New macro.
+ (ARM_AEXT2_V8_4A): Likewise.
+ (ARM_ARCH_V8_4A): Likewise.
+
+2017-11-07 Palmer Dabbelt <palmer@dabbelt.com>
+
+ * opcode/riscv-opc.h (sptbr): Rename to satp.
+ (CSR_SPTBR): Rename to CSR_SATP.
+ (sptbr): Alias to CSR_SATP.
+
+2017-11-07 Tamar Christina <tamar.christina@arm.com>
+
+ * opcode/arm.h (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_DOTPROD):
+ New macro.
+
+2017-11-02 Siddhesh Poyarekar <siddhesh@sourceware.org>
+
+ * include/opcode/aarch64.h (AARCH64_ARCH_V8_2): Drop
+ AARCH64_FEATURE_F16.
+
+2017-11-01 James Bowman <james.bowman@ftdichip.com>
+
+ * elf/ft32.h: Add R_FT32_RELAX, SC0, SC1, DIFF32.
+
+2017-10-25 Alan Modra <amodra@gmail.com>
+
+ PR 22348
+ * opcode/cr16.h (instruction): Delete.
+ (cr16_words, cr16_allWords, cr16_currInsn): Delete.
+ * opcode/crx.h (crx_cst4_map): Rename from cst4_map.
+ (crx_cst4_maps): Rename from cst4_maps.
+ (crx_no_op_insn): Rename from no_op_insn.
+ (instruction): Delete.
+
+2017-10-24 Andrew Waterman <andrew@sifive.com>
+
+ * opcode/riscv.h (VALID_RVC_LUI_IMM): c.lui can't load the
+ immediate 0.
+
+2017-10-12 James Bowman <james.bowman@ftdichip.com>
+
+ * elf/ft32.h: Add R_FT32_15.
+ * opcode/ft32.h: Replace FT32_FLD_K8 with K15.
+ (ft32_shortcode, sc_compar, ft32_split_shortcode,
+ ft32_merge_shortcode, ft32_merge_shortcode): New functions.
+
+2017-10-05 John Baldwin <jhb@FreeBSD.org>
+
+ * elf/common.h (AT_FREEBSD_EHDRFLAGS, AT_FREEBSD_HWCAP): Define.
+
+2017-09-22 Alexandre Oliva <aoliva@redhat.com>
+
+ * dwarf2.def (DW_AT_GNU_locviews): New.
+ * dwarf2.h (enum dwarf_location_list_entry_type): Add
+ DW_LLE_GNU_view_pair.
+ (DW_LLE_view_pair): Define.
+
+2017-09-15 Pedro Alves <palves@redhat.com>
+
+ Sync with mainline gcc sources (r252823)
+
+ 2017-09-15 Yao Qi <yao.qi@linaro.org>
+ Pedro Alves <palves@redhat.com>
+
+ * ansidecl.h (DISABLE_COPY_AND_ASSIGN): New macro.
+
+ 2017-09-12 Jiong Wang <jiong.wang@arm.com>
+
+ * dwarf2.def (DW_CFA_AARCH64_negate_ra_state): New DW_CFA_DUP.
+ * dwarf2.h (DW_CFA_DUP): New define.
+
+ 2017-08-21 Richard Biener <rguenther@suse.de>
+
+ * simple-object.h (simple_object_copy_lto_debug_sections): New
+ function.
+
+ 2017-05-18 Martin Liska <mliska@suse.cz>
+
+ * ansidecl.h: Define CONSTEXPR macro.
+
+ 2017-05-24 Nathan Sidwell <nathan@acm.org>
+
+ * libiberty.h (ASTRDUP): Adjust cast to avoid warning.
+
+ 2017-01-30 Alexandre Oliva <aoliva@redhat.com>
+
+ Introduce C++ support in libcc1.
+ * gcc-c-fe.def (int_type_v0): Rename from...
+ (int_type): ... this. Introduce new version.
+ (float_type_v0): Rename from...
+ (float_type): ... this. Introduce new version.
+ (char_type): New.
+ * gcc-c-interface.h (gcc_c_api_version): Add GCC_C_FE_VERSION_1.
+ (gcc_type_array): Move...
+ * gcc-interface.h: ... here.
+ * gcc-cp-fe.def: New.
+ * gcc-cp-interface.h: New.
+
+ 2016-04-29 Oleg Endo <olegendo@gcc.gnu.org>
+
+ * longlong.h (umul_ppmm): Remove SHMEDIA checks.
+ (__umulsidi3, count_leading_zeros): Remove SHMEDIA implementations.
+
+ 2017-09-15 Yao Qi <yao.qi@linaro.org>
+ Pedro Alves <palves@redhat.com>
+
+ * ansidecl.h (DISABLE_COPY_AND_ASSIGN): New macro.
+
+ 2017-09-12 Jiong Wang <jiong.wang@arm.com>
+
+ * dwarf2.def (DW_CFA_AARCH64_negate_ra_state): New DW_CFA_DUP.
+ * dwarf2.h (DW_CFA_DUP): New define.
+
+ 2017-08-21 Richard Biener <rguenther@suse.de>
+
+ * simple-object.h (simple_object_copy_lto_debug_sections): New
+ function.
+
+ 2017-05-18 Martin Liska <mliska@suse.cz>
+
+ * ansidecl.h: Define CONSTEXPR macro.
+
+ 2017-05-24 Nathan Sidwell <nathan@acm.org>
+
+ * libiberty.h (ASTRDUP): Adjust cast to avoid warning.
+
+ 2017-01-30 Alexandre Oliva <aoliva@redhat.com>
+
+ Introduce C++ support in libcc1.
+ * gcc-c-fe.def (int_type_v0): Rename from...
+ (int_type): ... this. Introduce new version.
+ (float_type_v0): Rename from...
+ (float_type): ... this. Introduce new version.
+ (char_type): New.
+ * gcc-c-interface.h (gcc_c_api_version): Add GCC_C_FE_VERSION_1.
+ (gcc_type_array): Move...
+ * gcc-interface.h: ... here.
+ * gcc-cp-fe.def: New.
+ * gcc-cp-interface.h: New.
+
+ 2016-04-29 Oleg Endo <olegendo@gcc.gnu.org>
+
+ * longlong.h (umul_ppmm): Remove SHMEDIA checks.
+ (__umulsidi3, count_leading_zeros): Remove SHMEDIA implementations.
+
+2017-09-06 Kamil Rytarowski <n54@gmx.com>
+
+ * opcode/nds32.h: Rename __BIT() to N32_BIT().
+
+2017-09-05 Alexander Fedotov <alexander.fedotov@nxp.com>
+ Edmar Wienskoski <edmar.wienskoski@nxp.com
+
+ * elf/ppc.h (R_PPC_VLE_ADDR20): New relocation.
+
+2017-08-23 Alexander Fedotov <alexander.fedotov@nxp.com>
+ Edmar Wienskoski <edmar.wienskoski@nxp.com>
+
+ * opcode/ppc.h:
+ (spe2_opcodes, spe2_num_opcodes): New.
+ (PPC_OPCODE_SPE2): New define.
+ (PPC_OPCODE_EFS2): Likewise.
+ (SPE2_XOP): Likewise.
+ (SPE2_XOP_TO_SEG): Likewise.
+
+2017-08-23 Jan Kratochvil <jan.kratochvil@redhat.com>
+
+ * gcc-interface.h (enum gcc_base_api_version): Update comment for
+ GCC_FE_VERSION_1.
+ (struct gcc_base_vtable): Rename set_arguments to set_arguments_v0.
+ Add set_arguments, set_triplet_regexp and set_driver_filename.
+
+2017-08-23 Jan Kratochvil <jan.kratochvil@redhat.com>
+
+ * gcc-interface.h (enum gcc_base_api_version): Add
+ GCC_FE_VERSION_1.
+ (struct gcc_base_vtable): Rename compile to compile_v0. Update
+ comment for compile. New methods set_verbose and compile.
+
+2017-08-21 Alexander Fedotov <alexander.fedotov@nxp.com>
+ Edmar Wienskoski <edmar.wienskoski@nxp.com>
+
+ * opcode/ppc.h (PPC_OPCODE_LSP): New define.
+
+2017-08-14 Gustavo Romero <gromero@linux.vnet.ibm.com>
+
+ * elf/common.h (NT_PPC_TAR): New macro.
+ (NT_PPC_PPR): Likewise.
+ (NT_PPC_DSCR): Likewise.
+ (NT_PPC_EBB): Likewise.
+ (NT_PPC_PMU): Likewise.
+ (NT_PPC_TM_CGPR): Likewise.
+ (NT_PPC_TM_CFPR): Likewise.
+ (NT_PPC_TM_CVMX): Likewise.
+ (NT_PPC_TM_CVSX): Likewise.
+ (NT_PPC_TM_SPR): Likewise.
+ (NT_PPC_TM_CTAR): Likewise.
+ (NT_PPC_TM_CPPR): Likewise.
+ (NT_PPC_TM_CDSCR): Likewise.
+
+2017-08-06 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR ld/21903:
+ * bfdlink.h (bfd_link_info): Add inhibit_common_definition.
+
+2017-07-31 Nick Clifton <nickc@redhat.com>
+
+ PR 21850
+ * ansidecl.h (OVERRIDE): Protect check of __cplusplus value with
+ #idef __cplusplus.
+
+2017-07-19 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * opcode/arc.h (SJLI): Add.
+
+2017-07-19 Claudiu Zissulescu <claziss@synopsys.com>
+ John Eric Martin <John.Martin@emmicro-us.com>
+
+ * elf/arc-reloc.def: Add JLI relocs howto.
+ * opcode/arc-func.h (replace_jli): New function.
+
+2017-07-18 Nick Clifton <nickc@redhat.com>
+
+ PR 21775
+ * aout/adobe.h: Fix spelling typos.
+ * aout/aout64.h: Likewise.
+ * aout/hp300hpux.h: Likewise.
+ * elf/hppa.h: Likewise.
+ * gdb/remote-sim.h: Likewise.
+ * libiberty.h: Likewise.
+ * mach-o/arm.h: Likewise.
+ * opcode/v850.h: Likewise.
+
+2017-07-14 Ravi Bangoria <ravi.bangoria@linux.vnet.ibm.com>
+
+ * dis-asm.h (struct disassemble_info): Change type of buffer_length
+ field to size_t.
+
+2017-07-07 John Baldwin <jhb@FreeBSD.org>
+
+ * elf/common.h (NT_FREEBSD_PTLWPINFO): Define.
+
+2017-07-02 Jan Kratochvil <jan.kratochvil@redhat.com>
+
+ * dwarf2.def (DW_IDX_compile_unit, DW_IDX_type_unit, DW_IDX_die_offset)
+ (DW_IDX_parent, DW_IDX_type_hash, DW_IDX_lo_user, DW_IDX_hi_user)
+ (DW_IDX_GNU_internal, DW_IDX_GNU_external): New.
+ * dwarf2.h (DW_IDX, DW_IDX_DUP, DW_FIRST_IDX, DW_END_IDX): New.
+ (enum dwarf_name_index_attribute): Remove.
+ (get_DW_IDX_name): New declaration.
+
+2017-06-30 Georg-Johann Lay <avr@gjlay.de>
+
+ PR gas/21683
+ * opcode/avr.h (AVR_INSN): Add one for __gcc_isr.
+
+2017-06-30 Maciej W. Rozycki <macro@imgtec.com>
+ Andrew Bennett <andrew.bennett@imgtec.com>
+
+ * opcode/mips.h (ASE_XPA_VIRT): New macro.
+
+2017-06-29 Andreas Arnez <arnez@linux.vnet.ibm.com>
+
+ * elf/common.h (NT_S390_GS_CB): New macro.
+ (NT_S390_GS_BC): Likewise.
+
+2017-06-28 Tamar Christina <tamar.christina@arm.com>
+
+ * opcode/aarch64.h: (AARCH64_FEATURE_DOTPROD): New.
+ (aarch64_insn_class): Added dotprod.
+
+2017-06-28 Jiong Wang <jiong.wang@arm.com>
+
+ * opcode/arm.h (FPU_NEON_EXT_DOTPROD): New macro.
+ (FPU_ARCH_DOTPROD_NEON_VFP_ARMV8): New macro.
+
+2017-06-28 Maciej W. Rozycki <macro@imgtec.com>
+ Matthew Fortune <matthew.fortune@imgtec.com>
+
+ * elf/mips.h (E_MIPS_MACH_IAMR2): New macro.
+ (AFL_EXT_INTERAPTIV_MR2): Likewise.
+ * opcode/mips.h: Document new operand codes defined.
+ (INSN_INTERAPTIV_MR2): New macro.
+ (INSN_CHIP_MASK): Adjust accordingly.
+ (CPU_INTERAPTIV_MR2): New macro.
+ (cpu_is_member) <CPU_INTERAPTIV_MR2>: New case.
+ (MIPS16_ALL_ARGS): Rename to...
+ (MIPS_SVRS_ALL_ARGS): ... this.
+ (MIPS16_ALL_STATICS): Rename to...
+ (MIPS_SVRS_ALL_STATICS): ... this.
+
+2017-06-26 Kuan-Lin Chen <rufus@andestech.com>
+
+ * elf/riscv.h (R_RISCV_32_PCREL): New.
+
+2017-06-24 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
+ * elf/arm.h (TAG_CPU_ARCH_V8R): New macro.
+ * opcode/arm.h (ARM_EXT2_V8A): New macro.
+ (ARM_AEXT2_V8A): Rename into ...
+ (ARM_AEXT2_V8AR): This.
+ (ARM_AEXT2_V8A): New macro.
+ (ARM_AEXT_V8R): New macro.
+ (ARM_AEXT2_V8R): New macro.
+ (ARM_ARCH_V8R): New macro.
+
+2017-06-24 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
+ * opcode/arm.h (ARM_AEXT_V4TxM): Add ARM_EXT_OS bit to the set.
+ (ARM_AEXT_V4T): Likewise.
+ (ARM_AEXT_V5TxM): Likewise.
+ (ARM_AEXT_V5T): Likewise.
+ (ARM_AEXT_V6M): Mask off ARM_EXT_OS bit.
+
+2017-06-22 H.J. Lu <hongjiu.lu@intel.com>
+
+ * bfdlink.h (bfd_link_info): Add shstk.
+ * elf/common.h (GNU_PROPERTY_X86_FEATURE_1_SHSTK): New.
+
+2017-06-22 H.J. Lu <hongjiu.lu@intel.com>
+
+ * bfdlink.h (bfd_link_info): Add ibtplt and ibt.
+ * elf/common.h (GNU_PROPERTY_X86_FEATURE_1_AND): New.
+ (GNU_PROPERTY_X86_FEATURE_1_IBT): Likewise.
+
+2017-06-21 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
+ * opcode/arm.h (FPU_ANY): New macro.
+
+2017-06-20 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
+
+ * elf/s390.h (PT_S390_PGSTE): Define macro.
+
+2017-06-16 Alan Modra <amodra@gmail.com>
+
+ PR ld/20022
+ PR ld/21557
+ PR ld/21562
+ PR ld/21571
+ * bfdlink.h (struct bfd_link_hash_entry): Delete undef.section.
+
+2017-06-14 Yao Qi <yao.qi@linaro.org>
+
+ * dis-asm.h (print_insn_aarch64): Move it to opcodes/disassemble.h.
+ (print_insn_big_arm, print_insn_big_mips): Likewise.
+ (print_insn_i386, print_insn_ia64): Likewise.
+ (print_insn_little_arm, print_insn_little_mips): Likewise.
+ (print_insn_spu): Likewise.
+
+2017-06-06 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * bfdlink.h (struct bfd_link_info): Add new resolve_section_groups
+ flag.
+
+2017-06-01 Alan Modra <amodra@gmail.com>
+
+ * elf/ppc64.h (PPC64_OPT_LOCALENTRY): Define.
+
+2017-05-31 Eli Zaretskii <eliz@gnu.org>
+
+ * environ.h: Add #ifndef guard.
+
+2017-05-30 Anton Kolesov <anton.kolesov@synopsys.com>
+
+ * elf/arc-cpu.def: New file.
+
+2017-05-24 Yao Qi <yao.qi@linaro.org>
+
+ * dis-asm.h: Move some function declarations to
+ opcodes/disassemble.h.
+
+2017-05-24 Yao Qi <yao.qi@linaro.org>
+
+ * dis-asm.h (disassembler): Update declaration.
+
+2017-05-23 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * opcode/arc.h (MAX_INSN_FLGS): Update to 4.
+
+2017-05-22 H.J. Lu <hongjiu.lu@intel.com>
+
+ * include/opcode/i386.h (NOTRACK_PREFIX_OPCODE): New.
+
+2017-05-19 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * elf/sparc.h (ELF_SPARC_HWCAP2_SPARC6): Define.
+ (ELF_SPARC_HWCAP2_ONADDSUB): Likewise.
+ (ELF_SPARC_HWCAP2_ONMUL): Likewise.
+ (ELF_SPARC_HWCAP2_ONDIV): Likewise.
+ (ELF_SPARC_HWCAP2_DICTUNP): Likewise.
+ (ELF_SPARC_HWCAP2_FPCMPSHL): Likewise.
+ (ELF_SPARC_HWCAP2_RLE): Likewise.
+ (ELF_SPARC_HWCAP2_SHA3): Likewise.
+ * opcode/sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_M8
+ and adjust SPARC_OPCODE_ARCH_MAX.
+ (HWCAP2_SPARC6): Define.
+ (HWCAP2_ONADDSUB): Likewise.
+ (HWCAP2_ONMUL): Likewise.
+ (HWCAP2_ONDIV): Likewise.
+ (HWCAP2_DICTUNP): Likewise.
+ (HWCAP2_FPCMPSHL): Likewise.
+ (HWCAP2_RLE): Likewise.
+ (HWCAP2_SHA3): Likewise.
+ (OPM): Likewise.
+ (OPMI): Likewise.
+ (ONFCN): Likewise.
+ (REVFCN): Likewise.
+ (SIMM10): Likewise.
+
+2017-05-16 Alan Modra <amodra@gmail.com>
+
+ * bfdlink.h (struct bfd_link_hash_entry <non_ir_ref>): Rename to
+ non_ir_ref_regular.
+
+2017-05-16 Alan Modra <amodra@gmail.com>
+
+ * bfdlink.h (struct bfd_link_hash_entry): Update non_ir_ref
+ comment. Rename dynamic_ref_after_ir_def to non_ir_ref_dynamic.
+
+2017-05-15 Maciej W. Rozycki <macro@imgtec.com>
+ Matthew Fortune <matthew.fortune@imgtec.com>
+
+ * elf/mips.h (AFL_ASE_MIPS16E2): New macro.
+ (AFL_ASE_MASK): Adjust accordingly.
+ * opcode/mips.h: Document new operand codes defined.
+ (mips_operand_type): Add OP_REG28 enum value.
+ (INSN2_SHORT_ONLY): Update description.
+ (ASE_MIPS16E2, ASE_MIPS16E2_MT): New macros.
+
+2017-05-14 John David Anglin <danglin@gcc.gnu.org>
+
+ * opcode/hppa.h: Fix match and mask for 64-bit bb opcode.
+
+2017-05-10 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * elf/arc.h (SHT_ARC_ATTRIBUTES): Define.
+ (Tag_ARC_*): Define.
+ (E_ARC_OSABI_V4): Define.
+ (E_ARC_OSABI_CURRENT): Reassign it.
+ (TAG_CPU_*): Define.
+ * opcode/arc-attrs.h: New file.
+ * opcode/arc.h (insn_subclass_t): Assign enum values.
+ (insn_subclass_t): Update enum with QUARKSE1, QUARKSE2, and LL64.
+ (ARC_EA, ARC_CD, ARC_LLOCK, ARC_ATOMIC, ARC_MPY, ARC_MULT)
+ (ARC_NPS400, ARC_DPFP, ARC_SPFP, ARC_FPU, ARC_FPUDA, ARC_SWAP)
+ (ARC_NORM, ARC_BSCAN, ARC_UIX, ARC_TSTAMP, ARC_VBFDW)
+ (ARC_BARREL, ARC_DSPA, ARC_SHIFT, ARC_INTR, ARC_DIV, ARC_XMAC)
+ (ARC_CRC): Delete.
+
+2017-04-20 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR ld/21382
+ * bfdlink.h (bfd_link_hash_entry): Add dynamic_ref_after_ir_def.
+
+2017-04-19 Alan Modra <amodra@gmail.com>
+
+ * bfdlink.h (struct bfd_link_info <dynamic_undefined_weak>):
+ Revise comment.
+
+2017-04-11 Alan Modra <amodra@gmail.com>
+
+ * opcode/ppc.h (PPC_OPCODE_ALTIVEC2): Delete.
+ (PPC_OPCODE_VSX3): Delete.
+ (PPC_OPCODE_HTM): Delete.
+ (PPC_OPCODE_*): Renumber and order chronologically.
+ (PPC_OPCODE_SPE): Comment on this and other bits used for APUinfo.
+
+2017-04-06 Pip Cet <pipcet@gmail.com>
+
+ * dis-asm.h: Add prototypes for wasm32 disassembler.
+
+2017-04-05 Pedro Alves <palves@redhat.com>
+
+ * dis-asm.h (disassemble_info) <disassembler_options>: Now a
+ "const char *".
+ (next_disassembler_option): Constify.
+
+2017-04-04 H.J. Lu <hongjiu.lu@intel.com>
+
+ * elf/common.h (PT_GNU_MBIND_NUM): New.
+ (PT_GNU_MBIND_LO): Likewise.
+ (PT_GNU_MBIND_HI): Likewise.
+ (SHF_GNU_MBIND): Likewise.
+
+2017-04-03 Palmer Dabbelt <palmer@dabbelt.com>
+
+ * elf/riscv.h (RISCV_GP_SYMBOL): New define.
+
+2017-03-27 Andrew Waterman <andrew@sifive.com>
+
+ * opcode/riscv-opc.h (CSR_PMPCFG0): New define.
+ (CSR_PMPCFG1): Likewise.
+ (CSR_PMPCFG2): Likewise.
+ (CSR_PMPCFG3): Likewise.
+ (CSR_PMPADDR0): Likewise.
+ (CSR_PMPADDR1): Likewise.
+ (CSR_PMPADDR2): Likewise.
+ (CSR_PMPADDR3): Likewise.
+ (CSR_PMPADDR4): Likewise.
+ (CSR_PMPADDR5): Likewise.
+ (CSR_PMPADDR6): Likewise.
+ (CSR_PMPADDR7): Likewise.
+ (CSR_PMPADDR8): Likewise.
+ (CSR_PMPADDR9): Likewise.
+ (CSR_PMPADDR10): Likewise.
+ (CSR_PMPADDR11): Likewise.
+ (CSR_PMPADDR12): Likewise.
+ (CSR_PMPADDR13): Likewise.
+ (CSR_PMPADDR14): Likewise.
+ (CSR_PMPADDR15): Likewise.
+ (pmpcfg0): Declare register.
+ (pmpcfg1): Likewise.
+ (pmpcfg2): Likewise.
+ (pmpcfg3): Likewise.
+ (pmpaddr0): Likewise.
+ (pmpaddr1): Likewise.
+ (pmpaddr2): Likewise.
+ (pmpaddr3): Likewise.
+ (pmpaddr4): Likewise.
+ (pmpaddr5): Likewise.
+ (pmpaddr6): Likewise.
+ (pmpaddr7): Likewise.
+ (pmpaddr8): Likewise.
+ (pmpaddr9): Likewise.
+ (pmpaddr10): Likewise.
+ (pmpaddr11): Likewise.
+ (pmpaddr12): Likewise.
+ (pmpaddr13): Likewise.
+ (pmpaddr14): Likewise.
+ (pmpaddr15): Likewise.
+
+2017-03-30 Pip Cet <pipcet@gmail.com>
+
+ * opcode/wasm.h: New file to support wasm32 architecture.
+ * elf/wasm32.h: Add R_WASM32_32 relocation.
+
+2017-03-29 Alan Modra <amodra@gmail.com>
+
+ * opcode/ppc.h (PPC_OPCODE_RAW): Define.
+ (PPC_OPCODE_*): Make them all unsigned long long constants.
+
+2017-03-27 Pip Cet <pipcet@gmail.com>
+
+ * elf/wasm32.h: New file to support wasm32 architecture.
+
+2017-03-27 Rinat Zelig <rinat@mellanox.com>
+
+ * opcode/arc.h (insn_class_t): Add ULTRAIP and MISC class.
+
+2017-03-21 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
+
+ * opcode/s390.h (S390_INSTR_FLAG_VX2): Remove.
+ (S390_INSTR_FLAG_FACILITY_MASK): Adjust value.
+
+2017-03-21 Rinat Zelig <rinat@mellanox.com>
+
+ * opcode/arc.h (insn_class_t): Add DMA class.
+
2017-03-16 Nick Clifton <nickc@redhat.com>
* elf/common.h (GNU_BUILD_ATTRIBUTE_SHORT_ENUM): New GNU BUILD
projects / deliverable / binutils-gdb.git / blobdiff