Update the handling of shift rotate and load/store multiple instructions in the...
[deliverable/binutils-gdb.git] / include / ChangeLog
index ed5dcf2cc32dfc1ba40b1497be5d8390ad716e54..9d55a1f2916e52bb34fa3193ec731d3fa3d0fb76 100644 (file)
-2018-10-09  Sudakshina Das  <sudi.das@arm.com>
+2019-08-08  Yoshinori Sato  <ysato@users.sourceforge.jp>
 
-       * opcode/aarch64.h (AARCH64_FEATURE_SCXTNUM): New.
-       (AARCH64_FEATURE_ID_PFR2): New.
-       (AARCH64_ARCH_V8_5): Add both by default.
+       * opcode/h8300.h (EXPAND_UNOP_EXTENDED_B): Add MODEL.
+       (EXPAND_UNOP_EXTENDED_W): Likewise.
+       (EXPAND_UNOP_EXTENDED_L): Likewise.
+       (struct h8_opcode h8_opcodes): Likewise.
+       (struct h8_opcode h8_opcodes): tas / ldm / stm supported H8S or
+       later.
 
-2018-10-09  Sudakshina Das  <sudi.das@arm.com>
+2019-07-24  Claudiu Zissulescu  <claziss@synopsys.com>
 
-       * opcode/aarch64.h (AARCH64_FEATURE_BTI): New.
-       (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_BTI by default.
-       (aarch64_opnd): Add AARCH64_OPND_BTI_TARGET.
-       (HINT_OPD_CSYNC, HINT_OPD_C, HINT_OPD_J): New macros to
-       define HINT #imm values.
-       (HINT_OPD_JC, HINT_OPD_NULL): Likewise.
+       * opcode/arc.h (FASTMATH): Add.
+       (SWITCH): Likewise.
 
-2018-10-09  Sudakshina Das  <sudi.das@arm.com>
+2019-07-24  Alan Modra  <amodra@gmail.com>
 
-       * opcode/aarch64.h (AARCH64_FEATURE_RNG): New.
+       * elf/internal.h (ELF_SECTION_IN_SEGMENT_1): Exclude non-alloc
+       sections in GNU_MBIND segments.
 
-2018-10-09  Sudakshina Das  <sudi.das@arm.com>
+2019-07-23  Omar Majid  <omajid@redhat.com>
 
-       * opcode/aarch64.h (AARCH64_FEATURE_CVADP): New.
+       * coff/i386.h (IMAGE_FILE_MACHINE_NATIVE_APPLE_OVERRIDE): Define.
+       (IMAGE_FILE_MACHINE_NATIVE_FREEBSD_OVERRIDE): Define.
+       (IMAGE_FILE_MACHINE_NATIVE_LINUX_OVERRIDE): Define.
+       (IMAGE_FILE_MACHINE_NATIVE_NETBSD_OVERRIDE): Define.
+       (I386_APPLE_MAGIC): Define.
+       (I386_FREEBSD_MAGIC): Define.
+       (I386_LINUX_MAGIC): Define.
+       (I386_NETBSD_MAGIC): Define.
+       (I386BADMAG): Extend macro to allow new magic numbers.
+       * coff/x86_64.h (IMAGE_FILE_MACHINE_NATIVE_APPLE_OVERRIDE): Define.
+       (IMAGE_FILE_MACHINE_NATIVE_FREEBSD_OVERRIDE): Define.
+       (IMAGE_FILE_MACHINE_NATIVE_LINUX_OVERRIDE): Define.
+       (IMAGE_FILE_MACHINE_NATIVE_NETBSD_OVERRIDE): Define.
+       (AMD64_APPLE_MAGIC): Define.
+       (AMD64_FREEBSD_MAGIC): Define.
+       (AMD64_LINUX_MAGIC): Define.
+       (AMD64_NETBSD_MAGIC): Define.
+       (AMD64BADMAG): Extend macro to allow new magic numbers.
+
+2019-07-19  Alan Modra  <amodra@gmail.com>
+
+       * elf/ppc64.h (R_PPC64_TPREL34, R_PPC64_DTPREL34),
+       (R_PPC64_GOT_TLSGD34, R_PPC64_GOT_TLSLD34),
+       (R_PPC64_GOT_TPREL34, R_PPC64_GOT_DTPREL34): Define.
+       (IS_PPC64_TLS_RELOC): Include new tls relocs.
+
+2019-07-18  Nick Alcock  <nick.alcock@oracle.com>
+
+       * ctf-api.h (ECTF_NOTFUNC): Fix description.
+       (ctf_func_type_info): New.
+       (ctf_func_type_args): Likewise.
+       (ctf_type_aname_raw): Likewise.
+
+2019-07-16  Jan Beulich  <jbeulich@suse.com>
+
+       * opcode/i386.h (POP_SEG386_SHORT): New.
+
+2019-07-01  Matthew Malcomson  <matthew.malcomson@arm.com>
+
+       * opcode/aarch64.h (enum aarch64_insn_class): sve_size_013
+       renamed to sve_size_13.
+
+2019-06-19  Nick Alcock <nick.alcock@oracle.com>
+
+       * ctf.h (ctf_slice_t): Make cts_offset and cts_bits unsigned
+       short, so following structures are properly aligned.
+
+2019-06-14  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+
+       * elf/aarch64.h (R_AARCH64_P32_MOVW_PREL_G0): Define.
+       (R_AARCH64_P32_MOVW_PREL_G0_NC): Define.
+       (R_AARCH64_P32_MOVW_PREL_G1): Define.
+
+2019-06-03  Nick Alcock  <nick.alcock@oracle.com>
+
+       * ctf.h (ctf_enum.cte_value): Fix type to int32_t.
+
+2019-05-29  Nick Alcock  <nick.alcock@oracle.com>
+
+       * ctf-api.h (ctf_sect_t): Drop cts_type, cts_flags, and cts_offset.
+       (ctf_id_t): This is now an unsigned type.
+       (CTF_ERR): Cast it to ctf_id_t.  Note that it should only be used
+       for ctf_id_t-returning functions.
+
+2019-05-28  Nick Alcock  <nick.alcock@oracle.com>
+
+       * ctf-api.h (ctf_dump_decorate_f): New.
+       (ctf_dump_state_t): new.
+       (ctf_dump): New.
+
+2019-05-28  Nick Alcock  <nick.alcock@oracle.com>
+
+       * ctf-api.h (ctf_label_f): New.
+       (ctf_label_set): New.
+       (ctf_label_get): New.
+       (ctf_label_topmost): New.
+       (ctf_label_info): New.
+       (ctf_label_iter): New.
+
+2019-05-28  Nick Alcock  <nick.alcock@oracle.com>
+
+       * ctf-api.h (ctf_version): New.
+
+2019-05-28  Nick Alcock  <nick.alcock@oracle.com>
+
+       * ctf-api.h (ctf_func_info): New.
+       (ctf_func_args): Likewise.
+       (ctf_lookup_by_symbol): Likewise.
+       (ctf_lookup_by_symbol): Likewise.
+       (ctf_lookup_variable): Likewise.
+
+2019-05-28  Nick Alcock  <nick.alcock@oracle.com>
+
+       * ctf-api.h (ctf_visit_f): New definition.
+       (ctf_member_f): Likewise.
+       (ctf_enum_f): Likewise.
+       (ctf_variable_f): Likewise.
+       (ctf_type_f): Likewise.
+       (ctf_type_isparent): Likewise.
+       (ctf_type_ischild): Likewise.
+       (ctf_type_resolve): Likewise.
+       (ctf_type_aname): Likewise.
+       (ctf_type_lname): Likewise.
+       (ctf_type_name): Likewise.
+       (ctf_type_sizee): Likewise.
+       (ctf_type_align): Likewise.
+       (ctf_type_kind): Likewise.
+       (ctf_type_reference): Likewise.
+       (ctf_type_pointer): Likewise.
+       (ctf_type_encoding): Likewise.
+       (ctf_type_visit): Likewise.
+       (ctf_type_cmp): Likewise.
+       (ctf_type_compat): Likewise.
+       (ctf_member_info): Likewise.
+       (ctf_array_info): Likewise.
+       (ctf_enum_name): Likewise.
+       (ctf_enum_value): Likewise.
+       (ctf_member_iter): Likewise.
+       (ctf_enum_iter): Likewise.
+       (ctf_type_iter): Likewise.
+       (ctf_variable_iter): Likewise.
+
+2019-05-28  Nick Alcock  <nick.alcock@oracle.com>
+
+       * ctf-api.h (struct bfd): New forward.
+       (ctf_fdopen): New.
+       (ctf_bfdopen): Likewise.
+       (ctf_open): Likewise.
+       (ctf_arc_open): Likewise.
+
+2019-05-28  Nick Alcock  <nick.alcock@oracle.com>
+
+       * ctf.h (CTFA_MAGIC): New.
+       (struct ctf_archive): New.
+       (struct ctf_archive_modent): Likewise.
+       * ctf-api.h (ctf_archive_member_f): New.
+       (ctf_archive_raw_member_f): Likewise.
+       (ctf_arc_write): Likewise.
+       (ctf_arc_close): Likewise.
+       (ctf_arc_open_by_name): Likewise.
+       (ctf_archive_iter): Likewise.
+       (ctf_archive_raw_iter): Likewise.
+       (ctf_get_arc): Likewise.
+
+2019-05-28  Nick Alcock  <nick.alcock@oracle.com>
+
+       * ctf-api.h (ctf_file_close): New declaration.
+       (ctf_getdatasect): Likewise.
+       (ctf_parent_file): Likewise.
+       (ctf_parent_name): Likewise.
+       (ctf_parent_name_set): Likewise.
+       (ctf_import): Likewise.
+       (ctf_setmodel): Likewise.
+       (ctf_getmodel): Likewise.
+       (ctf_setspecific): Likewise.
+       (ctf_getspecific): Likewise.
+
+2019-05-28  Nick Alcock  <nick.alcock@oracle.com>
+
+       * ctf-api.h (zlib.h): New include.
+       (ctf_sect_t): New.
+       (ctf_sect_names_t): Likewise.
+       (ctf_encoding_t): Likewise.
+       (ctf_membinfo_t): Likewise.
+       (ctf_arinfo_t): Likewise.
+       (ctf_funcinfo_t): Likewise.
+       (ctf_lblinfo_t): Likewise.
+       (ctf_snapshot_id_t): Likewise.
+       (CTF_FUNC_VARARG): Likewise.
+       (ctf_simple_open): Likewise.
+       (ctf_bufopen): Likewise.
+       (ctf_create): Likewise.
+       (ctf_add_array): Likewise.
+       (ctf_add_const): Likewise.
+       (ctf_add_enum_encoded): Likewise.
+       (ctf_add_enum): Likewise.
+       (ctf_add_float): Likewise.
+       (ctf_add_forward): Likewise.
+       (ctf_add_function): Likewise.
+       (ctf_add_integer): Likewise.
+       (ctf_add_slice): Likewise.
+       (ctf_add_pointer): Likewise.
+       (ctf_add_type): Likewise.
+       (ctf_add_typedef): Likewise.
+       (ctf_add_restrict): Likewise.
+       (ctf_add_struct): Likewise.
+       (ctf_add_union): Likewise.
+       (ctf_add_struct_sized): Likewise.
+       (ctf_add_union_sized): Likewise.
+       (ctf_add_volatile): Likewise.
+       (ctf_add_enumerator): Likewise.
+       (ctf_add_member): Likewise.
+       (ctf_add_member_offset): Likewise.
+       (ctf_add_member_encoded): Likewise.
+       (ctf_add_variable): Likewise.
+       (ctf_set_array): Likewise.
+       (ctf_update): Likewise.
+       (ctf_snapshot): Likewise.
+       (ctf_rollback): Likewise.
+       (ctf_discard): Likewise.
+       (ctf_write): Likewise.
+       (ctf_gzwrite): Likewise.
+       (ctf_compress_write): Likewise.
+
+2019-05-28  Nick Alcock  <nick.alcock@oracle.com>
+
+       * ctf-api.h (ctf_errno): New declaration.
+       (ctf_errmsg): Likewise.
 
-2018-10-09  Sudakshina Das  <sudi.das@arm.com>
+2019-05-28  Nick Alcock  <nick.alcock@oracle.com>
 
-       * opcode/aarch64.h (AARCH64_FEATURE_PREDRES): New.
-       (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_PREDRES by default.
-       (aarch64_opnd): Add AARCH64_OPND_SYSREG_SR.
-       (aarch64_sys_regs_sr): Declare new table.
+       * ctf-api.h (ctf_setdebug): New.
+       (ctf_getdebug): Likewise.
 
-2018-10-09  Sudakshina Das  <sudi.das@arm.com>
+2019-05-28  Nick Alcock  <nick.alcock@oracle.com>
 
-       * opcode/aarch64.h (AARCH64_FEATURE_SB): New.
-       (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_SB by default.
+       * ctf-api.h: New file.
 
-2018-10-09  Sudakshina Das  <sudi.das@arm.com>
+2019-05-28  Nick Alcock  <nick.alcock@oracle.com>
 
-       * opcode/aarch64.h (AARCH64_FEATURE_FLAGMANIP): New.
-       (AARCH64_FEATURE_FRINTTS): New.
-       (AARCH64_ARCH_V8_5): Add both by default.
+       * ctf.h: New file.
 
-2018-10-09  Sudakshina Das  <sudi.das@arm.com>
+2019-05-24  Szabolcs Nagy  <szabolcs.nagy@arm.com>
 
-       * opcode/aarch64.h (AARCH64_FEATURE_V8_5): New.
-       (AARCH64_ARCH_V8_5): New.
+       * elf/aarch64.h (DT_AARCH64_VARIANT_PCS): Define.
+       (STO_AARCH64_VARIANT_PCS): Define.
 
-2018-10-08  Alan Modra  <amodra@gmail.com>
+2019-05-24  Alan Modra  <amodra@gmail.com>
 
-       * bfdlink.h (struct bfd_link_info): Add load_phdrs field.
+       * elf/ppc64.h (R_PPC64_PLTSEQ_NOTOC, R_PPC64_PLTCALL_NOTOC),
+       (R_PPC64_PCREL_OPT, R_PPC64_D34, R_PPC64_D34_LO, R_PPC64_D34_HI30),
+       (R_PPC64_D34_HA30, R_PPC64_PCREL34, R_PPC64_GOT_PCREL34),
+       (R_PPC64_PLT_PCREL34, R_PPC64_PLT_PCREL34_NOTOC),
+       (R_PPC64_ADDR16_HIGHER34, R_PPC64_ADDR16_HIGHERA34),
+       (R_PPC64_ADDR16_HIGHEST34, R_PPC64_ADDR16_HIGHESTA34),
+       (R_PPC64_REL16_HIGHER34, R_PPC64_REL16_HIGHERA34),
+       (R_PPC64_REL16_HIGHEST34, R_PPC64_REL16_HIGHESTA34),
+       (R_PPC64_D28, R_PPC64_PCREL28): Define.
 
-2018-10-05  Sudakshina Das  <sudi.das@arm.com>
+2019-05-24  Peter Bergner  <bergner@linux.ibm.com>
+           Alan Modra  <amodra@gmail.com>
 
-       * opcode/arm.h (ARM_EXT2_PREDRES): New.
-       (ARM_ARCH_V8_5A): Add ARM_EXT2_PREDRES by default.
+       * dis-asm.h (WIDE_OUTPUT): Define.
+       * opcode/ppc.h (prefix_opcodes, prefix_num_opcodes): Declare.
+       (PPC_OPCODE_POWERXX, PPC_GET_PREFIX, PPC_GET_SUFFIX),
+       (PPC_PREFIX_P, PPC_PREFIX_SEG): Define.
 
-2018-10-05  Sudakshina Das  <sudi.das@arm.com>
+2019-05-23  Jose E. Marchesi  <jose.marchesi@oracle.com>
 
-       * opcode/arm.h (ARM_EXT2_SB): New.
-       (ARM_ARCH_V8_5A): Add ARM_EXT2_SB by default.
+       * elf/bpf.h: New file.
 
-2018-10-05  Sudakshina Das  <sudi.das@arm.com>
+2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
 
-       * opcode/arm.h (ARM_EXT2_V8_5A): New.
-       (ARM_AEXT2_V8_5A, ARM_ARCH_V8_5A): New.
+       * elf/arm.h (Tag_MVE_arch): Define new enum value.
+       * opcode/arm.h (FPU_MVE, FPU_MVE_FP): New MACROs for new features.
 
-2018-10-05  Richard Henderson  <rth@twiddle.net>
+2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
 
-       * elf/or1k.h (elf_or1k_reloc_type): Add R_OR1K_PCREL_PG21,
-       R_OR1K_GOT_PG21, R_OR1K_TLS_GD_PG21, R_OR1K_TLS_LDM_PG21,
-       R_OR1K_TLS_IE_PG21, R_OR1K_LO13, R_OR1K_GOT_LO13,
-       R_OR1K_TLS_GD_LO13, R_OR1K_TLS_LDM_LO13, R_OR1K_TLS_IE_LO13,
-       R_OR1K_SLO13, R_OR1K_PLTA26.
+       * opcode/aarch64.h (enum aarch64_opnd): New SVE_SHLIMM_UNPRED_22
+       operand.
 
-2018-10-05  Richard Henderson  <rth@twiddle.net>
+2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
 
-       * elf/or1k.h (elf_or1k_reloc_type): Add R_OR1K_AHI16,
-       R_OR1K_GOTOFF_AHI16, R_OR1K_TLS_IE_AHI16, R_OR1K_TLS_LE_AHI16,
-       R_OR1K_SLO16, R_OR1K_GOTOFF_SLO16, R_OR1K_TLS_LE_SLO16.
+       * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_tsz_bhs
+       iclass.
 
-2018-10-03  Tamar Christina  <tamar.christina@arm.com>
+2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
 
-       * opcode/aarch64.h (aarch64_inst): Remove.
-       (enum err_type): Add ERR_VFI.
-       (aarch64_is_destructive_by_operands): New.
-       (init_insn_sequence): New.
-       (aarch64_decode_insn): Remove param name.
+       * opcode/aarch64.h (enum aarch64_opnd): New SVE_Zm4_11_INDEX operand.
 
-2018-10-03  Tamar Christina  <tamar.christina@arm.com>
+2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
 
-       * opcode/aarch64.h (struct aarch64_opcode): Expand verifiers to take
-       more arguments.
+       * opcode/aarch64.h (enum aarch64_insn_class): Add sve_shift_tsz_bhsd
+       iclass.
 
-2018-10-03  Tamar Christina  <tamar.christina@arm.com>
+2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
 
-       * opcode/aarch64.h (enum err_type): New.
-       (aarch64_decode_insn): Use it.
+       * opcode/aarch64.h (enum aarch64_opnd): New SVE_SHRIMM_UNPRED_22
+       operand.
+       (enum aarch64_insn_class): Add sve_shift_tsz_hsd iclass.
 
-2018-10-03  Tamar Christina  <tamar.christina@arm.com>
+2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
 
-       * opcode/aarch64.h (struct aarch64_instr_sequence): New.
-       (aarch64_opcode_encode): Use it.
+       * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_013 iclass.
 
-2018-10-03  Tamar Christina  <tamar.christina@arm.com>
+2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
 
-       * opcode/aarch64.h (struct aarch64_opcode): Add constraints,
-       extend flags field size.
-       (F_SCAN, C_SCAN_MOVPRFX, C_MAX_ELEM): New.
+       * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_bh iclass.
 
-2018-10-03  John Darrington <john@darrington.wattle.id.au>
+2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
 
-       * dis-asm.h (print_insn_s12z): New declaration.
+       * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_sd2 iclass.
 
-2018-10-02  Palmer Dabbelt  <palmer@sifive.com>
+2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
 
-       * opcode/riscv-opc.h (MATCH_FENCE_TSO): New define.
-       (MASK_FENCE_TSO): Likewise.
+       * opcode/aarch64.h (enum aarch64_opnd): New SVE_ADDR_ZX operand.
 
-2018-10-01  Cupertino Miranda <cmiranda@synopsys.com>
+2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
 
-       * arc-reloc.def (ARC_TLS_LE_32): Updated reloc formula.
+       * opcode/aarch64.h (enum aarch64_opnd): New SVE_Zm3_11_INDEX operand.
 
-2018-09-21  H.J. Lu  <hongjiu.lu@intel.com>
+2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
 
-       PR binutils/23694
-       * include/elf/internal.h (ELF_SECTION_IN_SEGMENT_1): Don't
-       include zero size sections at start of PT_NOTE segment.
+       * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_hsd2 iclass.
 
-2018-09-20  Nelson Chu <nelson.chu1990@gmail.com>
+2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
 
-       * elf/nds32.h: Remove the unused target features.
-       * dis-asm.h (disassemble_init_nds32): Declared.
-       * elf/nds32.h (E_NDS32_NULL): Removed.
-       (E_NDS32_HAS_DSP_INST, E_NDS32_HAS_ZOL): New.
-       * opcode/nds32.h: Ident.
-       (N32_SUB6, INSN_LW): New macros.
-       (enum n32_opcodes): Updated.
-       * elf/nds32.h: Doc fixes.
-       * elf/nds32.h: Add R_NDS32_LSI.
-       * elf/nds32.h: Add new relocations for TLS.
+       * opcode/aarch64.h (enum aarch64_opnd): New SVE_IMM_ROT3 operand.
 
-2018-09-20  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
+2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
 
-       * elf/common.h (AT_SUN_HWCAP): Rename to ...
-       (AT_SUN_CAP_HW1): ... this.  Retain old name for backward
-       compatibility.
-       (AT_SUN_EMULATOR, AT_SUN_BRANDNAME, AT_SUN_BRAND_AUX1)
-       (AT_SUN_BRAND_AUX2, AT_SUN_BRAND_AUX3, AT_SUN_CAP_HW2): Define.
+       * opcode/aarch64.h (AARCH64_FEATURE_SVE2
+       AARCH64_FEATURE_SVE2_AES, AARCH64_FEATURE_SVE2_BITPERM,
+       AARCH64_FEATURE_SVE2_SM4, AARCH64_FEATURE_SVE2_SHA3): New
+       feature macros.
 
-2018-09-05  Simon Marchi  <simon.marchi@ericsson.com>
+2019-05-06  Andrew Bennett  <andrew.bennett@imgtec.com>
+           Faraz Shahbazker  <fshahbazker@wavecomp.com>
 
-       * diagnostics.h (DIAGNOSTIC_IGNORE_FORMAT_NONLITERAL): New macro.
+       * opcode/mips.h (ASE_EVA_R6): New macro.
+       (M_LLWPE_AB, M_SCWPE_AB): New enum values.
 
-2018-08-31  Alan Modra  <amodra@gmail.com>
+2019-05-01  Sudakshina Das  <sudi.das@arm.com>
 
-       * elf/ppc64.h (R_PPC64_REL16_HIGH, R_PPC64_REL16_HIGHA),
-       (R_PPC64_REL16_HIGHER, R_PPC64_REL16_HIGHERA),
-       (R_PPC64_REL16_HIGHEST, R_PPC64_REL16_HIGHESTA): Define.
-       (R_PPC64_LO_DS_OPT, R_PPC64_16DX_HA): Bump value.
-
-2018-08-30  Kito Cheng  <kito@andestech.com>
-
-       * opcode/riscv.h (MAX_SUBSET_NUM): New.
-       (riscv_opcode): Add xlen_requirement field and change type of
-       subset.
-
-2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
-
-       * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS264E.
-       * opcode/mips.h (CPU_XXX): New CPU_GS264E.
-
-2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
+       * opcode/aarch64.h (AARCH64_FEATURE_TME): New.
+       (enum aarch64_opnd): Add AARCH64_OPND_TME_UIMM16.
 
-       * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS464E.
-       * opcode/mips.h (CPU_XXX): New CPU_GS464E.
-
-2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
-
-       * elf/mips.h (E_MIPS_MACH_XXX): Rename E_MIPS_MACH_LS3A to
-       E_MIPS_MACH_GS464.
-       (AFL_EXT_XXX): Delete AFL_EXT_LOONGSON_3A.
-       * opcode/mips.h (INSN_XXX): Delete INSN_LOONGSON_3A.
-       (CPU_XXX): Rename CPU_LOONGSON_3A to CPU_GS464.
-       * opcode/mips.h (mips_isa_table): Delete CPU_LOONGSON_3A case.
+2019-04-26  Andrew Bennett  <andrew.bennett@imgtec.com>
+           Faraz Shahbazker  <fshahbazker@wavecomp.com>
 
-2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
+       * opcode/mips.h (M_LLWP_AB, M_LLDP_AB): New enum values.
+       (M_SCWP_AB, M_SCDP_AB): Likewise.
 
-       * elf/mips.h (AFL_ASE_LOONGSON_EXT2): New macro.
-       (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT2.
-       * opcode/mips.h (ASE_LOONGSON_EXT2): New macro.
+2019-04-25  Maciej W. Rozycki  <macro@linux-mips.org>
 
-2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
+       * opcode/mips.h: Update comment for MIPS32 CODE20 operand.
 
-        * elf/mips.h (AFL_ASE_LOONGSON_EXT): New macro.
-        (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT.
-        * opcode/mips.h (ASE_LOONGSON_EXT): New macro.
+2019-04-15  Sudakshina Das  <sudi.das@arm.com>
 
-2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
+       * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF12.
 
-       * elf/mips.h (AFL_ASE_LOONGSON_CAM): New macro.
-       (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_CAM.
-       * opcode/mips.h (ASE_LOONGSON_CAM): New macro.
+2019-04-15  Sudakshina Das  <sudi.das@arm.com>
 
-2018-08-24  H.J. Lu  <hongjiu.lu@intel.com>
+       * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF18.
 
-       * elf/common.h (GNU_PROPERTY_X86_ISA_1_USED): Renamed to ...
-       (GNU_PROPERTY_X86_COMPAT_ISA_1_USED): This.
-       (GNU_PROPERTY_X86_ISA_1_NEEDED): Renamed to ...
-       (GNU_PROPERTY_X86_COMPAT_ISA_1_NEEDED): This.
-       (GNU_PROPERTY_X86_ISA_1_XXX): Renamed to ...
-       (GNU_PROPERTY_X86_COMPAT_ISA_1_XXX): This.
-       (GNU_PROPERTY_X86_UINT32_AND_LO): New.
-       (GNU_PROPERTY_X86_UINT32_AND_HI): Likewise.
-       (GNU_PROPERTY_X86_UINT32_OR_LO): Likewise.
-       (GNU_PROPERTY_X86_UINT32_OR_HI): Likewise.
-       (GNU_PROPERTY_X86_UINT32_OR_AND_LO): Likewise.
-       (GNU_PROPERTY_X86_UINT32_OR_AND_HI): Likewise.
-       (GNU_PROPERTY_X86_ISA_1_CMOV): Likewise.
-       (GNU_PROPERTY_X86_ISA_1_SSE): Likewise.
-       (GNU_PROPERTY_X86_ISA_1_SSE2): Likewise.
-       (GNU_PROPERTY_X86_ISA_1_SSE3): Likewise.
-       (GNU_PROPERTY_X86_ISA_1_SSSE3): Likewise.
-       (GNU_PROPERTY_X86_ISA_1_SSE4_1): Likewise.
-       (GNU_PROPERTY_X86_ISA_1_SSE4_2): Likewise.
-       (GNU_PROPERTY_X86_ISA_1_AVX): Likewise.
-       (GNU_PROPERTY_X86_ISA_1_AVX2): Likewise.
-       (GNU_PROPERTY_X86_ISA_1_FMA): Likewise.
-       (GNU_PROPERTY_X86_ISA_1_AVX512F): Likewise.
-       (GNU_PROPERTY_X86_ISA_1_AVX512CD): Likewise.
-       (GNU_PROPERTY_X86_ISA_1_AVX512ER): Likewise.
-       (GNU_PROPERTY_X86_ISA_1_AVX512PF): Likewise.
-       (GNU_PROPERTY_X86_ISA_1_AVX512VL): Likewise.
-       (GNU_PROPERTY_X86_ISA_1_AVX512DQ): Likewise.
-       (GNU_PROPERTY_X86_ISA_1_AVX512BW): Likewise.
-       (GNU_PROPERTY_X86_ISA_1_AVX512_4FMAPS): Likewise.
-       (GNU_PROPERTY_X86_ISA_1_AVX512_4VNNIW): Likewise.
-       (GNU_PROPERTY_X86_ISA_1_AVX512_BITALG): Likewise.
-       (GNU_PROPERTY_X86_ISA_1_AVX512_IFMA): Likewise.
-       (GNU_PROPERTY_X86_ISA_1_AVX512_VBMI): Likewise.
-       (GNU_PROPERTY_X86_ISA_1_AVX512_VBMI2): Likewise.
-       (GNU_PROPERTY_X86_ISA_1_AVX512_VNNI): Likewise.
-       (GNU_PROPERTY_X86_FEATURE_2_X86): Likewise.
-       (GNU_PROPERTY_X86_FEATURE_2_X87): Likewise.
-       (GNU_PROPERTY_X86_FEATURE_2_MMX): Likewise.
-       (GNU_PROPERTY_X86_FEATURE_2_XMM): Likewise.
-       (GNU_PROPERTY_X86_FEATURE_2_YMM): Likewise.
-       (GNU_PROPERTY_X86_FEATURE_2_ZMM): Likewise.
-       (GNU_PROPERTY_X86_FEATURE_2_FXSR): Likewise.
-       (GNU_PROPERTY_X86_FEATURE_2_XSAVE): Likewise.
-       (GNU_PROPERTY_X86_FEATURE_2_XSAVEOPT): Likewise.
-       (GNU_PROPERTY_X86_FEATURE_2_XSAVEC): Likewise.
-       (GNU_PROPERTY_X86_FEATURE_1_AND): Updated to
-       (GNU_PROPERTY_X86_UINT32_AND_LO + 0).
-       (GNU_PROPERTY_X86_ISA_1_NEEDED): Defined to
-       (GNU_PROPERTY_X86_UINT32_OR_LO + 0).
-       (GNU_PROPERTY_X86_FEATURE_2_NEEDED): New.  Defined to
-       (GNU_PROPERTY_X86_UINT32_OR_LO + 1).
-       (GNU_PROPERTY_X86_ISA_1_USED): Defined to
-       (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 0).
-       (GNU_PROPERTY_X86_FEATURE_2_USED): New.  Defined to
-       (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 1).
+2019-04-15  Sudakshina Das  <sudi.das@arm.com>
 
-2018-08-24  H.J. Lu  <hongjiu.lu@intel.com>
+       * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF16.
 
-       * elf/common.h (GNU_PROPERTY_X86_UINT32_VALID): New.
+2019-04-15  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 
-2018-08-21  John Darrington  <john@darrington.wattle.id.au>
+       * elf/arm.h (TAG_CPU_ARCH_V8_1M_MAIN): new macro.
+       (MAX_TAG_CPU_ARCH): Set value to above macro.
+       * opcode/arm.h (ARM_EXT2_V8_1M_MAIN): New macro.
+       (ARM_AEXT_V8_1M_MAIN): Likewise.
+       (ARM_AEXT2_V8_1M_MAIN): Likewise.
+       (ARM_ARCH_V8_1M_MAIN): Likewise.
 
-       * elf/s12z.h: Rename R_S12Z_UKNWN_3 to R_S12Z_EXT18.
+2019-04-11  Sudakshina Das  <sudi.das@arm.com>
 
-2018-08-21  Alan Modra  <amodra@gmail.com>
+       * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_Rt_SP.
 
-       * opcode/ppc.h (struct powerpc_operand): Correct "insert" comment.
-       Mention use of "extract" function to provide default value.
-       (PPC_OPERAND_OPTIONAL_VALUE): Delete.
-       (ppc_optional_operand_value): Rewrite to use extract function.
+2019-04-08  H.J. Lu  <hongjiu.lu@intel.com>
 
-2018-08-18  John Darrington  <john@darrington.wattle.id.au>
+       * elf/common.h (GNU_PROPERTY_X86_ISA_1_AVX512_BF16): New.
 
-       * opcode/s12z.h: New file.
+2019-04-07  Alan Modra  <amodra@gmail.com>
 
-2018-08-09  Richard Earnshaw  <rearnsha@arm.com>
+       Merge from gcc.
+       2019-04-03  Vineet Gupta  <vgupta@synopsys.com>
+       PR89877
+       * longlong.h [__arc__] (add_ssaaaa): Add cc clobber.
+       (sub_ddmmss): Likewise.
 
-       * elf/arm.h: Updated comments for e_flags definitions.
+2019-04-06  H.J. Lu  <hongjiu.lu@intel.com>
 
-2018-08-06  Claudiu Zissulescu  <claziss@synopsys.com>
+       * bfdlink.h (bfd_link_info): Remove x86-specific linker options.
 
-       * elf/arc.h (Tag_ARC_ATR_version): New tag.
+2019-04-01  Andre Vieira  <andre.simoesdiasvieira@arm.com>
 
-2018-08-06  Claudiu Zissulescu  <claziss@synopsys.com>
+       * opcode/arm.h (FPU_NEON_ARMV8_1): New.
+       (FPU_ARCH_NEON_VFP_ARMV8_1): Use FPU_NEON_ARMV8_1.
+       (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1): Likewise.
+       (FPU_ARCH_DOTPROD_NEON_VFP_ARMV8): Likewise.
+       (FPU_ARCH_NEON_VFP_ARMV8_2_FP16): New.
+       (FPU_ARCH_NEON_VFP_ARMV8_2_FP16FML): New.
+       (FPU_ARCH_NEON_VFP_ARMV8_4_FP16FML): New.
+       (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_4): New.
 
-       * opcode/arc.h (ARC_OPCODE_ARCV1): Define.
+2019-03-28  Alan Modra  <amodra@gmail.com>
 
-2018-08-01  Richard Earnshaw  <rearnsha@arm.com>
+       PR 24390
+       * opcode/ppc.h (PPC_OPERAND_CR_REG): Comment.
 
-       Copy over from GCC
-       2018-07-26  Martin Liska  <mliska@suse.cz>
+2019-03-25  Tamar Christina  <tamar.christina@arm.com>
 
-       PR lto/86548
-       * libiberty.h (make_temp_file_with_prefix): New function.
+       * dis-asm.h (struct disassemble_info): Add stop_offset.
 
-2018-07-30  Jim Wilson  <jimw@sifive.com>
+2019-03-13  Sudakshina Das  <sudi.das@arm.com>
 
-       * opcode/riscv.h (INSN_TYPE, INSN_BRANCH, INSN_CONDBRANCH, INSN_JSR)
-       (INSN_DREF, INSN_DATA_SIZE, INSN_DATA_SIZE_SHIFT, INSN_1_BYTE)
-       (INSN_2_BYTE, INSN_4_BYTE, INSN_8_BYTE, INSN_16_BYTE): New.
+       * elf/aarch64.h (DT_AARCH64_PAC_PLT): New.
 
-2018-07-30  Andrew Jenner  <andrew@codesourcery.com>
+2019-03-13  Sudakshina Das  <sudi.das@arm.com>
+           Szabolcs Nagy  <szabolcs.nagy@arm.com>
 
-       * elf/common.h (EM_CSKY, EM_CSKY_OLD): Define.
-       * elf/csky.h: New file.
+       * elf/aarch64.h (DT_AARCH64_BTI_PLT): New.
 
-2018-07-27  Chenghua Xu  <paul.hua.gm@gmail.com>
-           Maciej W. Rozycki  <macro@linux-mips.org>
+2019-03-13  Sudakshina Das  <sudi.das@arm.com>
 
-       * elf/mips.h (AFL_ASE_MASK): Correct typo.
+       * elf/common.h (GNU_PROPERTY_AARCH64_FEATURE_1_AND): New.
+       (GNU_PROPERTY_AARCH64_FEATURE_1_BTI): New.
+       (GNU_PROPERTY_AARCH64_FEATURE_1_PAC): New.
 
-2018-07-26  Alex Chadwick  <Alex.Chadwick@cl.cam.ac.uk>
+2019-02-20  Alan Hayward  <alan.hayward@arm.com>
 
-       * opcode/ppc.h (PPC_OPCODE_750): Adjust comment.
+       * elf/common.h (NT_ARM_PAC_MASK): Add define.
 
-2018-07-26  Alan Modra  <amodra@gmail.com>
+2019-02-15  Saagar Jha  <saagar@saagarjha.com>
 
-       * elf/ppc64.h: Specify byte offset to local entry for values
-       of two to six in STO_PPC64_LOCAL_MASK.  Clarify r2 return
-       value for such functions when entering via global entry point.
-       Specify meaning of a value of one in STO_PPC64_LOCAL_MASK.
+       * mach-o/loader.h: Use new OS names in comments.
 
-2018-07-24  Alan Modra  <amodra@gmail.com>
+2019-02-11  Philippe Waroquiers  <philippe.waroquiers@skynet.be>
 
-       PR 23430
-       * elf/common.h (SHT_SYMTAB_SHNDX): Fix comment typo.
+       * splay-tree.h (splay_tree_delete_key_fn): Update comment.
+       (splay_tree_delete_value_fn): Likewise.
 
-2018-07-20  Chenghua Xu  <paul.hua.gm@gmail.com>
-           Maciej W. Rozycki  <macro@mips.com>
+2019-01-31  Andreas Krebbel  <krebbel@linux.ibm.com>
 
-       * elf/mips.h (AFL_ASE_MMI): New macro.
-       (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_MMI.
-       * opcode/mips.h (ASE_LOONGSON_MMI): New macro.
+       * opcode/s390.h (enum s390_opcode_cpu_val): Add
+       S390_OPCODE_ARCH13.
 
-2018-07-17  Maciej W. Rozycki  <macro@mips.com>
+2019-01-25  Sudakshina Das  <sudi.das@arm.com>
+           Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
 
-       * bfdlink.h (bfd_link_hash_entry): Add `rel_from_abs' member.
+       * opcode/aarch64.h (enum aarch64_opnd): Remove
+       AARCH64_OPND_ADDR_SIMPLE_2.
+       (enum aarch64_insn_class): Remove ldstgv_indexed.
 
-2018-07-06  Alan Modra  <amodra@gmail.com>
+2019-01-22  Tom Tromey  <tom@tromey.com>
 
-       * diagnostics.h: Comment on macro usage.
-
-2018-07-05  Simon Marchi  <simon.marchi@polymtl.ca>
-
-       * diagnostics.h (DIAGNOSTIC_IGNORE_DEPRECATED_DECLARATIONS):
-       Define for clang.
-
-2018-07-02  Maciej W. Rozycki  <macro@mips.com>
-
-       PR tdep/8282
-       * dis-asm.h (disasm_option_arg_t): New typedef.
-       (disasm_options_and_args_t): Likewise.
-       (disasm_options_t): Add `arg' member, document members.
-       (disassembler_options_mips): New prototype.
-       (disassembler_options_arm, disassembler_options_powerpc)
-       (disassembler_options_s390): Update prototypes.
-
-2018-06-29  Tamar Christina  <tamar.christina@arm.com>
-
-       PR binutils/23192
-       *opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_Em16.
-
-2018-06-26  Alan Modra  <amodra@gmail.com>
-
-       * elf/internal.h (ELF_SECTION_IN_SEGMENT): Revert last change.
+       * coff/ecoff.h: Include coff/sym.h.
 
 2018-06-24  Nick Clifton  <nickc@redhat.com>
 
-       2.31 branch created.
-
-2018-06-21  Alan Hayward  <alan.hayward@arm.com>
-
-       * elf/internal.h (ELF_SECTION_IN_SEGMENT): Don’t check addresses
-       for non SHT_NOBITS.
-
-2018-06-19  Simon Marchi  <simon.marchi@ericsson.com>
-
-       Sync with GCC
-
-       2018-05-24  Tom Rix  <trix@juniper.net>
-
-       * dwarf2.def (DW_FORM_strx*, DW_FORM_addrx*): New.
-
-       2017-11-20  Kito Cheng  <kito.cheng@gmail.com>
-
-       * longlong.h [__riscv] (__umulsidi3): Define.
-       [__riscv] (umul_ppmm): Likewise.
-       [__riscv] (__muluw3): Likewise.
-
-2018-06-14  Faraz Shahbazker  <Faraz.Shahbazker@mips.com>
-
-       * elf/mips.h (AFL_ASE_GINV, AFL_ASE_RESERVED1): New macros.
-       (AFL_ASE_MASK): Update to include AFL_ASE_GINV.
-       * opcode/mips.h: Document "+\" operand format.
-       (ASE_GINV): New macro.
-
-2018-06-13  Scott Egerton  <scott.egerton@imgtec.com>
-           Faraz Shahbazker  <Faraz.Shahbazker@mips.com>
-
-       * elf/mips.h (AFL_ASE_CRC): New macro.
-       (AFL_ASE_MASK): Update to include AFL_ASE_CRC.
-       * opcode/mips.h (ASE_CRC): New macro.
-       * opcode/mips.h (ASE_CRC64): Likewise.
-
-2018-06-04  Max Filippov  <jcmvbkbc@gmail.com>
-
-       * elf/xtensa.h (xtensa_read_table_entries)
-       (xtensa_compute_fill_extra_space): New declarations.
-
-2018-06-04  H.J. Lu  <hongjiu.lu@intel.com>
-
-       * diagnostics.h (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): Always
-       define for GCC.
-
-2018-06-04  H.J. Lu  <hongjiu.lu@intel.com>
-
-       * diagnostics.h (DIAGNOSTIC_STRINGIFY_1): New.
-       (DIAGNOSTIC_STRINGIFY): Likewise.
-       (DIAGNOSTIC_IGNORE): Replace STRINGIFY with DIAGNOSTIC_STRINGIFY.
-       (DIAGNOSTIC_IGNORE_SELF_MOVE): Define empty if not defined.
-       (DIAGNOSTIC_IGNORE_DEPRECATED_REGISTER): Likewise.
-       (DIAGNOSTIC_IGNORE_UNUSED_FUNCTION): Likewise.
-       (DIAGNOSTIC_IGNORE_SWITCH_DIFFERENT_ENUM_TYPES): Likewise.
-       (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): New.
-
-2018-06-01  H.J. Lu  <hongjiu.lu@intel.com>
-
-       * diagnostics.h: Moved from ../gdb/common/diagnostics.h.
-
-2018-05-28  Bernd Edlinger  <bernd.edlinger@hotmail.de>
-
-       * splay-tree.h (splay_tree_compare_strings,
-       splay_tree_delete_pointers): Declare new utility functions.
-
-2018-05-21  Peter Bergner  <bergner@vnet.ibm.com.com>
-
-       * opcode/ppc.h (PPC_OPERAND_FAKE): Delete macro.
-
-2018-05-18  Kito Cheng  <kito.cheng@gmail.com>
-
-       * elf/riscv.h (EF_RISCV_RVE): New define.
-
-2018-05-18  John Darrington  <john@darrington.wattle.id.au>
-
-       * elf/s12z.h: New header.
-
-2018-05-15  Tamar Christina  <tamar.christina@arm.com>
-
-       PR binutils/21446
-       * opcode/aarch64.h (F_SYS_READ, F_SYS_WRITE): New.
-
-2018-05-15  Tamar Christina  <tamar.christina@arm.com>
-
-       PR binutils/21446
-       * opcode/aarch64.h (aarch64_operand_error): Add non_fatal.
-       (aarch64_print_operand): Support notes.
-
-2018-05-15  Tamar Christina  <tamar.christina@arm.com>
-
-       PR binutils/21446
-       * opcode/aarch64.h (aarch64_opnd_info): Change sysreg to struct.
-       (aarch64_decode_insn): Accept error struct.
-
-2018-05-15  Francois H. Theron  <francois.theron@netronome.com>
-
-       * opcode/nfp.h: Use uint64_t instead of bfd_vma.
-
-2018-05-10  John Darrington  <john@darrington.wattle.id.au>
-
-       * elf/common.h (EM_S12Z): New macro.
-
-2018-05-09  Sebastian Rasmussen  <sebras@gmail.com>
-
-       * mach-o/unwind.h (MACH_O_UNWIND_X86_64_RBP_FRAME_REGISTERS):
-       Rename from MACH_O_UNWIND_X86_64_RBP_FRAME_REGSITERS.
-       (MACH_O_UNWIND_X86_EBP_FRAME_REGISTERS): Rename from
-       MACH_O_UNWIND_X86_EBP_FRAME_REGSITERS.
-
-2018-05-08  Jim Wilson  <jimw@sifive.com>
-
-       * opcode/riscv-opc.h (MATCH_C_SRLI64, MASK_C_SRLI64): New.
-       (MATCH_C_SRAI64, MASK_C_SRAI64): New.
-       (MATCH_C_SLLI64, MASK_C_SLLI64): New.
-
-2018-05-07  Peter Bergner  <bergner@vnet.ibm.com.com>
-
-       * opcode/ppc.h (powerpc_num_opcodes): Change type to unsigned.
-       (vle_num_opcodes): Likewise.
-       (spe2_num_opcodes): Likewise.
-
-2018-05-04  Alan Modra  <amodra@gmail.com>
-
-       * ansidecl.h: Import from gcc.
-       * coff/internal.h (struct internal_scnhdr): Add ATTRIBUTE_NONSTRING
-       to s_name.
-       (struct internal_syment): Add ATTRIBUTE_NONSTRING to _n_name.
-
-2018-04-30  Francois H. Theron <francois.theron@netronome.com>
-
-       * dis-asm.h: Added print_nfp_disassembler_options prototype.
-       * elf/common.h: Added EM_NFP, officially assigned. See Google Group
-       Generic System V Application Binary Interface.
-       * elf/nfp.h: New, for NFP support.
-       * opcode/nfp.h: New, for NFP support.
-
-2018-04-25  Christophe Lyon  <christophe.lyon@st.com>
-       Mickaël Guêné  <mickael.guene@st.com>
-
-       * elf/arm.h: Add R_ARM_TLS_GD32_FDPIC, R_ARM_TLS_LDM32_FDPIC,
-       R_ARM_TLS_IE32_FDPIC.
-
-2018-04-25  Christophe Lyon  <christophe.lyon@st.com>
-       Mickaël Guêné  <mickael.guene@st.com>
-
-       * elf/arm.h (R_ARM_GOTFUNCDESC, R_ARM_GOTOFFFUNCDESC)
-       (R_ARM_FUNCDESC)
-       (R_ARM_FUNCDESC_VALUE): Define new relocations.
-
-2018-04-25  Christophe Lyon  <christophe.lyon@st.com>
-       Mickaël Guêné  <mickael.guene@st.com>
-
-       * elf/arm.h (EF_ARM_FDPIC): New.
-
-2018-04-18  Alan Modra  <amodra@gmail.com>
-
-       * coff/mipspe.h: Delete.
-
-2018-04-18  Alan Modra  <amodra@gmail.com>
-
-       * aout/dynix3.h: Delete.
-
-2018-04-17 Andrew Sadek  <andrew.sadek.se@gmail.com>
-
-       Microblaze Target: PIC data text relative
-
-       * bfdlink.h (Add flag): Add new flag @ 'bfd_link_info' struct.
-       * elf/microblaze.h (Add 3 new relocations):
-       R_MICROBLAZE_TEXTPCREL_64, R_MICROBLAZE_TEXTREL_64
-       and R_MICROBLAZE_TEXTREL_32_LO for relax function.
-
-2018-04-17  Alan Modra  <amodra@gmail.com>
-
-       * elf/i370.h: Revert removal.
-       * elf/i860.h: Likewise.
-       * elf/i960.h: Likewise.
-
-2018-04-16  Alan Modra  <amodra@gmail.com>
-
-       * coff/sparc.h: Delete.
-
-2018-04-16  Alan Modra  <amodra@gmail.com>
-
-       * aout/host.h: Remove m68k-aout and m68k-coff support.
-       * aout/hp300hpux.h: Delete.
-       * coff/apollo.h: Delete.
-       * coff/aux-coff.h: Delete.
-       * coff/m68k.h: Delete.
-
-2018-04-16  Alan Modra  <amodra@gmail.com>
-
-       * dis-asm.h: Remove sh5 and sh64 support.
-
-2018-04-16  Alan Modra  <amodra@gmail.com>
-
-       * coff/internal.h: Remove w65 support.
-       * coff/w65.h: Delete.
-
-2018-04-16  Alan Modra  <amodra@gmail.com>
-
-       * coff/we32k.h: Delete.
-
-2018-04-16  Alan Modra  <amodra@gmail.com>
-
-       * coff/internal.h: Remove m88k support.
-       * coff/m88k.h: Delete.
-       * opcode/m88k.h: Delete.
-
-2018-04-16  Alan Modra  <amodra@gmail.com>
-
-       * elf/i370.h: Delete.
-       * opcode/i370.h: Delete.
-
-2018-04-16  Alan Modra  <amodra@gmail.com>
-
-       * coff/h8500.h: Delete.
-       * coff/internal.h: Remove h8500 support.
-
-2018-04-16  Alan Modra  <amodra@gmail.com>
-
-       * coff/h8300.h: Delete.
-
-2018-04-16  Alan Modra  <amodra@gmail.com>
-
-       * ieee.h: Delete.
-
-2018-04-16  Alan Modra  <amodra@gmail.com>
-
-       * aout/host.h: Remove newsos3 support.
-
-2018-04-16  Alan Modra  <amodra@gmail.com>
-
-       * nlm/ChangeLog-9315: Delete.
-       * nlm/alpha-ext.h: Delete.
-       * nlm/common.h: Delete.
-       * nlm/external.h: Delete.
-       * nlm/i386-ext.h: Delete.
-       * nlm/internal.h: Delete.
-       * nlm/ppc-ext.h: Delete.
-       * nlm/sparc32-ext.h: Delete.
-
-2018-04-16  Alan Modra  <amodra@gmail.com>
-
-       * opcode/tahoe.h: Delete.
-
-2018-04-11  Alan Modra  <amodra@gmail.com>
-
-       * aout/adobe.h: Delete.
-       * aout/reloc.h: Delete.
-       * coff/i860.h: Delete.
-       * coff/i960.h: Delete.
-       * elf/i860.h: Delete.
-       * elf/i960.h: Delete.
-       * opcode/i860.h: Delete.
-       * opcode/i960.h: Delete.
-       * aout/aout64.h (enum reloc_type): Trim off 29k and other unused values.
-       * aout/ar.h (ARMAGB): Remove.
-       * coff/internal.h (struct internal_aouthdr, struct internal_scnhdr,
-       union internal_auxent): Remove i960 support.
-
-2018-04-09  Alan Modra  <amodra@gmail.com>
-
-       * elf/ppc.h (R_PPC_PLTSEQ, R_PPC_PLTCALL): Define.
-       * elf/ppc64.h (R_PPC64_PLTSEQ, R_PPC64_PLTCALL): Define.
-
-2018-03-28  Renlin Li  <renlin.li@arm.com>
-
-       PR ld/22970
-       * elf/aarch64.h: Add relocation number for
-       R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12,
-       R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC,
-       R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12,
-       R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12_NC,
-       R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12,
-       R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12_NC,
-       R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12,
-       R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12_NC.
-
-2018-03-28  Nick Clifton  <nickc@redhat.com>
-
-       PR 22988
-       * opcode/aarch64.h (enum aarch64_opnd): Add
-       AARCH64_OPND_SVE_ADDR_R.
-
-2018-03-21  H.J. Lu  <hongjiu.lu@intel.com>
-
-       * elf/common.h (DF_1_KMOD): New.
-       (DF_1_WEAKFILTER): Likewise.
-       (DF_1_NOCOMMON): Likewise.
-
-2018-03-14  Kito Cheng  <kito.cheng@gmail.com>
-
-       * opcode/riscv.h (OP_MASK_FUNCT3): New.
-       (OP_SH_FUNCT3): Likewise.
-       (OP_MASK_FUNCT7): Likewise.
-       (OP_SH_FUNCT7): Likewise.
-       (OP_MASK_OP2): Likewise.
-       (OP_SH_OP2): Likewise.
-       (OP_MASK_CFUNCT4): Likewise.
-       (OP_SH_CFUNCT4): Likewise.
-       (OP_MASK_CFUNCT3): Likewise.
-       (OP_SH_CFUNCT3): Likewise.
-       (riscv_insn_types): Likewise.
-
-2018-03-13  Nick Clifton  <nickc@redhat.com>
-
-       PR 22113
-       * coff/pe.h (struct pex64_unwind_info): Add a rawUnwindCodesEnd
-       field.
-
-2018-03-08  H.J. Lu  <hongjiu.lu@intel.com>
-
-       * opcode/i386 (OLDGCC_COMPAT): Removed.
+       2.32 branch created.
 
-2018-02-27  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+2019-01-16  Kito Cheng  <kito@andestech.com>
 
-       * opcode/arm.h (ARM_FEATURE_COPY): Remove macro definition.
+       * elf/riscv.h (SHT_RISCV_ATTRIBUTES): Define.
+       (Tag_RISCV_arch): Likewise.
+       (Tag_RISCV_priv_spec): Likewise.
+       (Tag_RISCV_priv_spec_minor): Likewise.
+       (Tag_RISCV_priv_spec_revision): Likewise.
+       (Tag_RISCV_unaligned_access): Likewise.
+       (Tag_RISCV_stack_align): Likewise.
 
-2018-02-20  Maciej W. Rozycki  <macro@mips.com>
+2019-01-14  Pavel I. Kryukov  <kryukov@frtk.ru>
 
-       * opcode/mips.h: Remove `M' operand code.
+       * dis-asm.h: include <string.h>
 
-2018-02-12  Zebediah Figura  <z.figura12@gmail.com>
+2019-01-10  Nick Clifton  <nickc@redhat.com>
 
-       * coff/msdos.h: New header.
-       * coff/pe.h: Move common defines to msdos.h.
-       * coff/powerpc.h: Likewise.
+       * Merge from GCC:
+       2018-12-22  Jason Merrill  <jason@redhat.com>
 
-2018-01-13  Nick Clifton  <nickc@redhat.com>
+       * demangle.h: Remove support for ancient GNU (pre-3.0), Lucid,
+       ARM, HP, and EDG demangling styles.
 
-       2.30 branch created.
+2019-01-09  Sandra Loosemore  <sandra@codesourcery.com>
 
-2018-01-11  H.J. Lu  <hongjiu.lu@intel.com>
+       Merge from GCC:
+       PR other/16615
 
-       PR ld/22393
-       * bfdlink.h (bfd_link_info): Add separate_code.
+       * libiberty.h: Mechanically replace "can not" with "cannot".
+       * plugin-api.h: Likewise.
 
-2018-01-04  Jim Wilson  <jimw@sifive.com>
+2018-12-25  Yoshinori Sato <ysato@users.sourceforge.jp>
 
-       * opcode/riscv-opc.h (CSR_SBADADDR): Rename to CSR_STVAL.  Rename
-       DECLARE_CSR entry.  Add alias to map sbadaddr to CSR_STVAL.
-       (CSR_MBADADDR): Rename to CSR_MTVAL.  Rename DECLARE_CSR entry.
-       Add alias to map mbadaddr to CSR_MTVAL.
+       * elf/rx.h (EF_RX_CPU_MASK): Update new bits.
+       (E_FLAG_RX_V3): New RXv3 type.
+       * opcode/rx.h (RX_Size): Add double size.
+       (RX_Operand_Type): Add double FPU registers.
+       (RX_Opcode_ID): Add new instuctions.
 
-2018-01-03  Alan Modra  <amodra@gmail.com>
+2019-01-01  Alan Modra  <amodra@gmail.com>
 
        Update year range in copyright notice of all files.
 
-For older changes see ChangeLog-2017
+For older changes see ChangeLog-2018
 \f
-Copyright (C) 2018 Free Software Foundation, Inc.
+Copyright (C) 2019 Free Software Foundation, Inc.
 
 Copying and distribution of this file, with or without modification,
 are permitted in any medium without royalty provided the copyright
This page took 0.034756 seconds and 4 git commands to generate.