[MIPS] Add GT641xx IRQ routines.
[deliverable/linux.git] / include / asm-mips / mach-cobalt / cobalt.h
index 00b0fc68d5cb19bb9767ecf0d7960a1ca464d085..408eeccbe5128eb46ae3d1fc6ed6e72b2ec44401 100644 (file)
 #ifndef __ASM_COBALT_H
 #define __ASM_COBALT_H
 
-/*
- * i8259 legacy interrupts used on Cobalt:
- *
- *     8  - RTC
- *     9  - PCI
- *    14  - IDE0
- *    15  - IDE1
- */
-#define COBALT_QUBE_SLOT_IRQ   9
-
-/*
- * CPU IRQs  are 16 ... 23
- */
-#define COBALT_CPU_IRQ         16
-
-#define COBALT_GALILEO_IRQ     (COBALT_CPU_IRQ + 2)
-#define COBALT_SCC_IRQ          (COBALT_CPU_IRQ + 3)   /* pre-production has 85C30 */
-#define COBALT_RAQ_SCSI_IRQ    (COBALT_CPU_IRQ + 3)
-#define COBALT_ETH0_IRQ                (COBALT_CPU_IRQ + 3)
-#define COBALT_QUBE1_ETH0_IRQ  (COBALT_CPU_IRQ + 4)
-#define COBALT_ETH1_IRQ                (COBALT_CPU_IRQ + 4)
-#define COBALT_SERIAL_IRQ      (COBALT_CPU_IRQ + 5)
-#define COBALT_SCSI_IRQ         (COBALT_CPU_IRQ + 5)
-#define COBALT_VIA_IRQ         (COBALT_CPU_IRQ + 6)    /* Chained to VIA ISA bridge */
-
 /*
  * PCI configuration space manifest constants.  These are wired into
  * the board layout according to the PCI spec to enable the software
@@ -67,9 +42,7 @@
 #define COBALT_BRD_ID_QUBE2    0x5
 #define COBALT_BRD_ID_RAQ2     0x6
 
-#define PCI_CFG_SET(devfn,where)                                       \
-       GT_WRITE(GT_PCI0_CFGADDR_OFS, (0x80000000 | (PCI_SLOT (devfn) << 11) |          \
-               (PCI_FUNC (devfn) << 8) | (where)))
+extern int cobalt_board_id;
 
 #define COBALT_LED_PORT                (*(volatile unsigned char *) CKSEG1ADDR(0x1c000000))
 # define COBALT_LED_BAR_LEFT   (1 << 0)        /* Qube */
This page took 0.027139 seconds and 5 git commands to generate.