Change inferior thread list to be a thread map

[deliverable/binutils-gdb.git] / include / elf / aarch64.h

diff --git a/include/elf/aarch64.h b/include/elf/aarch64.h
index 93a950f85d3eafffae05e2e2be3f74e646ed52e0..96ca5c72408caeabe901e5060e4d431d4d960c2e 100644 (file)
--- a/include/elf/aarch64.h
+++ b/include/elf/aarch64.h
@@ -1,6 +1,6 @@
 /* AArch64 ELF support for BFD.
 
-   Copyright (C) 2009-2015 Free Software Foundation, Inc.
+   Copyright (C) 2009-2020 Free Software Foundation, Inc.
    Contributed by ARM Ltd.
 
    This file is part of GNU Binutils.
@@ -35,6 +35,14 @@
                                                entry point.  */
 #define SHF_COMDEF             0x80000000   /* Section may be multiply defined
                                                in the input to a link step.  */
+/* Processor specific dynamic array tags.  */
+#define DT_AARCH64_BTI_PLT     (DT_LOPROC + 1)
+#define DT_AARCH64_PAC_PLT     (DT_LOPROC + 3)
+#define DT_AARCH64_VARIANT_PCS (DT_LOPROC + 5)
+
+/* AArch64-specific values for st_other.  */
+#define STO_AARCH64_VARIANT_PCS        0x80  /* Symbol may follow different call
+                                        convention from the base PCS.  */
 
 /* Relocation types.  */
 
@@ -120,14 +128,28 @@ RELOC_NUMBER (R_AARCH64_P32_JUMP26, 20)
 /* BL:     ((S+A-P) >> 2) & 0x3ffffff.  */
 RELOC_NUMBER (R_AARCH64_P32_CALL26, 21)
 
+/* Group relocations to create a 16 or 32 bit PC-relative offset inline.  */
+RELOC_NUMBER (R_AARCH64_P32_MOVW_PREL_G0, 22)
+RELOC_NUMBER (R_AARCH64_P32_MOVW_PREL_G0_NC, 23)
+RELOC_NUMBER (R_AARCH64_P32_MOVW_PREL_G1, 24)
 
 RELOC_NUMBER (R_AARCH64_P32_GOT_LD_PREL19, 25)
 RELOC_NUMBER (R_AARCH64_P32_ADR_GOT_PAGE, 26)
 RELOC_NUMBER (R_AARCH64_P32_LD32_GOT_LO12_NC, 27)
+RELOC_NUMBER (R_AARCH64_P32_LD32_GOTPAGE_LO14, 28)
 
-
+RELOC_NUMBER (R_AARCH64_P32_TLSGD_ADR_PREL21, 80)
 RELOC_NUMBER (R_AARCH64_P32_TLSGD_ADR_PAGE21, 81)
 RELOC_NUMBER (R_AARCH64_P32_TLSGD_ADD_LO12_NC, 82)
+RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADR_PREL21, 83)
+RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADR_PAGE21, 84)
+RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADD_LO12_NC, 85)
+RELOC_NUMBER (R_AARCH64_P32_TLSLD_MOVW_DTPREL_G1, 87)
+RELOC_NUMBER (R_AARCH64_P32_TLSLD_MOVW_DTPREL_G0, 88)
+RELOC_NUMBER (R_AARCH64_P32_TLSLD_MOVW_DTPREL_G0_NC, 89)
+RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADD_DTPREL_HI12, 90)
+RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12, 91)
+RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12_NC, 92)
 RELOC_NUMBER (R_AARCH64_P32_TLSIE_ADR_GOTTPREL_PAGE21, 103)
 RELOC_NUMBER (R_AARCH64_P32_TLSIE_LD32_GOTTPREL_LO12_NC, 104)
 RELOC_NUMBER (R_AARCH64_P32_TLSIE_LD_GOTTPREL_PREL19, 105)
@@ -137,6 +159,14 @@ RELOC_NUMBER (R_AARCH64_P32_TLSLE_MOVW_TPREL_G0_NC, 108)
 RELOC_NUMBER (R_AARCH64_P32_TLSLE_ADD_TPREL_HI12, 109)
 RELOC_NUMBER (R_AARCH64_P32_TLSLE_ADD_TPREL_LO12, 110)
 RELOC_NUMBER (R_AARCH64_P32_TLSLE_ADD_TPREL_LO12_NC, 111)
+RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12, 112)
+RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12_NC, 113)
+RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12, 114)
+RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC, 115)
+RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12, 116)
+RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12_NC, 117)
+RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12, 118)
+RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12_NC, 119)
 
 RELOC_NUMBER (R_AARCH64_P32_TLSDESC_LD_PREL19, 122)
 RELOC_NUMBER (R_AARCH64_P32_TLSDESC_ADR_PREL21, 123)
@@ -372,8 +402,8 @@ RELOC_NUMBER (R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC, 559)
 RELOC_NUMBER (R_AARCH64_TLSDESC_LD_PREL19, 560)
 RELOC_NUMBER (R_AARCH64_TLSDESC_ADR_PREL21, 561)
 RELOC_NUMBER (R_AARCH64_TLSDESC_ADR_PAGE21, 562)
-RELOC_NUMBER (R_AARCH64_TLSDESC_LD64_LO12_NC, 563)
-RELOC_NUMBER (R_AARCH64_TLSDESC_ADD_LO12_NC, 564)
+RELOC_NUMBER (R_AARCH64_TLSDESC_LD64_LO12, 563)
+RELOC_NUMBER (R_AARCH64_TLSDESC_ADD_LO12, 564)
 RELOC_NUMBER (R_AARCH64_TLSDESC_OFF_G1, 565)
 RELOC_NUMBER (R_AARCH64_TLSDESC_OFF_G0_NC, 566)
 RELOC_NUMBER (R_AARCH64_TLSDESC_LDR, 567)