mtd: nand: define struct nand_timings
[deliverable/linux.git] / include / linux / mtd / nand.h
index 1cff329ae13de69d16c73836eb19da4b4aa56d65..cdda207c16e15e05c130b6f056f660605d0e99f0 100644 (file)
@@ -948,4 +948,53 @@ static inline int jedec_feature(struct nand_chip *chip)
        return chip->jedec_version ? le16_to_cpu(chip->jedec_params.features)
                : 0;
 }
+
+/**
+ * struct nand_sdr_timings - SDR NAND chip timings
+ *
+ * This struct defines the timing requirements of a SDR NAND chip.
+ * These informations can be found in every NAND datasheets and the timings
+ * meaning are described in the ONFI specifications:
+ * www.onfi.org/~/media/ONFI/specs/onfi_3_1_spec.pdf (chapter 4.15 Timing
+ * Parameters)
+ *
+ * All these timings are expressed in picoseconds.
+ */
+
+struct nand_sdr_timings {
+       u32 tALH_min;
+       u32 tADL_min;
+       u32 tALS_min;
+       u32 tAR_min;
+       u32 tCEA_max;
+       u32 tCEH_min;
+       u32 tCH_min;
+       u32 tCHZ_max;
+       u32 tCLH_min;
+       u32 tCLR_min;
+       u32 tCLS_min;
+       u32 tCOH_min;
+       u32 tCS_min;
+       u32 tDH_min;
+       u32 tDS_min;
+       u32 tFEAT_max;
+       u32 tIR_min;
+       u32 tITC_max;
+       u32 tRC_min;
+       u32 tREA_max;
+       u32 tREH_min;
+       u32 tRHOH_min;
+       u32 tRHW_min;
+       u32 tRHZ_max;
+       u32 tRLOH_min;
+       u32 tRP_min;
+       u32 tRR_min;
+       u64 tRST_max;
+       u32 tWB_max;
+       u32 tWC_min;
+       u32 tWH_min;
+       u32 tWHR_min;
+       u32 tWP_min;
+       u32 tWW_min;
+};
 #endif /* __LINUX_MTD_NAND_H */
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