+2011-07-24 Chao-ying Fu <fu@mips.com>
+ Maciej W. Rozycki <macro@codesourcery.com>
+
+ * mips.h (OP_MASK_EXTLSB, OP_SH_EXTLSB): New macros.
+ (OP_MASK_STYPE, OP_SH_STYPE): Likewise.
+ (OP_MASK_CODE10, OP_SH_CODE10): Likewise.
+ (OP_MASK_TRAP, OP_SH_TRAP): Likewise.
+ (OP_MASK_OFFSET12, OP_SH_OFFSET12): Likewise.
+ (OP_MASK_OFFSET10, OP_SH_OFFSET10): Likewise.
+ (OP_MASK_RS3, OP_SH_RS3): Likewise.
+ (OP_MASK_MB, OP_SH_MB, OP_MASK_MC, OP_SH_MC): Likewise.
+ (OP_MASK_MD, OP_SH_MD, OP_MASK_ME, OP_SH_ME): Likewise.
+ (OP_MASK_MF, OP_SH_MF, OP_MASK_MG, OP_SH_MG): Likewise.
+ (OP_MASK_MJ, OP_SH_MJ, OP_MASK_ML, OP_SH_ML): Likewise.
+ (OP_MASK_MP, OP_SH_MP, OP_MASK_MQ, OP_SH_MQ): Likewise.
+ (OP_MASK_IMMA, OP_SH_IMMA, OP_MASK_IMMB, OP_SH_IMMB): Likewise.
+ (OP_MASK_IMMC, OP_SH_IMMC, OP_MASK_IMMF, OP_SH_IMMF): Likewise.
+ (OP_MASK_IMMG, OP_SH_IMMG, OP_MASK_IMMH, OP_SH_IMMH): Likewise.
+ (OP_MASK_IMMI, OP_SH_IMMI, OP_MASK_IMMJ, OP_SH_IMMJ): Likewise.
+ (OP_MASK_IMML, OP_SH_IMML, OP_MASK_IMMM, OP_SH_IMMM): Likewise.
+ (OP_MASK_IMMN, OP_SH_IMMN, OP_MASK_IMMO, OP_SH_IMMO): Likewise.
+ (OP_MASK_IMMP, OP_SH_IMMP, OP_MASK_IMMQ, OP_SH_IMMQ): Likewise.
+ (OP_MASK_IMMU, OP_SH_IMMU, OP_MASK_IMMW, OP_SH_IMMW): Likewise.
+ (OP_MASK_IMMX, OP_SH_IMMX, OP_MASK_IMMY, OP_SH_IMMY): Likewise.
+ (INSN_WRITE_GPR_S): New macro.
+ (INSN2_BRANCH_DELAY_16BIT, INSN2_BRANCH_DELAY_32BIT): Likewise.
+ (INSN2_READ_FPR_D): Likewise.
+ (INSN2_MOD_GPR_MB, INSN2_MOD_GPR_MC): Likewise.
+ (INSN2_MOD_GPR_MD, INSN2_MOD_GPR_ME): Likewise.
+ (INSN2_MOD_GPR_MF, INSN2_MOD_GPR_MG): Likewise.
+ (INSN2_MOD_GPR_MJ, INSN2_MOD_GPR_MP): Likewise.
+ (INSN2_MOD_GPR_MQ, INSN2_MOD_SP): Likewise.
+ (INSN2_READ_GPR_31, INSN2_READ_GP, INSN2_READ_PC): Likewise.
+ (INSN2_UNCOND_BRANCH, INSN2_COND_BRANCH): Likewise.
+ (INSN2_MOD_GPR_MHI, INSN2_MOD_GPR_MM, INSN2_MOD_GPR_MN): Likewise.
+ (CPU_MICROMIPS): New macro.
+ (M_BC1FL, M_BC1TL, M_BC2FL, M_BC2TL): New enum values.
+ (M_BEQL, M_BGEZ, M_BGEZL, M_BGEZALL, M_BGTZ, M_BGTZL): Likewise.
+ (M_BLEZ, M_BLEZL, M_BLTZ, M_BLTZL, M_BLTZALL, M_BNEL): Likewise.
+ (M_CACHE_OB, M_JALS_1, M_JALS_2, M_JALS_A): Likewise.
+ (M_LDC2_OB, M_LDL_OB, M_LDM_AB, M_LDM_OB): Likewise.
+ (M_LDP_AB, M_LDP_OB, M_LDR_OB, M_LL_OB, M_LLD_OB): Likewise.
+ (M_LWC2_OB, M_LWL_OB, M_LWM_AB, M_LWM_OB): Likewise.
+ (M_LWP_AB, M_LWP_OB, M_LWR_OB): Likewise.
+ (M_LWU_OB, M_PREF_OB, M_SC_OB, M_SCD_OB): Likewise.
+ (M_SDC2_OB, M_SDL_OB, M_SDM_AB, M_SDM_OB): Likewise.
+ (M_SDP_AB, M_SDP_OB, M_SDR_OB): Likewise.
+ (M_SWC2_OB, M_SWL_OB, M_SWM_AB, M_SWM_OB): Likewise.
+ (M_SWP_AB, M_SWP_OB, M_SWR_OB): Likewise.
+ (MICROMIPSOP_MASK_MAJOR, MICROMIPSOP_SH_MAJOR): New macros.
+ (MICROMIPSOP_MASK_IMMEDIATE, MICROMIPSOP_SH_IMMEDIATE): Likewise.
+ (MICROMIPSOP_MASK_DELTA, MICROMIPSOP_SH_DELTA): Likewise.
+ (MICROMIPSOP_MASK_CODE10, MICROMIPSOP_SH_CODE10): Likewise.
+ (MICROMIPSOP_MASK_TRAP, MICROMIPSOP_SH_TRAP): Likewise.
+ (MICROMIPSOP_MASK_SHAMT, MICROMIPSOP_SH_SHAMT): Likewise.
+ (MICROMIPSOP_MASK_TARGET, MICROMIPSOP_SH_TARGET): Likewise.
+ (MICROMIPSOP_MASK_EXTLSB, MICROMIPSOP_SH_EXTLSB): Likewise.
+ (MICROMIPSOP_MASK_EXTMSBD, MICROMIPSOP_SH_EXTMSBD): Likewise.
+ (MICROMIPSOP_MASK_INSMSB, MICROMIPSOP_SH_INSMSB): Likewise.
+ (MICROMIPSOP_MASK_CODE, MICROMIPSOP_SH_CODE): Likewise.
+ (MICROMIPSOP_MASK_CODE2, MICROMIPSOP_SH_CODE2): Likewise.
+ (MICROMIPSOP_MASK_CACHE, MICROMIPSOP_SH_CACHE): Likewise.
+ (MICROMIPSOP_MASK_SEL, MICROMIPSOP_SH_SEL): Likewise.
+ (MICROMIPSOP_MASK_OFFSET12, MICROMIPSOP_SH_OFFSET12): Likewise.
+ (MICROMIPSOP_MASK_3BITPOS, MICROMIPSOP_SH_3BITPOS): Likewise.
+ (MICROMIPSOP_MASK_STYPE, MICROMIPSOP_SH_STYPE): Likewise.
+ (MICROMIPSOP_MASK_OFFSET10, MICROMIPSOP_SH_OFFSET10): Likewise.
+ (MICROMIPSOP_MASK_RS, MICROMIPSOP_SH_RS): Likewise.
+ (MICROMIPSOP_MASK_RT, MICROMIPSOP_SH_RT): Likewise.
+ (MICROMIPSOP_MASK_RD, MICROMIPSOP_SH_RD): Likewise.
+ (MICROMIPSOP_MASK_FS, MICROMIPSOP_SH_FS): Likewise.
+ (MICROMIPSOP_MASK_FT, MICROMIPSOP_SH_FT): Likewise.
+ (MICROMIPSOP_MASK_FD, MICROMIPSOP_SH_FD): Likewise.
+ (MICROMIPSOP_MASK_FR, MICROMIPSOP_SH_FR): Likewise.
+ (MICROMIPSOP_MASK_RS3, MICROMIPSOP_SH_RS3): Likewise.
+ (MICROMIPSOP_MASK_PREFX, MICROMIPSOP_SH_PREFX): Likewise.
+ (MICROMIPSOP_MASK_BCC, MICROMIPSOP_SH_BCC): Likewise.
+ (MICROMIPSOP_MASK_CCC, MICROMIPSOP_SH_CCC): Likewise.
+ (MICROMIPSOP_MASK_COPZ, MICROMIPSOP_SH_COPZ): Likewise.
+ (MICROMIPSOP_MASK_MB, MICROMIPSOP_SH_MB): Likewise.
+ (MICROMIPSOP_MASK_MC, MICROMIPSOP_SH_MC): Likewise.
+ (MICROMIPSOP_MASK_MD, MICROMIPSOP_SH_MD): Likewise.
+ (MICROMIPSOP_MASK_ME, MICROMIPSOP_SH_ME): Likewise.
+ (MICROMIPSOP_MASK_MF, MICROMIPSOP_SH_MF): Likewise.
+ (MICROMIPSOP_MASK_MG, MICROMIPSOP_SH_MG): Likewise.
+ (MICROMIPSOP_MASK_MH, MICROMIPSOP_SH_MH): Likewise.
+ (MICROMIPSOP_MASK_MI, MICROMIPSOP_SH_MI): Likewise.
+ (MICROMIPSOP_MASK_MJ, MICROMIPSOP_SH_MJ): Likewise.
+ (MICROMIPSOP_MASK_ML, MICROMIPSOP_SH_ML): Likewise.
+ (MICROMIPSOP_MASK_MM, MICROMIPSOP_SH_MM): Likewise.
+ (MICROMIPSOP_MASK_MN, MICROMIPSOP_SH_MN): Likewise.
+ (MICROMIPSOP_MASK_MP, MICROMIPSOP_SH_MP): Likewise.
+ (MICROMIPSOP_MASK_MQ, MICROMIPSOP_SH_MQ): Likewise.
+ (MICROMIPSOP_MASK_IMMA, MICROMIPSOP_SH_IMMA): Likewise.
+ (MICROMIPSOP_MASK_IMMB, MICROMIPSOP_SH_IMMB): Likewise.
+ (MICROMIPSOP_MASK_IMMC, MICROMIPSOP_SH_IMMC): Likewise.
+ (MICROMIPSOP_MASK_IMMD, MICROMIPSOP_SH_IMMD): Likewise.
+ (MICROMIPSOP_MASK_IMME, MICROMIPSOP_SH_IMME): Likewise.
+ (MICROMIPSOP_MASK_IMMF, MICROMIPSOP_SH_IMMF): Likewise.
+ (MICROMIPSOP_MASK_IMMG, MICROMIPSOP_SH_IMMG): Likewise.
+ (MICROMIPSOP_MASK_IMMH, MICROMIPSOP_SH_IMMH): Likewise.
+ (MICROMIPSOP_MASK_IMMI, MICROMIPSOP_SH_IMMI): Likewise.
+ (MICROMIPSOP_MASK_IMMJ, MICROMIPSOP_SH_IMMJ): Likewise.
+ (MICROMIPSOP_MASK_IMML, MICROMIPSOP_SH_IMML): Likewise.
+ (MICROMIPSOP_MASK_IMMM, MICROMIPSOP_SH_IMMM): Likewise.
+ (MICROMIPSOP_MASK_IMMN, MICROMIPSOP_SH_IMMN): Likewise.
+ (MICROMIPSOP_MASK_IMMO, MICROMIPSOP_SH_IMMO): Likewise.
+ (MICROMIPSOP_MASK_IMMP, MICROMIPSOP_SH_IMMP): Likewise.
+ (MICROMIPSOP_MASK_IMMQ, MICROMIPSOP_SH_IMMQ): Likewise.
+ (MICROMIPSOP_MASK_IMMU, MICROMIPSOP_SH_IMMU): Likewise.
+ (MICROMIPSOP_MASK_IMMW, MICROMIPSOP_SH_IMMW): Likewise.
+ (MICROMIPSOP_MASK_IMMX, MICROMIPSOP_SH_IMMX): Likewise.
+ (MICROMIPSOP_MASK_IMMY, MICROMIPSOP_SH_IMMY): Likewise.
+ (MICROMIPSOP_MASK_CODE, MICROMIPSOP_SH_CODE): Likewise.
+ (MICROMIPSOP_MASK_CODE2, MICROMIPSOP_SH_CODE2): Likewise.
+ (MICROMIPSOP_MASK_CACHE, MICROMIPSOP_SH_CACHE): Likewise.
+ (MICROMIPSOP_MASK_CODE20, MICROMIPSOP_SH_CODE20): Likewise.
+ (MICROMIPSOP_MASK_PERFREG, MICROMIPSOP_SH_PERFREG): Likewise.
+ (MICROMIPSOP_MASK_CODE19, MICROMIPSOP_SH_CODE19): Likewise.
+ (MICROMIPSOP_MASK_ALN, MICROMIPSOP_SH_ALN): Likewise.
+ (MICROMIPSOP_MASK_VECBYTE, MICROMIPSOP_SH_VECBYTE): Likewise.
+ (MICROMIPSOP_MASK_VECALIGN, MICROMIPSOP_SH_VECALIGN): Likewise.
+ (MICROMIPSOP_MASK_DSPACC, MICROMIPSOP_SH_DSPACC): Likewise.
+ (MICROMIPSOP_MASK_DSPACC_S, MICROMIPSOP_SH_DSPACC_S): Likewise.
+ (MICROMIPSOP_MASK_DSPSFT, MICROMIPSOP_SH_DSPSFT): Likewise.
+ (MICROMIPSOP_MASK_DSPSFT_7, MICROMIPSOP_SH_DSPSFT_7): Likewise.
+ (MICROMIPSOP_MASK_SA3, MICROMIPSOP_SH_SA3): Likewise.
+ (MICROMIPSOP_MASK_SA4, MICROMIPSOP_SH_SA4): Likewise.
+ (MICROMIPSOP_MASK_IMM8, MICROMIPSOP_SH_IMM8): Likewise.
+ (MICROMIPSOP_MASK_IMM10, MICROMIPSOP_SH_IMM10): Likewise.
+ (MICROMIPSOP_MASK_WRDSP, MICROMIPSOP_SH_WRDSP): Likewise.
+ (MICROMIPSOP_MASK_RDDSP, MICROMIPSOP_SH_RDDSP): Likewise.
+ (MICROMIPSOP_MASK_BP, MICROMIPSOP_SH_BP): Likewise.
+ (MICROMIPSOP_MASK_MT_U, MICROMIPSOP_SH_MT_U): Likewise.
+ (MICROMIPSOP_MASK_MT_H, MICROMIPSOP_SH_MT_H): Likewise.
+ (MICROMIPSOP_MASK_MTACC_T, MICROMIPSOP_SH_MTACC_T): Likewise.
+ (MICROMIPSOP_MASK_MTACC_D, MICROMIPSOP_SH_MTACC_D): Likewise.
+ (MICROMIPSOP_MASK_BBITIND, MICROMIPSOP_SH_BBITIND): Likewise.
+ (MICROMIPSOP_MASK_CINSPOS, MICROMIPSOP_SH_CINSPOS): Likewise.
+ (MICROMIPSOP_MASK_CINSLM1, MICROMIPSOP_SH_CINSLM1): Likewise.
+ (MICROMIPSOP_MASK_SEQI, MICROMIPSOP_SH_SEQI): Likewise.
+ (micromips_opcodes): New declaration.
+ (bfd_micromips_num_opcodes): Likewise.
+
+2011-07-24 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * mips.h (INSN_TRAP): Rename to...
+ (INSN_NO_DELAY_SLOT): ... this.
+ (INSN_SYNC): Remove macro.
+
+2011-07-01 Eric B. Weddington <eric.weddington@atmel.com>
+
+ * avr.h (AVR_ISA_AVR6): Remove AVR_ISA_SPMX as it was actually
+ a duplicate of AVR_ISA_SPM.
+
+2011-07-01 Nick Clifton <nickc@redhat.com>
+
+ * avr.h (AVR_ISA_AVR6): Fix typo, adding AVR_ISA_SPMX.
+
+2011-06-18 Robin Getz <robin.getz@analog.com>
+
+ * bfin.h (is_macmod_signed): New func
+
+2011-06-18 Mike Frysinger <vapier@gentoo.org>
+
+ * bfin.h (is_macmod_pmove): Add missing space before func args.
+ (is_macmod_hmove): Likewise.
+
+2011-06-13 Walter Lee <walt@tilera.com>
+
+ * tilegx.h: New file.
+ * tilepro.h: New file.
+
+2011-05-31 Paul Brook <paul@codesourcery.com>
+
+ * arm.h (ARM_ARCH_V7R_IDIV): Define.
+
+2011-05-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
+
+ * s390.h: Replace S390_OPERAND_REG_EVEN with
+ S390_OPERAND_REG_PAIR.
+
+2011-05-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
+
+ * s390.h: Add S390_OPCODE_REG_EVEN flag.
+
+2011-04-18 Julian Brown <julian@codesourcery.com>
+
+ * arm.h (ARM_AEXT_V7_ARM): Remove ARM_EXT_OS from bitmask.
+
+2011-04-11 Dan McDonald <dan@wellkeeper.com>
+
+ PR gas/12296
+ * arm.h (ARM_AEXT_V7_ARM): Add ARM_EXT_OS.
+
+2011-03-22 Eric B. Weddington <eric.weddington@atmel.com>
+
+ * avr.h (AVR_ISA_SPMX,AVR_ISA_DES,AVR_ISA_M256,AVR_ISA_XMEGA):
+ New instruction set flags.
+ (AVR_INSN): Add new instructions for SPM Z+, DES for XMEGA.
+
+2011-02-28 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * mips.h (M_PREF_AB): New enum value.
+
2011-02-12 Mike Frysinger <vapier@gentoo.org>
* bfin.h (M_S2RND, M_T, M_W32, M_FU, M_TFU, M_IS, M_ISS2, M_IH,
(OP_*_RZ, OP_*_FZ, INSN2_M_FP_D, INSN2_WRITE_GPR_Z, INSN2_WRITE_FPR_Z)
(INSN2_READ_GPR_Z, INSN2_READ_FPR_Z, INSN2_READ_GPR_D): Define.
+2010-11-25 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
+
+ * s390.h (enum s390_opcode_cpu_val): Add S390_OPCODE_MAXCPU.
+
2010-11-23 Richard Sandiford <rdsandiford@googlemail.com>
* mips.h: Fix previous commit.
projects / deliverable / binutils-gdb.git / blobdiff