bfd/ChangeLog:

[deliverable/binutils-gdb.git] / include / opcode / ChangeLog

diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index b79f68c1df14360b3928baa99aa72658f707631d..44c7dc44846ef171ae5feedc1f8783046b129e84 100644 (file)
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,56 @@
+2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
+
+       2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
+       * cgen.h (enum cgen_parse_operand_type): Add
+       CGEN_PARSE_OPERAND_SYMBOLIC.
+
+2005-01-21  Fred Fish  <fnf@specifixinc.com>
+
+       * mips.h: Change INSN_ALIAS to INSN2_ALIAS.
+       Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
+       Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
+
+2005-01-19  Fred Fish  <fnf@specifixinc.com>
+
+       * mips.h (struct mips_opcode): Add new pinfo2 member.
+       (INSN_ALIAS): New define for opcode table entries that are
+       specific instances of another entry, such as 'move' for an 'or'
+       with a zero operand.
+       (INSN_READ_MDMX_ACC): Redefine from 0 to 0x2.
+       (INSN_WRITE_MDMX_ACC): Redefine from 0 to 0x4.
+
+2004-12-09  Ian Lance Taylor  <ian@wasabisystems.com>
+
+       * mips.h (CPU_RM9000): Define.
+       (OPCODE_IS_MEMBER): Handle CPU_RM9000.
+
+2004-11-25 Jan Beulich  <jbeulich@novell.com>
+
+       * i386.h: CpuNo64 mov can't reasonably have a 'q' suffix. Moves
+       to/from test registers are illegal in 64-bit mode. Add missing
+       NoRex64 to sidt. fxsave/fxrstor now allow for a 'q' suffix
+       (previously one had to explicitly encode a rex64 prefix). Re-enable
+       lahf/sahf in 64-bit mode as at least some Athlon64/Opteron steppings
+       support it there. Add cmpxchg16b as per Intel's 64-bit documentation.
+
+2004-11-23 Jan Beulich  <jbeulich@novell.com>
+
+       * i386.h (i386_optab): paddq and psubq, even in their MMX form, are
+       available only with SSE2. Change the MMX additions introduced by SSE
+       and 3DNow!A to CpuMMX2 (rather than CpuMMX). Indicate the 3DNow!A
+       instructions by their now designated identifier (since combining i686
+       and 3DNow! does not really imply 3DNow!A).
+
+2004-11-19  Alan Modra  <amodra@bigpond.net.au>
+
+       * msp430.h (struct rcodes_s, MSP430_RLC, msp430_rcodes,
+       struct hcodes_s, msp430_hcodes): Move to gas/config/tc-msp430.c.
+
+2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
+           Vineet Sharma      <vineets@noida.hcltech.com>
+
+       * maxq.h: New file: Disassembly information for the maxq port.
+
 2004-11-05  H.J. Lu  <hongjiu.lu@intel.com>
 
        * i386.h (i386_optab): Put back "movzb".
@@ -17,7 +70,7 @@
        (cris_imm_oprnd_size_type): New members SIZE_FIELD_SIGNED and
        SIZE_FIELD_UNSIGNED.
 
-2004-11-04 Jan Beulich <jbeulich@novell.com>
+2004-11-04 Jan Beulich  <jbeulich@novell.com>
 
        * i386.h (sldx_Suf): Remove.
        (FP, l_FP, sl_FP, x_FP): Don't imply IgnoreSize.