Update year range in copyright notice of binutils files

[deliverable/binutils-gdb.git] / include / opcode / arc.h

diff --git a/include/opcode/arc.h b/include/opcode/arc.h
index f5cb9e9ccbae2a45377dad09dcbe34a11ddd4a5a..6a979fce034df3f1dd11a2e5e0ab1d55d82d7460 100644 (file)
--- a/include/opcode/arc.h
+++ b/include/opcode/arc.h
@@ -1,5 +1,5 @@
 /* Opcode table for the ARC.
-   Copyright (C) 1994-2016 Free Software Foundation, Inc.
+   Copyright (C) 1994-2018 Free Software Foundation, Inc.
 
    Contributed by Claudiu Zissulescu (claziss@synopsys.com)
 
@@ -33,7 +33,7 @@ extern "C" {
 #endif
 
 #ifndef MAX_INSN_FLGS
-#define MAX_INSN_FLGS       3
+#define MAX_INSN_FLGS       4
 #endif
 
 /* Instruction Class.  */
@@ -42,49 +42,75 @@ typedef enum
   ACL,
   ARITH,
   AUXREG,
+  BBIT0,
+  BBIT1,
+  BI,
+  BIH,
   BITOP,
   BITSTREAM,
   BMU,
   BRANCH,
+  BRCC,
   CONTROL,
+  DIVREM,
+  DMA,
   DPI,
   DSP,
+  EI,
+  ENTER,
   FLOAT,
   INVALID,
+  JLI,
   JUMP,
   KERNEL,
+  LEAVE,
+  LOAD,
   LOGICAL,
+  LOOP,
   MEMORY,
+  MISC,
+  MOVE,
+  MPY,
   NET,
+  PROTOCOL_DECODE,
   PMU,
+  POP,
+  PUSH,
+  SJLI,
+  STORE,
+  SUB,
+  ULTRAIP,
   XY
 } insn_class_t;
 
 /* Instruction Subclass.  */
 typedef enum
 {
-  NONE,
-  CVT,
-  BTSCN,
-  CD1,
-  CD2,
-  COND,
-  DIV,
-  DP,
-  DPA,
-  DPX,
-  MPY1E,
-  MPY6E,
-  MPY7E,
-  MPY8E,
-  MPY9E,
-  NPS400,
-  QUARKSE,
-  SHFT1,
-  SHFT2,
-  SWAP,
-  SP,
-  SPX
+  NONE     = 0,
+  CVT      = (1U << 1),
+  BTSCN    = (1U << 2),
+  CD       = (1U << 3),
+  CD1      = CD,
+  CD2      = CD,
+  COND     = (1U << 4),
+  DIV      = (1U << 5),
+  DP       = (1U << 6),
+  DPA      = (1U << 7),
+  DPX      = (1U << 8),
+  LL64     = (1U << 9),
+  MPY1E    = (1U << 10),
+  MPY6E    = (1U << 11),
+  MPY7E    = (1U << 12),
+  MPY8E    = (1U << 13),
+  MPY9E    = (1U << 14),
+  NPS400   = (1U << 15),
+  QUARKSE1 = (1U << 16),
+  QUARKSE2 = (1U << 17),
+  SHFT1    = (1U << 18),
+  SHFT2    = (1U << 19),
+  SWAP     = (1U << 20),
+  SP       = (1U << 21),
+  SPX      = (1U << 22)
 } insn_subclass_t;
 
 /* Flags class.  */
@@ -105,14 +131,23 @@ typedef enum
   F_CLASS_EXTEND = (1 << 2),
 
   /* Condition code flag.  */
-  F_CLASS_COND = (1 << 3)
+  F_CLASS_COND = (1 << 3),
+
+  /* Write back mode.  */
+  F_CLASS_WB = (1 << 4),
+
+  /* Data size.  */
+  F_CLASS_ZZ = (1 << 5),
+
+  /* Implicit flag.  */
+  F_CLASS_IMPLICIT = (1 << 6)
 } flag_class_t;
 
 /* The opcode table is an array of struct arc_opcode.  */
 struct arc_opcode
 {
   /* The opcode name.  */
-  const char *name;
+  const char * name;
 
   /* The opcode itself.  Those bits which will be filled in with
      operands are zeroes.  */
@@ -166,46 +201,7 @@ extern int arc_opcode_len (const struct arc_opcode *opcode);
                            | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS)
 #define ARC_OPCODE_ARCFPX  (ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM)
 #define ARC_OPCODE_ARCV2   (ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS)
-
-/* CPU extensions.  */
-#define ARC_EA       0x0001
-#define ARC_CD       0x0001    /* Mutual exclusive with EA.  */
-#define ARC_LLOCK    0x0002
-#define ARC_ATOMIC   0x0002    /* Mutual exclusive with LLOCK.  */
-#define ARC_MPY      0x0004
-#define ARC_MULT     0x0004
-#define ARC_NPS400   0x0008
-
-/* Floating point support.  */
-#define ARC_DPFP     0x0010
-#define ARC_SPFP     0x0020
-#define ARC_FPU      0x0030
-#define ARC_FPUDA    0x0040
-
-/* NORM & SWAP.  */
-#define ARC_SWAP     0x0100
-#define ARC_NORM     0x0200
-#define ARC_BSCAN    0x0200
-
-/* A7 specific.  */
-#define ARC_UIX      0x1000
-#define ARC_TSTAMP   0x1000
-
-/* A6 specific.  */
-#define ARC_VBFDW    0x1000
-#define ARC_BARREL   0x1000
-#define ARC_DSPA     0x1000
-
-/* EM specific.  */
-#define ARC_SHIFT    0x1000
-
-/* V2 specific.  */
-#define ARC_INTR     0x1000
-#define ARC_DIV      0x1000
-
-/* V1 specific.  */
-#define ARC_XMAC     0x1000
-#define ARC_CRC      0x1000
+#define ARC_OPCODE_ARCMPY6E  (ARC_OPCODE_ARC700 | ARC_OPCODE_ARCV2)
 
 /* The operands table is an array of struct arc_operand.  */
 struct arc_operand
@@ -342,7 +338,7 @@ extern const unsigned arc_NToperand;
 struct arc_flag_operand
 {
   /* The flag name.  */
-  const char *name;
+  const char * name;
 
   /* The flag code.  */
   unsigned code;
@@ -424,13 +420,13 @@ struct arc_operand_operation
 struct arc_pseudo_insn
 {
   /* Mnemonic for pseudo/alias insn.  */
-  const char *mnemonic_p;
+  const char * mnemonic_p;
 
   /* Mnemonic for real instruction.  */
-  const char *mnemonic_r;
+  const char * mnemonic_r;
 
   /* Flag that will have to be added (if any).  */
-  const char *flag_r;
+  const char * flag_r;
 
   /* Amount of operands.  */
   unsigned operand_cnt;
@@ -457,7 +453,7 @@ struct arc_aux_reg
   insn_subclass_t subclass;
 
   /* Register name.  */
-  const char *name;
+  const char * name;
 
   /* Size of the string.  */
   size_t length;