* bfd/coff-arm.c (coff_arm_relocate_section)

[deliverable/binutils-gdb.git] / include / opcode / ia64.h

diff --git a/include/opcode/ia64.h b/include/opcode/ia64.h
index 164594b8c7fb487531b4c9c887403039181805cd..67b229cbee66ebca5f481749a5153906943e12bf 100644 (file)
--- a/include/opcode/ia64.h
+++ b/include/opcode/ia64.h
@@ -1,6 +1,7 @@
 /* ia64.h -- Header file for ia64 opcode table
-   Copyright (C) 1998, 1999, 2000, 2002 Free Software Foundation, Inc.
-       Contributed by David Mosberger-Tang <davidm@hpl.hp.com> */
+   Copyright (C) 1998, 1999, 2000, 2002, 2005, 2006
+   Free Software Foundation, Inc.
+   Contributed by David Mosberger-Tang <davidm@hpl.hp.com> */
 
 #ifndef opcode_ia64_h
 #define opcode_ia64_h
@@ -102,6 +103,7 @@ enum ia64_opnd
     IA64_OPND_CPOS6c,  /* 6-bit count (63 - bits 31-36) */
     IA64_OPND_IMM1,    /* signed 1-bit immediate (bit 36) */
     IA64_OPND_IMMU2,   /* unsigned 2-bit immediate (bits 13-14) */
+    IA64_OPND_IMMU5b,  /* unsigned 5-bit immediate (32 + bits 14-18) */
     IA64_OPND_IMMU7a,  /* unsigned 7-bit immediate (bits 13-19) */
     IA64_OPND_IMMU7b,  /* unsigned 7-bit immediate (bits 20-26) */
     IA64_OPND_SOF,     /* 8-bit stack frame size */
@@ -169,9 +171,10 @@ enum ia64_resource_specifier
   IA64_RS_BR,
   IA64_RS_CFM,
   IA64_RS_CPUID,
+  IA64_RS_CR_IIB,
   IA64_RS_CR_IRR,
   IA64_RS_CR_LRR,
-  IA64_RS_CR, /* 3-7,10-15,18,26-63,75-79,82-127 */
+  IA64_RS_CR, /* 3-7,10-15,18,28-63,75-79,82-127 */
   IA64_RS_DBR,
   IA64_RS_FR,
   IA64_RS_FRb,
@@ -324,7 +327,7 @@ enum ia64_operand_class
 
 struct ia64_operand
 {
-  enum ia64_operand_class class;
+  enum ia64_operand_class op_class;
 
   /* Set VALUE as the operand bits for the operand of type SELF in the
      instruction pointed to by CODE.  If an error occurs, *CODE is not