RISC-V: Only relax to C.LUI when imm != 0 and rd != 0/2

[deliverable/binutils-gdb.git] / ld / ChangeLog

diff --git a/ld/ChangeLog b/ld/ChangeLog
index 7319d72ef8f7d7ce84b586d7fbe8a8428a6ec3b2..f4c449097b654e20c498bf4b64400791e4d694a0 100644 (file)
--- a/ld/ChangeLog
+++ b/ld/ChangeLog
@@ -1,3 +1,9 @@
+2017-10-24  Andrew Waterman  <andrew@sifive.com>
+
+       * ld/testsuite/ld-riscv-elf/c-lui.d: New testcase.
+       ld/testsuite/ld-riscv-elf/c-lui.s: Likewise.
+       ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp: New test suite.
+
 2017-10-24  Renlin Li  <renlin.li@arm.com>
 
        PR ld/21703